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Diffstat (limited to 'arch/arm/boot/dts/uniphier-sld8.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-sld8.dtsi26
1 files changed, 14 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi
index 67b12dfe513b..f876282760e9 100644
--- a/arch/arm/boot/dts/uniphier-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld8.dtsi
@@ -211,33 +211,33 @@
reg = <0x59801000 0x400>;
};
- mioctrl@59810000 {
+ mioctrl: syscon@59810000 {
compatible = "socionext,uniphier-sld8-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
- mio_clk: clock {
+ mio_clk: clock-controller {
compatible = "socionext,uniphier-sld8-mio-clock";
#clock-cells = <1>;
};
- mio_rst: reset {
+ mio_rst: reset-controller {
compatible = "socionext,uniphier-sld8-mio-reset";
#reset-cells = <1>;
};
};
- perictrl@59820000 {
+ syscon@59820000 {
compatible = "socionext,uniphier-sld8-perictrl",
"simple-mfd", "syscon";
reg = <0x59820000 0x200>;
- peri_clk: clock {
+ peri_clk: clock-controller {
compatible = "socionext,uniphier-sld8-peri-clock";
#clock-cells = <1>;
};
- peri_rst: reset {
+ peri_rst: reset-controller {
compatible = "socionext,uniphier-sld8-peri-reset";
#reset-cells = <1>;
};
@@ -276,6 +276,7 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
+ socionext,syscon-uhs-mode = <&mioctrl 0>;
};
emmc: mmc@5a500000 {
@@ -338,7 +339,7 @@
has-transaction-translator;
};
- soc-glue@5f800000 {
+ syscon@5f800000 {
compatible = "socionext,uniphier-sld8-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
@@ -348,9 +349,10 @@
};
};
- soc-glue@5f900000 {
+ syscon@5f900000 {
compatible = "socionext,uniphier-sld8-soc-glue-debug",
- "simple-mfd";
+ "simple-mfd", "syscon";
+ reg = <0x5f900000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x5f900000 0x2000>;
@@ -397,17 +399,17 @@
#interrupt-cells = <2>;
};
- sysctrl@61840000 {
+ syscon@61840000 {
compatible = "socionext,uniphier-sld8-sysctrl",
"simple-mfd", "syscon";
reg = <0x61840000 0x10000>;
- sys_clk: clock {
+ sys_clk: clock-controller {
compatible = "socionext,uniphier-sld8-clock";
#clock-cells = <1>;
};
- sys_rst: reset {
+ sys_rst: reset-controller {
compatible = "socionext,uniphier-sld8-reset";
#reset-cells = <1>;
};