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Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/board-mop500.c2
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h10
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index dc8746d7826e..af913741e6ec 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -52,7 +52,7 @@ static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
* on value present in GpioSel1 to GpioSel6 and AlternatFunction
* register. This is the array of 7 configuration settings.
* One has to compile time decide these settings. Below is the
- * explaination of these setting
+ * explanation of these setting
* GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
* GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
* GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 0fefb34c11e4..16647b255378 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -58,7 +58,7 @@
#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000)
#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
-/* per7 base addressess */
+/* per7 base addresses */
#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000)
#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000)
#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000)
@@ -68,7 +68,7 @@
#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
-/* per6 base addressess */
+/* per6 base addresses */
#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
@@ -79,11 +79,11 @@
#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
-/* per5 base addressess */
+/* per5 base addresses */
#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
-/* per4 base addressess */
+/* per4 base addresses */
#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000)
#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000)
#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000)
@@ -106,7 +106,7 @@
#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
-/* per2 base addressess */
+/* per2 base addresses */
#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)