summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-evk.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-evk.dts11
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index d4c7ca16abd0..7816853162b3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -36,8 +36,8 @@
pcie0_refclk: pcie0-refclk {
compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
};
reg_can1_stby: regulator-can1-stby {
@@ -400,13 +400,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
- clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
- <&clk IMX8MP_CLK_PCIE_ROOT>,
- <&clk IMX8MP_CLK_HSIO_AXI>;
- clock-names = "pcie", "pcie_aux", "pcie_bus";
- assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
- assigned-clock-rates = <10000000>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
vpcie-supply = <&reg_pcie0>;
status = "okay";
};