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Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra210.dtsi')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210.dtsi310
1 files changed, 155 insertions, 155 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index bc0cacb20d7a..980565bf02c9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -555,19 +555,19 @@
reg = <0x0 0x700008d4 0x0 0x29c>, /* Pad control registers */
<0x0 0x70003000 0x0 0x294>; /* Mux registers */
- sdmmc1_3v3_drv: pinmux-sdmmc1-3v3-drv {
+ sdmmc1_1v8_drv: pinmux-sdmmc1-1v8-drv {
sdmmc1 {
nvidia,pins = "drive_sdmmc1";
- nvidia,pull-down-strength = <0x8>;
- nvidia,pull-up-strength = <0x8>;
+ nvidia,pull-down-strength = <0x4>;
+ nvidia,pull-up-strength = <0x3>;
};
};
- sdmmc1_1v8_drv: pinmux-sdmmc1-1v8-drv {
+ sdmmc1_3v3_drv: pinmux-sdmmc1-3v3-drv {
sdmmc1 {
nvidia,pins = "drive_sdmmc1";
- nvidia,pull-down-strength = <0x4>;
- nvidia,pull-up-strength = <0x3>;
+ nvidia,pull-down-strength = <0x8>;
+ nvidia,pull-up-strength = <0x8>;
};
};
@@ -579,19 +579,19 @@
};
};
- sdmmc3_3v3_drv: pinmux-sdmmc3-3v3-drv {
+ sdmmc3_1v8_drv: pinmux-sdmmc3-1v8-drv {
sdmmc3 {
nvidia,pins = "drive_sdmmc3";
- nvidia,pull-down-strength = <0x8>;
- nvidia,pull-up-strength = <0x8>;
+ nvidia,pull-down-strength = <0x4>;
+ nvidia,pull-up-strength = <0x3>;
};
};
- sdmmc3_1v8_drv: pinmux-sdmmc3-1v8-drv {
+ sdmmc3_3v3_drv: pinmux-sdmmc3-3v3-drv {
sdmmc3 {
nvidia,pins = "drive_sdmmc3";
- nvidia,pull-down-strength = <0x4>;
- nvidia,pull-up-strength = <0x3>;
+ nvidia,pull-down-strength = <0x8>;
+ nvidia,pull-up-strength = <0x8>;
};
};
@@ -852,6 +852,38 @@
#interrupt-cells = <2>;
interrupt-controller;
+ pinmux {
+ pex_dpd_disable: pex-dpd-disable {
+ pins = "pex-bias", "pex-clk1", "pex-clk2";
+ low-power-disable;
+ };
+
+ pex_dpd_enable: pex-dpd-enable {
+ pins = "pex-bias", "pex-clk1", "pex-clk2";
+ low-power-enable;
+ };
+
+ sdmmc1_1v8: sdmmc1-1v8 {
+ pins = "sdmmc1";
+ power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+ };
+
+ sdmmc1_3v3: sdmmc1-3v3 {
+ pins = "sdmmc1";
+ power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+ };
+
+ sdmmc3_1v8: sdmmc3-1v8 {
+ pins = "sdmmc3";
+ power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+ };
+
+ sdmmc3_3v3: sdmmc3-3v3 {
+ pins = "sdmmc3";
+ power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+ };
+ };
+
powergates {
pd_audio: aud {
clocks = <&tegra_car TEGRA210_CLK_APE>,
@@ -881,21 +913,12 @@
#power-domain-cells = <0>;
};
- pd_xusbss: xusba {
- clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
- resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
- #power-domain-cells = <0>;
- };
-
- pd_xusbdev: xusbb {
- clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
- resets = <&tegra_car 95>;
- #power-domain-cells = <0>;
- };
-
- pd_xusbhost: xusbc {
- clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
- resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ pd_venc: venc {
+ clocks = <&tegra_car TEGRA210_CLK_VI>,
+ <&tegra_car TEGRA210_CLK_CSI>;
+ resets = <&mc TEGRA210_MC_RESET_VI>,
+ <&tegra_car 20>,
+ <&tegra_car 52>;
#power-domain-cells = <0>;
};
@@ -907,45 +930,22 @@
#power-domain-cells = <0>;
};
- pd_venc: venc {
- clocks = <&tegra_car TEGRA210_CLK_VI>,
- <&tegra_car TEGRA210_CLK_CSI>;
- resets = <&mc TEGRA210_MC_RESET_VI>,
- <&tegra_car 20>,
- <&tegra_car 52>;
+ pd_xusbss: xusba {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+ resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
#power-domain-cells = <0>;
};
- };
-
- pinmux {
- sdmmc1_3v3: sdmmc1-3v3 {
- pins = "sdmmc1";
- power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
- };
-
- sdmmc1_1v8: sdmmc1-1v8 {
- pins = "sdmmc1";
- power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
- };
- sdmmc3_3v3: sdmmc3-3v3 {
- pins = "sdmmc3";
- power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
- };
-
- sdmmc3_1v8: sdmmc3-1v8 {
- pins = "sdmmc3";
- power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
- };
-
- pex_dpd_disable: pex-dpd-disable {
- pins = "pex-bias", "pex-clk1", "pex-clk2";
- low-power-disable;
+ pd_xusbdev: xusbb {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
+ resets = <&tegra_car 95>;
+ #power-domain-cells = <0>;
};
- pex_dpd_enable: pex-dpd-enable {
- pins = "pex-bias", "pex-clk1", "pex-clk2";
- low-power-enable;
+ pd_xusbhost: xusbc {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ #power-domain-cells = <0>;
};
};
};
@@ -1388,50 +1388,6 @@
ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
status = "disabled";
- adma: dma-controller@702e2000 {
- compatible = "nvidia,tegra210-adma";
- reg = <0x702e2000 0x2000>;
- interrupt-parent = <&agic>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
- clock-names = "d_audio";
- status = "disabled";
- };
-
- agic: interrupt-controller@702f9000 {
- compatible = "nvidia,tegra210-agic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x702f9000 0x1000>,
- <0x702fa000 0x2000>;
- interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&tegra_car TEGRA210_CLK_APE>;
- clock-names = "clk";
- status = "disabled";
- };
-
tegra_ahub: ahub@702d0800 {
compatible = "nvidia,tegra210-ahub";
reg = <0x702d0800 0x800>;
@@ -1620,42 +1576,6 @@
status = "disabled";
};
- tegra_dmic1: dmic@702d4000 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x702d4000 0x100>;
- clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
- clock-names = "dmic";
- assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
- assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC1";
- status = "disabled";
- };
-
- tegra_dmic2: dmic@702d4100 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x702d4100 0x100>;
- clocks = <&tegra_car TEGRA210_CLK_DMIC2>;
- clock-names = "dmic";
- assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC2>;
- assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC2";
- status = "disabled";
- };
-
- tegra_dmic3: dmic@702d4200 {
- compatible = "nvidia,tegra210-dmic";
- reg = <0x702d4200 0x100>;
- clocks = <&tegra_car TEGRA210_CLK_DMIC3>;
- clock-names = "dmic";
- assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC3>;
- assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
- assigned-clock-rates = <3072000>;
- sound-name-prefix = "DMIC3";
- status = "disabled";
- };
-
tegra_sfc1: sfc@702d2000 {
compatible = "nvidia,tegra210-sfc";
reg = <0x702d2000 0x200>;
@@ -1684,20 +1604,6 @@
status = "disabled";
};
- tegra_mvc1: mvc@702da000 {
- compatible = "nvidia,tegra210-mvc";
- reg = <0x702da000 0x200>;
- sound-name-prefix = "MVC1";
- status = "disabled";
- };
-
- tegra_mvc2: mvc@702da200 {
- compatible = "nvidia,tegra210-mvc";
- reg = <0x702da200 0x200>;
- sound-name-prefix = "MVC2";
- status = "disabled";
- };
-
tegra_amx1: amx@702d3000 {
compatible = "nvidia,tegra210-amx";
reg = <0x702d3000 0x100>;
@@ -1726,6 +1632,42 @@
status = "disabled";
};
+ tegra_dmic1: dmic@702d4000 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x702d4000 0x100>;
+ clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
+ clock-names = "dmic";
+ assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
+ assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC1";
+ status = "disabled";
+ };
+
+ tegra_dmic2: dmic@702d4100 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x702d4100 0x100>;
+ clocks = <&tegra_car TEGRA210_CLK_DMIC2>;
+ clock-names = "dmic";
+ assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC2>;
+ assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC2";
+ status = "disabled";
+ };
+
+ tegra_dmic3: dmic@702d4200 {
+ compatible = "nvidia,tegra210-dmic";
+ reg = <0x702d4200 0x100>;
+ clocks = <&tegra_car TEGRA210_CLK_DMIC3>;
+ clock-names = "dmic";
+ assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC3>;
+ assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
+ assigned-clock-rates = <3072000>;
+ sound-name-prefix = "DMIC3";
+ status = "disabled";
+ };
+
tegra_ope1: processing-engine@702d8000 {
compatible = "nvidia,tegra210-ope";
reg = <0x702d8000 0x100>;
@@ -1766,6 +1708,20 @@
};
};
+ tegra_mvc1: mvc@702da000 {
+ compatible = "nvidia,tegra210-mvc";
+ reg = <0x702da000 0x200>;
+ sound-name-prefix = "MVC1";
+ status = "disabled";
+ };
+
+ tegra_mvc2: mvc@702da200 {
+ compatible = "nvidia,tegra210-mvc";
+ reg = <0x702da200 0x200>;
+ sound-name-prefix = "MVC2";
+ status = "disabled";
+ };
+
tegra_amixer: amixer@702dbb00 {
compatible = "nvidia,tegra210-amixer";
reg = <0x702dbb00 0x800>;
@@ -1856,6 +1812,50 @@
};
};
};
+
+ adma: dma-controller@702e2000 {
+ compatible = "nvidia,tegra210-adma";
+ reg = <0x702e2000 0x2000>;
+ interrupt-parent = <&agic>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
+ clock-names = "d_audio";
+ status = "disabled";
+ };
+
+ agic: interrupt-controller@702f9000 {
+ compatible = "nvidia,tegra210-agic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x702f9000 0x1000>,
+ <0x702fa000 0x2000>;
+ interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&tegra_car TEGRA210_CLK_APE>;
+ clock-names = "clk";
+ status = "disabled";
+ };
};
spi@70410000 {
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-01 14:35:56 +0300