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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm6125.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm6125.dtsi140
1 files changed, 72 insertions, 68 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index a596baa6ce3e..d7c1a40617c6 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -181,6 +181,78 @@
method = "smc";
};
+ rpm: remoteproc {
+ compatible = "qcom,sm6125-rpm-proc", "qcom,rpm-proc";
+
+ glink-edge {
+ compatible = "qcom,glink-rpm";
+
+ interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+ mboxes = <&apcs_glb 0>;
+
+ rpm_requests: rpm-requests {
+ compatible = "qcom,rpm-sm6125";
+ qcom,glink-channels = "rpm_requests";
+
+ rpmcc: clock-controller {
+ compatible = "qcom,rpmcc-sm6125", "qcom,rpmcc";
+ #clock-cells = <1>;
+ };
+
+ rpmpd: power-controller {
+ compatible = "qcom,sm6125-rpmpd";
+ #power-domain-cells = <1>;
+ operating-points-v2 = <&rpmpd_opp_table>;
+
+ rpmpd_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ rpmpd_opp_ret: opp1 {
+ opp-level = <RPM_SMD_LEVEL_RETENTION>;
+ };
+
+ rpmpd_opp_ret_plus: opp2 {
+ opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
+ };
+
+ rpmpd_opp_min_svs: opp3 {
+ opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
+ };
+
+ rpmpd_opp_low_svs: opp4 {
+ opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
+ };
+
+ rpmpd_opp_svs: opp5 {
+ opp-level = <RPM_SMD_LEVEL_SVS>;
+ };
+
+ rpmpd_opp_svs_plus: opp6 {
+ opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
+ };
+
+ rpmpd_opp_nom: opp7 {
+ opp-level = <RPM_SMD_LEVEL_NOM>;
+ };
+
+ rpmpd_opp_nom_plus: opp8 {
+ opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
+ };
+
+ rpmpd_opp_turbo: opp9 {
+ opp-level = <RPM_SMD_LEVEL_TURBO>;
+ };
+
+ rpmpd_opp_turbo_no_cpr: opp10 {
+ opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
+ };
+ };
+ };
+ };
+ };
+ };
+
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -292,74 +364,6 @@
};
};
- rpm-glink {
- compatible = "qcom,glink-rpm";
-
- interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
- qcom,rpm-msg-ram = <&rpm_msg_ram>;
- mboxes = <&apcs_glb 0>;
-
- rpm_requests: rpm-requests {
- compatible = "qcom,rpm-sm6125";
- qcom,glink-channels = "rpm_requests";
-
- rpmcc: clock-controller {
- compatible = "qcom,rpmcc-sm6125", "qcom,rpmcc";
- #clock-cells = <1>;
- };
-
- rpmpd: power-controller {
- compatible = "qcom,sm6125-rpmpd";
- #power-domain-cells = <1>;
- operating-points-v2 = <&rpmpd_opp_table>;
-
- rpmpd_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- rpmpd_opp_ret: opp1 {
- opp-level = <RPM_SMD_LEVEL_RETENTION>;
- };
-
- rpmpd_opp_ret_plus: opp2 {
- opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
- };
-
- rpmpd_opp_min_svs: opp3 {
- opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
- };
-
- rpmpd_opp_low_svs: opp4 {
- opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
- };
-
- rpmpd_opp_svs: opp5 {
- opp-level = <RPM_SMD_LEVEL_SVS>;
- };
-
- rpmpd_opp_svs_plus: opp6 {
- opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
- };
-
- rpmpd_opp_nom: opp7 {
- opp-level = <RPM_SMD_LEVEL_NOM>;
- };
-
- rpmpd_opp_nom_plus: opp8 {
- opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
- };
-
- rpmpd_opp_turbo: opp9 {
- opp-level = <RPM_SMD_LEVEL_TURBO>;
- };
-
- rpmpd_opp_turbo_no_cpr: opp10 {
- opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
- };
- };
- };
- };
- };
-
smem: smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;