summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/sm8250.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8250.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8250.dtsi148
1 files changed, 94 insertions, 54 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 7bea916900e2..83ab6de459bc 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -106,8 +106,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "cache";
@@ -137,8 +137,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_100: l2-cache {
compatible = "cache";
@@ -162,8 +162,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_200: l2-cache {
compatible = "cache";
@@ -187,8 +187,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_300: l2-cache {
compatible = "cache";
@@ -212,8 +212,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_400: l2-cache {
compatible = "cache";
@@ -237,8 +237,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_500: l2-cache {
compatible = "cache";
@@ -262,8 +262,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_600: l2-cache {
compatible = "cache";
@@ -287,8 +287,8 @@
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 2>;
operating-points-v2 = <&cpu7_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_700: l2-cache {
compatible = "cache";
@@ -1789,49 +1789,49 @@
config_noc: interconnect@1500000 {
compatible = "qcom,sm8250-config-noc";
reg = <0 0x01500000 0 0xa580>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sm8250-system-noc";
reg = <0 0x01620000 0 0x1c200>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@163d000 {
compatible = "qcom,sm8250-mc-virt";
reg = <0 0x0163d000 0 0x1000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8250-aggre1-noc";
reg = <0 0x016e0000 0 0x1f180>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sm8250-aggre2-noc";
reg = <0 0x01700000 0 0x33000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@1733000 {
compatible = "qcom,sm8250-compute-noc";
reg = <0 0x01733000 0 0xa180>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sm8250-mmss-noc";
reg = <0 0x01740000 0 0x1f080>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -2232,6 +2232,38 @@
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <8>;
+ qcom,num-ees = <2>;
+ iommus = <&apps_smmu 0x592 0x0000>,
+ <&apps_smmu 0x598 0x0000>,
+ <&apps_smmu 0x599 0x0000>,
+ <&apps_smmu 0x59f 0x0000>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x592 0x0000>,
+ <&apps_smmu 0x598 0x0000>,
+ <&apps_smmu 0x599 0x0000>,
+ <&apps_smmu 0x59f 0x0000>,
+ <&apps_smmu 0x586 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -3661,21 +3693,21 @@
dc_noc: interconnect@90c0000 {
compatible = "qcom,sm8250-dc-noc";
reg = <0 0x090c0000 0 0x4200>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9100000 {
compatible = "qcom,sm8250-gem-noc";
reg = <0 0x09100000 0 0xb4000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
npu_noc: interconnect@9990000 {
compatible = "qcom,sm8250-npu-noc";
reg = <0 0x09990000 0 0x1600>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -3718,6 +3750,10 @@
resets = <&gcc GCC_USB30_PRIM_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
@@ -3778,6 +3814,10 @@
resets = <&gcc GCC_USB30_SEC_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
@@ -3805,8 +3845,8 @@
<&videocc VIDEO_CC_MVS0_CLK>;
clock-names = "iface", "core", "vcodec0_core";
- interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
- <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_VENUS_CFG 0>,
+ <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "cpu-cfg", "video-mem";
iommus = <&apps_smmu 0x2100 0x0400>;
@@ -4090,10 +4130,10 @@
<&apps_smmu 0xc40 0x400>,
<&apps_smmu 0xc41 0x400>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>,
- <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "cam_ahb",
"cam_hf_0_mnoc",
"cam_sf_0_mnoc",
@@ -4150,8 +4190,8 @@
reg = <0 0x0ae00000 0 0x1000>;
reg-names = "mdss";
- interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "mdp0-mem", "mdp1-mem";
power-domains = <&dispcc MDSS_GDSC>;
@@ -4202,14 +4242,14 @@
port@0 {
reg = <0>;
dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
+ remote-endpoint = <&mdss_dsi0_in>;
};
};
port@1 {
reg = <1>;
dpu_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
+ remote-endpoint = <&mdss_dsi1_in>;
};
};
};
@@ -4239,7 +4279,7 @@
};
};
- dsi0: dsi@ae94000 {
+ mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sm8250-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
@@ -4262,12 +4302,12 @@
"bus";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SM8250_MMCX>;
- phys = <&dsi0_phy>;
+ phys = <&mdss_dsi0_phy>;
status = "disabled";
@@ -4280,14 +4320,14 @@
port@0 {
reg = <0>;
- dsi0_in: endpoint {
+ mdss_dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
- dsi0_out: endpoint {
+ mdss_dsi0_out: endpoint {
};
};
};
@@ -4312,7 +4352,7 @@
};
};
- dsi0_phy: phy@ae94400 {
+ mdss_dsi0_phy: phy@ae94400 {
compatible = "qcom,dsi-phy-7nm";
reg = <0 0x0ae94400 0 0x200>,
<0 0x0ae94600 0 0x280>,
@@ -4331,7 +4371,7 @@
status = "disabled";
};
- dsi1: dsi@ae96000 {
+ mdss_dsi1: dsi@ae96000 {
compatible = "qcom,sm8250-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae96000 0 0x400>;
@@ -4354,12 +4394,12 @@
"bus";
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
- assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
+ assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmhpd SM8250_MMCX>;
- phys = <&dsi1_phy>;
+ phys = <&mdss_dsi1_phy>;
status = "disabled";
@@ -4372,20 +4412,20 @@
port@0 {
reg = <0>;
- dsi1_in: endpoint {
+ mdss_dsi1_in: endpoint {
remote-endpoint = <&dpu_intf2_out>;
};
};
port@1 {
reg = <1>;
- dsi1_out: endpoint {
+ mdss_dsi1_out: endpoint {
};
};
};
};
- dsi1_phy: phy@ae96400 {
+ mdss_dsi1_phy: phy@ae96400 {
compatible = "qcom,dsi-phy-7nm";
reg = <0 0x0ae96400 0 0x200>,
<0 0x0ae96600 0 0x280>,
@@ -4411,10 +4451,10 @@
power-domains = <&rpmhpd SM8250_MMCX>;
required-opps = <&rpmhpd_opp_low_svs>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&dsi0_phy 0>,
- <&dsi0_phy 1>,
- <&dsi1_phy 0>,
- <&dsi1_phy 1>,
+ <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>,
+ <&mdss_dsi1_phy 0>,
+ <&mdss_dsi1_phy 1>,
<&dp_phy 0>,
<&dp_phy 1>;
clock-names = "bi_tcxo",
@@ -5254,7 +5294,7 @@
};
apps_smmu: iommu@15000000 {
- compatible = "qcom,sm8250-smmu-500", "arm,mmu-500";
+ compatible = "qcom,sm8250-smmu-500", "qcom,smmu-500", "arm,mmu-500";
reg = <0 0x15000000 0 0x100000>;
#iommu-cells = <2>;
#global-interrupts = <2>;
@@ -5639,7 +5679,7 @@
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
};
cpufreq_hw: cpufreq@18591000 {
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-05 15:30:33 +0300