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-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/compressed/Makefile2
-rw-r--r--arch/arm/common/sharpsl_pm.c19
-rw-r--r--arch/arm/include/asm/ftrace.h2
-rw-r--r--arch/arm/kernel/armksyms.c2
-rw-r--r--arch/arm/kernel/entry-common.S4
-rw-r--r--arch/arm/kernel/ftrace.c13
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c1
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-ep93xx/core.c6
-rw-r--r--arch/arm/mach-imx/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-ks8695/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-mx3/mx31ads.c2
-rw-r--r--arch/arm/mach-mx3/pcm037.c4
-rw-r--r--arch/arm/mach-ns9xxx/gpio.c2
-rw-r--r--arch/arm/mach-orion5x/gpio.c2
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/sharpsl.h1
-rw-r--r--arch/arm/mach-pxa/spitz.c12
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c4
-rw-r--r--arch/arm/mm/proc-xsc3.S2
-rw-r--r--arch/arm/plat-mxc/gpio.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/io.h20
-rw-r--r--arch/ia64/include/asm/iommu.h1
-rw-r--r--arch/ia64/include/asm/kvm_host.h6
-rw-r--r--arch/ia64/kernel/pci-dma.c7
-rw-r--r--arch/ia64/kvm/Makefile8
-rw-r--r--arch/ia64/kvm/kvm-ia64.c80
-rw-r--r--arch/ia64/kvm/kvm_fw.c9
-rw-r--r--arch/ia64/kvm/process.c2
-rw-r--r--arch/mips/Kconfig67
-rw-r--r--arch/mips/Makefile23
-rw-r--r--arch/mips/alchemy/common/platform.c98
-rw-r--r--arch/mips/alchemy/pb1200/platform.c81
-rw-r--r--arch/mips/configs/ip22_defconfig1
-rw-r--r--arch/mips/configs/ip27_defconfig1
-rw-r--r--arch/mips/configs/ip28_defconfig2
-rw-r--r--arch/mips/configs/pnx8335-stb225_defconfig1149
-rw-r--r--arch/mips/emma/Kconfig29
-rw-r--r--arch/mips/emma/common/Makefile (renamed from arch/mips/emma2rh/common/Makefile)2
-rw-r--r--arch/mips/emma/common/prom.c (renamed from arch/mips/emma2rh/common/prom.c)6
-rw-r--r--arch/mips/emma/markeins/Makefile (renamed from arch/mips/emma2rh/markeins/Makefile)2
-rw-r--r--arch/mips/emma/markeins/irq.c331
-rw-r--r--arch/mips/emma/markeins/led.c (renamed from arch/mips/emma2rh/markeins/led.c)2
-rw-r--r--arch/mips/emma/markeins/platform.c (renamed from arch/mips/emma2rh/markeins/platform.c)2
-rw-r--r--arch/mips/emma/markeins/setup.c (renamed from arch/mips/emma2rh/markeins/setup.c)2
-rw-r--r--arch/mips/emma2rh/common/irq.c105
-rw-r--r--arch/mips/emma2rh/common/irq_emma2rh.c106
-rw-r--r--arch/mips/emma2rh/markeins/irq.c132
-rw-r--r--arch/mips/emma2rh/markeins/irq_markeins.c158
-rw-r--r--arch/mips/include/asm/bitops.h114
-rw-r--r--arch/mips/include/asm/break.h1
-rw-r--r--arch/mips/include/asm/byteorder.h40
-rw-r--r--arch/mips/include/asm/cpu-features.h2
-rw-r--r--arch/mips/include/asm/ds1286.h15
-rw-r--r--arch/mips/include/asm/emma/emma2rh.h (renamed from arch/mips/include/asm/emma2rh/emma2rh.h)15
-rw-r--r--arch/mips/include/asm/emma/markeins.h (renamed from arch/mips/include/asm/emma2rh/markeins.h)0
-rw-r--r--arch/mips/include/asm/fpu_emulator.h17
-rw-r--r--arch/mips/include/asm/m48t35.h27
-rw-r--r--arch/mips/include/asm/mach-lemote/pci.h30
-rw-r--r--arch/mips/include/asm/mach-pnx833x/gpio.h172
-rw-r--r--arch/mips/include/asm/mach-pnx833x/irq-mapping.h126
-rw-r--r--arch/mips/include/asm/mach-pnx833x/irq.h53
-rw-r--r--arch/mips/include/asm/mach-pnx833x/pnx833x.h202
-rw-r--r--arch/mips/include/asm/mach-pnx833x/war.h25
-rw-r--r--arch/mips/include/asm/mach-tx49xx/mangle-port.h26
-rw-r--r--arch/mips/include/asm/mipsregs.h1
-rw-r--r--arch/mips/include/asm/module.h2
-rw-r--r--arch/mips/include/asm/ptrace.h17
-rw-r--r--arch/mips/include/asm/txx9/generic.h5
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/cpu-probe.c247
-rw-r--r--arch/mips/kernel/scall32-o32.S4
-rw-r--r--arch/mips/kernel/scall64-64.S2
-rw-r--r--arch/mips/kernel/setup.c4
-rw-r--r--arch/mips/kernel/smp.c12
-rw-r--r--arch/mips/kernel/traps.c29
-rw-r--r--arch/mips/kernel/unaligned.c20
-rw-r--r--arch/mips/lemote/lm2e/pci.c13
-rw-r--r--arch/mips/lemote/lm2e/setup.c11
-rw-r--r--arch/mips/lib/Makefile1
-rw-r--r--arch/mips/lib/dump_tlb.c1
-rw-r--r--arch/mips/math-emu/cp1emu.c12
-rw-r--r--arch/mips/math-emu/dsemul.c7
-rw-r--r--arch/mips/math-emu/dsemul.h17
-rw-r--r--arch/mips/mm/Makefile1
-rw-r--r--arch/mips/mm/dma-default.c2
-rw-r--r--arch/mips/nxp/pnx833x/common/Makefile3
-rw-r--r--arch/mips/nxp/pnx833x/common/interrupts.c380
-rw-r--r--arch/mips/nxp/pnx833x/common/platform.c319
-rw-r--r--arch/mips/nxp/pnx833x/common/prom.c70
-rw-r--r--arch/mips/nxp/pnx833x/common/reset.c45
-rw-r--r--arch/mips/nxp/pnx833x/common/setup.c64
-rw-r--r--arch/mips/nxp/pnx833x/stb22x/Makefile3
-rw-r--r--arch/mips/nxp/pnx833x/stb22x/board.c133
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-emma2rh.c2
-rw-r--r--arch/mips/pci/fixup-rc32434.c1
-rw-r--r--arch/mips/pci/ops-emma2rh.c2
-rw-r--r--arch/mips/pci/pci-emma2rh.c2
-rw-r--r--arch/mips/rb532/devices.c2
-rw-r--r--arch/mips/rb532/gpio.c4
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c17
-rw-r--r--arch/mips/txx9/Kconfig6
-rw-r--r--arch/mips/txx9/generic/7segled.c112
-rw-r--r--arch/mips/txx9/generic/Makefile1
-rw-r--r--arch/mips/txx9/generic/setup.c37
-rw-r--r--arch/mips/txx9/rbtx4927/setup.c25
-rw-r--r--arch/mips/txx9/rbtx4939/setup.c88
-rw-r--r--arch/powerpc/Kconfig3
-rw-r--r--arch/powerpc/Makefile2
-rw-r--r--arch/powerpc/include/asm/ftrace.h2
-rw-r--r--arch/powerpc/kernel/Makefile2
-rw-r--r--arch/powerpc/kernel/entry_32.S2
-rw-r--r--arch/powerpc/kernel/entry_64.S2
-rw-r--r--arch/powerpc/kernel/ftrace.c27
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c2
-rw-r--r--arch/powerpc/platforms/powermac/Makefile2
-rw-r--r--arch/s390/Kconfig16
-rw-r--r--arch/s390/appldata/appldata_base.c2
-rw-r--r--arch/s390/include/asm/kvm_virtio.h2
-rw-r--r--arch/s390/include/asm/mmu.h3
-rw-r--r--arch/s390/include/asm/mmu_context.h19
-rw-r--r--arch/s390/include/asm/pgtable.h8
-rw-r--r--arch/s390/include/asm/thread_info.h5
-rw-r--r--arch/s390/kernel/smp.c24
-rw-r--r--arch/s390/mm/pgtable.c16
-rw-r--r--arch/sh/Kconfig2
-rw-r--r--arch/sh/Makefile31
-rw-r--r--arch/sh/boot/compressed/Makefile_322
-rw-r--r--arch/sh/cchips/Kconfig33
-rw-r--r--arch/sh/cchips/hd6446x/Makefile1
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/Makefile6
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/gpio.c196
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/io.c211
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/setup.c181
-rw-r--r--arch/sh/configs/migor_defconfig35
-rw-r--r--arch/sh/configs/ul2_defconfig1169
-rw-r--r--arch/sh/include/asm/byteorder.h36
-rw-r--r--arch/sh/include/asm/hd64465/gpio.h46
-rw-r--r--arch/sh/include/asm/hd64465/hd64465.h256
-rw-r--r--arch/sh/include/asm/hd64465/io.h44
-rw-r--r--arch/sh/include/asm/serial.h17
-rw-r--r--arch/sh/include/cpu-sh4/cpu/rtc.h2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c28
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c34
-rw-r--r--arch/sh/kernel/entry-common.S4
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c13
-rw-r--r--arch/sh/mm/cache-sh2a.c8
-rw-r--r--arch/sh/oprofile/op_model_sh7750.c6
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/sparc/include/asm/byteorder.h22
-rw-r--r--arch/sparc/kernel/time.c27
-rw-r--r--arch/sparc64/Kconfig3
-rw-r--r--arch/sparc64/Kconfig.debug2
-rw-r--r--arch/sparc64/kernel/Makefile2
-rw-r--r--arch/sparc64/kernel/ftrace.c26
-rw-r--r--arch/sparc64/kernel/time.c34
-rw-r--r--arch/sparc64/lib/PeeCeeI.c139
-rw-r--r--arch/sparc64/lib/mcount.S4
-rw-r--r--arch/x86/Kconfig6
-rw-r--r--arch/x86/Kconfig.cpu24
-rw-r--r--arch/x86/boot/compressed/.gitignore2
-rw-r--r--arch/x86/include/asm/dma-mapping.h4
-rw-r--r--arch/x86/include/asm/es7000/wakecpu.h9
-rw-r--r--arch/x86/include/asm/ftrace.h4
-rw-r--r--arch/x86/include/asm/io.h6
-rw-r--r--arch/x86/include/asm/iommu.h1
-rw-r--r--arch/x86/include/asm/kvm_host.h3
-rw-r--r--arch/x86/include/asm/mach-default/mach_wakecpu.h9
-rw-r--r--arch/x86/include/asm/pgtable-3level.h4
-rw-r--r--arch/x86/include/asm/smp.h6
-rw-r--r--arch/x86/include/asm/uv/uv_hub.h1
-rw-r--r--arch/x86/kernel/Makefile3
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c2
-rw-r--r--arch/x86/kernel/cpu/common.c6
-rw-r--r--arch/x86/kernel/entry_32.S4
-rw-r--r--arch/x86/kernel/entry_64.S4
-rw-r--r--arch/x86/kernel/ftrace.c50
-rw-r--r--arch/x86/kernel/genx2apic_uv_x.c7
-rw-r--r--arch/x86/kernel/i386_ksyms_32.c2
-rw-r--r--arch/x86/kernel/k8.c1
-rw-r--r--arch/x86/kernel/machine_kexec_32.c5
-rw-r--r--arch/x86/kernel/microcode_amd.c2
-rw-r--r--arch/x86/kernel/microcode_core.c4
-rw-r--r--arch/x86/kernel/pci-dma.c16
-rw-r--r--arch/x86/kernel/pci-gart_64.c2
-rw-r--r--arch/x86/kernel/pci-swiotlb_64.c14
-rw-r--r--arch/x86/kernel/tsc.c2
-rw-r--r--arch/x86/kernel/vsmp_64.c2
-rw-r--r--arch/x86/kernel/x8664_ksyms_64.c2
-rw-r--r--arch/x86/kvm/i8254.c11
-rw-r--r--arch/x86/kvm/i8254.h1
-rw-r--r--arch/x86/kvm/mmu.c1
-rw-r--r--arch/x86/kvm/x86.c6
-rw-r--r--arch/x86/lguest/boot.c32
-rw-r--r--arch/x86/mach-voyager/voyager_smp.c12
-rw-r--r--arch/x86/mm/gup.c2
-rw-r--r--arch/x86/mm/init_64.c75
-rw-r--r--arch/x86/mm/ioremap.c22
-rw-r--r--arch/x86/mm/pat.c4
-rw-r--r--arch/x86/xen/Makefile2
-rw-r--r--arch/x86/xen/mmu.c18
204 files changed, 5812 insertions, 2463 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5021db2217ed..9722f8bb506c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -16,8 +16,7 @@ config ARM
select HAVE_ARCH_KGDB
select HAVE_KPROBES if (!XIP_KERNEL)
select HAVE_KRETPROBES if (HAVE_KPROBES)
- select HAVE_FTRACE if (!XIP_KERNEL)
- select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE)
+ select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
select HAVE_GENERIC_DMA_COHERENT
help
The ARM series is a line of low-power-consumption RISC chip designs
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 7a03f2007882..c47f2a3f8f8f 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -70,7 +70,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
head.o misc.o $(OBJS)
-ifeq ($(CONFIG_FTRACE),y)
+ifeq ($(CONFIG_FUNCTION_TRACER),y)
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c
index db8309161408..780bbf7cb26f 100644
--- a/arch/arm/common/sharpsl_pm.c
+++ b/arch/arm/common/sharpsl_pm.c
@@ -54,11 +54,13 @@
/*
* Prototypes
*/
+#ifdef CONFIG_PM
static int sharpsl_off_charge_battery(void);
-static int sharpsl_check_battery_temp(void);
static int sharpsl_check_battery_voltage(void);
-static int sharpsl_ac_check(void);
static int sharpsl_fatal_check(void);
+#endif
+static int sharpsl_check_battery_temp(void);
+static int sharpsl_ac_check(void);
static int sharpsl_average_value(int ad);
static void sharpsl_average_clear(void);
static void sharpsl_charge_toggle(struct work_struct *private_);
@@ -424,6 +426,7 @@ static int sharpsl_check_battery_temp(void)
return 0;
}
+#ifdef CONFIG_PM
static int sharpsl_check_battery_voltage(void)
{
int val, i, buff[5];
@@ -455,6 +458,7 @@ static int sharpsl_check_battery_voltage(void)
return 0;
}
+#endif
static int sharpsl_ac_check(void)
{
@@ -586,8 +590,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
return 0;
}
-#endif
-
/*
* Check for fatal battery errors
@@ -738,7 +740,10 @@ static int sharpsl_off_charge_battery(void)
}
}
}
-
+#else
+#define sharpsl_pm_suspend NULL
+#define sharpsl_pm_resume NULL
+#endif
static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
{
@@ -768,10 +773,12 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info)
info->battery_life = sharpsl_pm.battstat.mainbat_percent;
}
+#ifdef CONFIG_PM
static struct platform_suspend_ops sharpsl_pm_ops = {
.enter = corgi_pxa_pm_enter,
.valid = suspend_valid_only_mem,
};
+#endif
static int __init sharpsl_pm_probe(struct platform_device *pdev)
{
@@ -802,7 +809,9 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev)
apm_get_power_status = sharpsl_apm_get_power_status;
+#ifdef CONFIG_PM
suspend_set_ops(&sharpsl_pm_ops);
+#endif
mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h
index 584ef9a8e5a5..39c8bc1a006a 100644
--- a/arch/arm/include/asm/ftrace.h
+++ b/arch/arm/include/asm/ftrace.h
@@ -1,7 +1,7 @@
#ifndef _ASM_ARM_FTRACE
#define _ASM_ARM_FTRACE
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#define MCOUNT_ADDR ((long)(mcount))
#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 2357b1cf1cf9..c74f766ffc12 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -183,6 +183,6 @@ EXPORT_SYMBOL(_find_next_bit_be);
EXPORT_SYMBOL(copy_page);
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
EXPORT_SYMBOL(mcount);
#endif
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 3aa14dcc5bab..06269ea375c5 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -101,7 +101,7 @@ ENDPROC(ret_from_fork)
#undef CALL
#define CALL(x) .long x
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(mcount)
stmdb sp!, {r0-r3, lr}
@@ -149,7 +149,7 @@ trace:
ftrace_stub:
mov pc, lr
-#endif /* CONFIG_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
/*=============================================================================
* SWI handler
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index 76d50e6091bc..6c90479e8974 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -95,19 +95,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
return ret;
}
-int ftrace_mcount_set(unsigned long *data)
-{
- unsigned long pc, old;
- unsigned long *addr = data;
- unsigned char *new;
-
- pc = (unsigned long)&mcount_call;
- memcpy(&old, &mcount_call, MCOUNT_INSN_SIZE);
- new = ftrace_call_replace(pc, *addr);
- *addr = ftrace_modify_code(pc, (unsigned char *)&old, new);
- return 0;
-}
-
/* run from kstop_machine */
int __init ftrace_dyn_arch_init(void *data)
{
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 9c040c78889a..e263fda3e2d1 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -165,6 +165,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
{
I2C_BOARD_INFO("fm3130", 0x68),
+ }, {
I2C_BOARD_INFO("24c64", 0x50),
},
};
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 76d76e2fa69e..bffa6741a751 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -13,6 +13,7 @@
#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
#define __ASM_ARCH_AT91RM9200_GPIO_H
+#include <linux/kernel.h>
#include <asm/irq.h>
#define PIN_BASE NR_AIC_IRQS
@@ -220,6 +221,7 @@ static inline int gpio_request(unsigned gpio, const char *label)
static inline void gpio_free(unsigned gpio)
{
+ might_sleep();
}
extern int gpio_direction_input(unsigned gpio);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index de53f0be71b9..48345fb34613 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -26,6 +26,7 @@
#include <linux/serial_core.h>
#include <linux/device.h>
#include <linux/mm.h>
+#include <linux/dma-mapping.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/delay.h>
@@ -449,12 +450,13 @@ static struct resource ep93xx_ohci_resources[] = {
},
};
+
static struct platform_device ep93xx_ohci_device = {
.name = "ep93xx-ohci",
.id = -1,
.dev = {
- .dma_mask = (void *)0xffffffff,
- .coherent_dma_mask = 0xffffffff,
+ .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
.resource = ep93xx_ohci_resources,
diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h
index 6e3d795f2264..502d5aa2c093 100644
--- a/arch/arm/mach-imx/include/mach/gpio.h
+++ b/arch/arm/mach-imx/include/mach/gpio.h
@@ -1,5 +1,6 @@
#ifndef _IMX_GPIO_H
+#include <linux/kernel.h>
#include <mach/imx-regs.h>
#define IMX_GPIO_ALLOC_MODE_NORMAL 0
@@ -63,6 +64,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
static inline void gpio_free(unsigned gpio)
{
+ might_sleep();
+
imx_gpio_free(gpio);
}
diff --git a/arch/arm/mach-ixp4xx/include/mach/gpio.h b/arch/arm/mach-ixp4xx/include/mach/gpio.h
index 9fbde177920f..cd5aec26c072 100644
--- a/arch/arm/mach-ixp4xx/include/mach/gpio.h
+++ b/arch/arm/mach-ixp4xx/include/mach/gpio.h
@@ -25,6 +25,7 @@
#ifndef __ASM_ARCH_IXP4XX_GPIO_H
#define __ASM_ARCH_IXP4XX_GPIO_H
+#include <linux/kernel.h>
#include <mach/hardware.h>
static inline int gpio_request(unsigned gpio, const char *label)
@@ -34,6 +35,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
static inline void gpio_free(unsigned gpio)
{
+ might_sleep();
+
return;
}
diff --git a/arch/arm/mach-ks8695/include/mach/gpio.h b/arch/arm/mach-ks8695/include/mach/gpio.h
index 73c84168761c..d4af5c335f16 100644
--- a/arch/arm/mach-ks8695/include/mach/gpio.h
+++ b/arch/arm/mach-ks8695/include/mach/gpio.h
@@ -11,6 +11,8 @@
#ifndef __ASM_ARCH_GPIO_H_
#define __ASM_ARCH_GPIO_H_
+#include <linux/kernel.h>
+
#define KS8695_GPIO_0 0
#define KS8695_GPIO_1 1
#define KS8695_GPIO_2 2
@@ -74,6 +76,7 @@ static inline int gpio_request(unsigned int pin, const char *label)
static inline void gpio_free(unsigned int pin)
{
+ might_sleep();
}
#endif
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 1be4a390c63f..f902a7c37c31 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -35,6 +35,8 @@
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
+#include "devices.h"
+
/*!
* @file mx31ads.c
*
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 11fda95c86a5..843f68c8ead1 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -91,12 +91,12 @@ static struct map_desc pcm037_io_desc[] __initdata = {
.virtual = AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
.length = AIPS1_SIZE,
- .type = MT_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = AIPS2_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
.length = AIPS2_SIZE,
- .type = MT_DEVICE
+ .type = MT_DEVICE_NONSHARED
},
};
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
index 5241e6a286cc..5503ca09c4ae 100644
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ b/arch/arm/mach-ns9xxx/gpio.c
@@ -8,6 +8,7 @@
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
+#include <linux/kernel.h>
#include <linux/compiler.h>
#include <linux/init.h>
#include <linux/spinlock.h>
@@ -63,6 +64,7 @@ EXPORT_SYMBOL(gpio_request);
void gpio_free(unsigned gpio)
{
+ might_sleep();
clear_bit(gpio, gpiores);
return;
}
diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c
index fc419868e39f..f99d08811e5a 100644
--- a/arch/arm/mach-orion5x/gpio.c
+++ b/arch/arm/mach-orion5x/gpio.c
@@ -165,6 +165,8 @@ EXPORT_SYMBOL(gpio_request);
void gpio_free(unsigned pin)
{
+ might_sleep();
+
if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
pr_debug("%s: invalid GPIO %d\n", __func__, pin);
return;
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index eb7d6c94aa42..e35259032813 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -204,7 +204,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
.read_devdata = corgipm_read_devdata,
.charger_wakeup = corgi_charger_wakeup,
.should_wakeup = corgi_should_wakeup,
-#ifdef CONFIG_BACKLIGHT_CORGI
+#if defined(CONFIG_LCD_CORGI)
+ .backlight_limit = corgi_lcd_limit_intensity,
+#elif defined(CONFIG_BACKLIGHT_CORGI)
.backlight_limit = corgibl_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl.h b/arch/arm/mach-pxa/include/mach/sharpsl.h
index 3b1d4a72d4d1..8242e14a44fa 100644
--- a/arch/arm/mach-pxa/include/mach/sharpsl.h
+++ b/arch/arm/mach-pxa/include/mach/sharpsl.h
@@ -26,6 +26,7 @@ struct corgits_machinfo {
* SharpSL Backlight
*/
extern void corgibl_limit_intensity(int limit);
+extern void corgi_lcd_limit_intensity(int limit);
/*
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 524f656dc56d..f0a5bbae0b45 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -385,6 +385,16 @@ static void __init spitz_init_spi(void)
if (err)
goto err_free_2;
+ err = gpio_direction_output(SPITZ_GPIO_ADS7846_CS, 1);
+ if (err)
+ goto err_free_3;
+ err = gpio_direction_output(SPITZ_GPIO_LCDCON_CS, 1);
+ if (err)
+ goto err_free_3;
+ err = gpio_direction_output(SPITZ_GPIO_MAX1111_CS, 1);
+ if (err)
+ goto err_free_3;
+
if (machine_is_akita()) {
spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
@@ -394,6 +404,8 @@ static void __init spitz_init_spi(void)
spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
return;
+err_free_3:
+ gpio_free(SPITZ_GPIO_MAX1111_CS);
err_free_2:
gpio_free(SPITZ_GPIO_LCDCON_CS);
err_free_1:
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 53018db106ac..072e77cfe5a3 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -198,7 +198,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
.read_devdata = spitzpm_read_devdata,
.charger_wakeup = spitz_charger_wakeup,
.should_wakeup = spitz_should_wakeup,
-#ifdef CONFIG_BACKLIGHT_CORGI
+#if defined(CONFIG_LCD_CORGI)
+ .backlight_limit = corgi_lcd_limit_intensity,
+#elif defined(CONFIG_BACKLIGHT_CORGI)
.backlight_limit = corgibl_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 04dc8b65401b..8f6cf56c11c0 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -349,7 +349,7 @@ ENTRY(cpu_xsc3_switch_mm)
cpu_xsc3_mt_table:
.long 0x00 @ L_PTE_MT_UNCACHED
.long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
- .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
+ .long PTE_EXT_TEX(5) | PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
.long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
.long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
.long 0x00 @ unused
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 733e0acac916..de5c4747453f 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -188,7 +188,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
struct mxc_gpio_port *port =
container_of(chip, struct mxc_gpio_port, chip);
- return (__raw_readl(port->base + GPIO_DR) >> offset) & 1;
+ return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1;
}
static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index 65b6810124c1..5d4cb1196441 100644
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -14,6 +14,26 @@
/* Allow IO space to be anywhere in the memory */
#define IO_SPACE_LIMIT 0xffffffff
+#ifdef CONFIG_ARCH_MX3
+#define __arch_ioremap __mx3_ioremap
+#define __arch_iounmap __iounmap
+
+static inline void __iomem *
+__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
+{
+ if (mtype == MT_DEVICE) {
+ /* Access all peripherals below 0x80000000 as nonshared device
+ * but leave l2cc alone.
+ */
+ if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
+ (phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
+ mtype = MT_DEVICE_NONSHARED;
+ }
+
+ return __arm_ioremap(phys_addr, size, mtype);
+}
+#endif
+
/* io address mapping macro */
#define __io(a) ((void __iomem *)(a))
diff --git a/arch/ia64/include/asm/iommu.h b/arch/ia64/include/asm/iommu.h
index 5fb2bb93de3b..0490794fe4aa 100644
--- a/arch/ia64/include/asm/iommu.h
+++ b/arch/ia64/include/asm/iommu.h
@@ -11,6 +11,5 @@ extern int force_iommu, no_iommu;
extern int iommu_detected;
extern void iommu_dma_init(void);
extern void machvec_init(const char *name);
-extern int forbid_dac;
#endif
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index 85db124d37f6..c60d324da540 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -365,7 +365,8 @@ struct kvm_vcpu_arch {
long itc_offset;
unsigned long itc_check;
unsigned long timer_check;
- unsigned long timer_pending;
+ unsigned int timer_pending;
+ unsigned int timer_fired;
unsigned long vrr[8];
unsigned long ibr[8];
@@ -417,6 +418,9 @@ struct kvm_arch {
struct list_head assigned_dev_head;
struct dmar_domain *intel_iommu_domain;
struct hlist_head irq_ack_notifier_list;
+
+ unsigned long irq_sources_bitmap;
+ unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
};
union cpuid3_t {
diff --git a/arch/ia64/kernel/pci-dma.c b/arch/ia64/kernel/pci-dma.c
index 10a75b557650..031abbf9c875 100644
--- a/arch/ia64/kernel/pci-dma.c
+++ b/arch/ia64/kernel/pci-dma.c
@@ -89,13 +89,6 @@ int iommu_dma_supported(struct device *dev, u64 mask)
{
struct dma_mapping_ops *ops = get_dma_ops(dev);
-#ifdef CONFIG_PCI
- if (mask > 0xffffffff && forbid_dac > 0) {
- dev_info(dev, "Disallowing DAC for device\n");
- return 0;
- }
-#endif
-
if (ops->dma_supported_op)
return ops->dma_supported_op(dev, mask);
diff --git a/arch/ia64/kvm/Makefile b/arch/ia64/kvm/Makefile
index cf37f8f490c0..3ab4d6d50704 100644
--- a/arch/ia64/kvm/Makefile
+++ b/arch/ia64/kvm/Makefile
@@ -29,13 +29,18 @@ define cmd_offsets
echo ""; \
echo "#endif" ) > $@
endef
+
# We use internal rules to avoid the "is up to date" message from make
-arch/ia64/kvm/asm-offsets.s: arch/ia64/kvm/asm-offsets.c
+arch/ia64/kvm/asm-offsets.s: arch/ia64/kvm/asm-offsets.c \
+ $(wildcard $(srctree)/arch/ia64/include/asm/*.h)\
+ $(wildcard $(srctree)/include/linux/*.h)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/ia64/kvm/asm-offsets.s
$(call cmd,offsets)
+FORCE : $(obj)/$(offsets-file)
+
#
# Makefile for Kernel-based Virtual Machine module
#
@@ -53,7 +58,6 @@ endif
kvm-objs := $(common-objs) kvm-ia64.o kvm_fw.o
obj-$(CONFIG_KVM) += kvm.o
-FORCE : $(obj)/$(offsets-file)
EXTRA_CFLAGS_vcpu.o += -mfixed-range=f2-f5,f12-f127
kvm-intel-objs = vmm.o vmm_ivt.o trampoline.o vcpu.o optvfault.o mmio.o \
vtlb.o process.o
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index a312c9e9b9ef..3caac477de9e 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -385,6 +385,7 @@ static int handle_global_purge(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
struct kvm *kvm = vcpu->kvm;
struct call_data call_data;
int i;
+
call_data.ptc_g_data = p->u.ptc_g_data;
for (i = 0; i < KVM_MAX_VCPUS; i++) {
@@ -418,33 +419,41 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
ktime_t kt;
long itc_diff;
unsigned long vcpu_now_itc;
-
unsigned long expires;
struct hrtimer *p_ht = &vcpu->arch.hlt_timer;
unsigned long cyc_per_usec = local_cpu_data->cyc_per_usec;
struct vpd *vpd = to_host(vcpu->kvm, vcpu->arch.vpd);
- vcpu_now_itc = ia64_getreg(_IA64_REG_AR_ITC) + vcpu->arch.itc_offset;
+ if (irqchip_in_kernel(vcpu->kvm)) {
- if (time_after(vcpu_now_itc, vpd->itm)) {
- vcpu->arch.timer_check = 1;
- return 1;
- }
- itc_diff = vpd->itm - vcpu_now_itc;
- if (itc_diff < 0)
- itc_diff = -itc_diff;
+ vcpu_now_itc = ia64_getreg(_IA64_REG_AR_ITC) + vcpu->arch.itc_offset;
- expires = div64_u64(itc_diff, cyc_per_usec);
- kt = ktime_set(0, 1000 * expires);
- vcpu->arch.ht_active = 1;
- hrtimer_start(p_ht, kt, HRTIMER_MODE_ABS);
+ if (time_after(vcpu_now_itc, vpd->itm)) {
+ vcpu->arch.timer_check = 1;
+ return 1;
+ }
+ itc_diff = vpd->itm - vcpu_now_itc;
+ if (itc_diff < 0)
+ itc_diff = -itc_diff;
+
+ expires = div64_u64(itc_diff, cyc_per_usec);
+ kt = ktime_set(0, 1000 * expires);
+
+ down_read(&vcpu->kvm->slots_lock);
+ vcpu->arch.ht_active = 1;
+ hrtimer_start(p_ht, kt, HRTIMER_MODE_ABS);
- if (irqchip_in_kernel(vcpu->kvm)) {
vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
kvm_vcpu_block(vcpu);
hrtimer_cancel(p_ht);
vcpu->arch.ht_active = 0;
+ if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
+ if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
+ vcpu->arch.mp_state =
+ KVM_MP_STATE_RUNNABLE;
+ up_read(&vcpu->kvm->slots_lock);
+
if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
return -EINTR;
return 1;
@@ -484,10 +493,6 @@ static int (*kvm_vti_exit_handlers[])(struct kvm_vcpu *vcpu,
static const int kvm_vti_max_exit_handlers =
sizeof(kvm_vti_exit_handlers)/sizeof(*kvm_vti_exit_handlers);
-static void kvm_prepare_guest_switch(struct kvm_vcpu *vcpu)
-{
-}
-
static uint32_t kvm_get_exit_reason(struct kvm_vcpu *vcpu)
{
struct exit_ctl_data *p_exit_data;
@@ -600,8 +605,6 @@ static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
again:
preempt_disable();
-
- kvm_prepare_guest_switch(vcpu);
local_irq_disable();
if (signal_pending(current)) {
@@ -614,7 +617,7 @@ again:
vcpu->guest_mode = 1;
kvm_guest_enter();
-
+ down_read(&vcpu->kvm->slots_lock);
r = vti_vcpu_run(vcpu, kvm_run);
if (r < 0) {
local_irq_enable();
@@ -634,9 +637,8 @@ again:
* But we need to prevent reordering, hence this barrier():
*/
barrier();
-
kvm_guest_exit();
-
+ up_read(&vcpu->kvm->slots_lock);
preempt_enable();
r = kvm_handle_exit(kvm_run, vcpu);
@@ -673,6 +675,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
kvm_vcpu_block(vcpu);
+ clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
vcpu_put(vcpu);
return -EAGAIN;
}
@@ -778,6 +781,9 @@ static void kvm_init_vm(struct kvm *kvm)
kvm_build_io_pmt(kvm);
INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
+
+ /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
+ set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
}
struct kvm *kvm_arch_create_vm(void)
@@ -941,9 +947,8 @@ long kvm_arch_vm_ioctl(struct file *filp,
goto out;
if (irqchip_in_kernel(kvm)) {
mutex_lock(&kvm->lock);
- kvm_ioapic_set_irq(kvm->arch.vioapic,
- irq_event.irq,
- irq_event.level);
+ kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
+ irq_event.irq, irq_event.level);
mutex_unlock(&kvm->lock);
r = 0;
}
@@ -1123,15 +1128,16 @@ static enum hrtimer_restart hlt_timer_fn(struct hrtimer *data)
wait_queue_head_t *q;
vcpu = container_of(data, struct kvm_vcpu, arch.hlt_timer);
+ q = &vcpu->wq;
+
if (vcpu->arch.mp_state != KVM_MP_STATE_HALTED)
goto out;
- q = &vcpu->wq;
- if (waitqueue_active(q)) {
- vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
+ if (waitqueue_active(q))
wake_up_interruptible(q);
- }
+
out:
+ vcpu->arch.timer_fired = 1;
vcpu->arch.timer_check = 1;
return HRTIMER_NORESTART;
}
@@ -1700,12 +1706,14 @@ static void vcpu_kick_intr(void *info)
void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
{
int ipi_pcpu = vcpu->cpu;
+ int cpu = get_cpu();
if (waitqueue_active(&vcpu->wq))
wake_up_interruptible(&vcpu->wq);
- if (vcpu->guest_mode)
+ if (vcpu->guest_mode && cpu != ipi_pcpu)
smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
+ put_cpu();
}
int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
@@ -1715,13 +1723,7 @@ int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
if (!test_and_set_bit(vec, &vpd->irr[0])) {
vcpu->arch.irq_new_pending = 1;
- if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
- kvm_vcpu_kick(vcpu);
- else if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED) {
- vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
- if (waitqueue_active(&vcpu->wq))
- wake_up_interruptible(&vcpu->wq);
- }
+ kvm_vcpu_kick(vcpu);
return 1;
}
return 0;
@@ -1791,7 +1793,7 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu)
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
{
- return 0;
+ return vcpu->arch.timer_fired;
}
gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
diff --git a/arch/ia64/kvm/kvm_fw.c b/arch/ia64/kvm/kvm_fw.c
index 0c69d9ec92d4..cb7600bdff9d 100644
--- a/arch/ia64/kvm/kvm_fw.c
+++ b/arch/ia64/kvm/kvm_fw.c
@@ -286,6 +286,12 @@ static u64 kvm_get_pal_call_index(struct kvm_vcpu *vcpu)
return index;
}
+static void prepare_for_halt(struct kvm_vcpu *vcpu)
+{
+ vcpu->arch.timer_pending = 1;
+ vcpu->arch.timer_fired = 0;
+}
+
int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
@@ -304,11 +310,10 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
break;
case PAL_HALT_LIGHT:
{
- vcpu->arch.timer_pending = 1;
INIT_PAL_STATUS_SUCCESS(result);
+ prepare_for_halt(vcpu);
if (kvm_highest_pending_irq(vcpu) == -1)
ret = kvm_emulate_halt(vcpu);
-
}
break;
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index 3417783ae164..800817307b7b 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -713,7 +713,7 @@ void leave_hypervisor_tail(void)
if (!(VCPU(v, itv) & (1 << 16))) {
vcpu_pend_interrupt(v, VCPU(v, itv)
& 0xff);
- VMX(v, itc_check) = 0;
+ VMX(v, itc_check) = 0;
} else {
v->arch.timer_pending = 1;
}
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5f149b030c0f..f4af967a6b30 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -238,21 +238,8 @@ config MIPS_SIM
This option enables support for MIPS Technologies MIPSsim software
emulator.
-config MARKEINS
- bool "NEC EMMA2RH Mark-eins"
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select IRQ_CPU
- select SWAP_IO_SPACE
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_CPU_R5000
- help
- This enables support for the R5432-based NEC Mark-eins
- boards with R5500 CPU.
+config MACH_EMMA
+ bool "NEC EMMA series based machines"
config MACH_VR41XX
bool "NEC VR4100 series based machines"
@@ -261,6 +248,19 @@ config MACH_VR41XX
select SYS_HAS_CPU_VR41XX
select GENERIC_HARDIRQS_NO__DO_IRQ
+config NXP_STB220
+ bool "NXP STB220 board"
+ select SOC_PNX833X
+ help
+ Support for NXP Semiconductors STB220 Development Board.
+
+config NXP_STB225
+ bool "NXP 225 board"
+ select SOC_PNX833X
+ select SOC_PNX8335
+ help
+ Support for NXP Semiconductors STB225 Development Board.
+
config PNX8550_JBS
bool "NXP PNX8550 based JBS board"
select PNX8550
@@ -327,7 +327,6 @@ config SGI_IP22
select IP22_CPU_SCACHE
select IRQ_CPU
select GENERIC_ISA_DMA_SUPPORT_BROKEN
- select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
select SGI_HAS_HAL2
@@ -382,7 +381,6 @@ config SGI_IP28
select HW_HAS_EISA
select I8253
select I8259
- select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
select SGI_HAS_HAL2
@@ -601,6 +599,7 @@ endchoice
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
+source "arch/mips/emma/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
@@ -849,6 +848,24 @@ config MIPS_RM9122
bool
select SERIAL_RM9000
+config SOC_PNX833X
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select IRQ_CPU
+ select DMA_NONCOHERENT
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GENERIC_GPIO
+ select CPU_MIPSR2_IRQ_VI
+
+config SOC_PNX8335
+ bool
+ select SOC_PNX833X
+
config PNX8550
bool
select SOC_PNX8550
@@ -874,9 +891,6 @@ config EMMA2RH
config SERIAL_RM9000
bool
-config SGI_HAS_DS1286
- bool
-
config SGI_HAS_INDYDOG
bool
@@ -1092,6 +1106,16 @@ config CPU_R5432
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
+config CPU_R5500
+ bool "R5500"
+ depends on SYS_HAS_CPU_R5500
+ select CPU_HAS_LLSC
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_64BIT_KERNEL
+ help
+ NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
+ instruction set.
+
config CPU_R6000
bool "R6000"
depends on EXPERIMENTAL
@@ -1202,6 +1226,9 @@ config SYS_HAS_CPU_R5000
config SYS_HAS_CPU_R5432
bool
+config SYS_HAS_CPU_R5500
+ bool
+
config SYS_HAS_CPU_R6000
bool
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 7f39fd8a91fe..28c55f608913 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -131,6 +131,8 @@ cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_
cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
-Wa,--trap
+cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \
+ -Wa,--trap
cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
-Wa,--trap
cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
@@ -381,6 +383,14 @@ load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
#
load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
+# NXP STB225
+core-$(CONFIG_SOC_PNX833X) += arch/mips/nxp/pnx833x/common/
+cflags-$(CONFIG_SOC_PNX833X) += -Iarch/mips/include/asm/mach-pnx833x
+libs-$(CONFIG_NXP_STB220) += arch/mips/nxp/pnx833x/stb22x/
+load-$(CONFIG_NXP_STB220) += 0xffffffff80001000
+libs-$(CONFIG_NXP_STB225) += arch/mips/nxp/pnx833x/stb22x/
+load-$(CONFIG_NXP_STB225) += 0xffffffff80001000
+
#
# Common NXP PNX8550
#
@@ -399,14 +409,17 @@ load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
libs-$(CONFIG_PNX8550_STB810) += arch/mips/nxp/pnx8550/stb810/
load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
-# NEC EMMA2RH boards
#
-core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
-cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
+# Common NEC EMMAXXX
+#
+core-$(CONFIG_SOC_EMMA) += arch/mips/emma/common/
+cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
+#
# NEC EMMA2RH Mark-eins
-core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
-load-$(CONFIG_MARKEINS) += 0xffffffff88100000
+#
+core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
+load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
#
# SGI IP22 (Indy/Indigo2)
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index dc8a67efac28..5c76c6448e04 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -17,6 +17,8 @@
#include <linux/init.h>
#include <asm/mach-au1x00/au1xxx.h>
+#include <asm/mach-au1x00/au1xxx_dbdma.h>
+#include <asm/mach-au1x00/au1100_mmc.h>
#define PORT(_base, _irq) \
{ \
@@ -163,24 +165,6 @@ static struct resource au1xxx_usb_gdt_resources[] = {
},
};
-static struct resource au1xxx_mmc_resources[] = {
- [0] = {
- .start = SD0_PHYS_ADDR,
- .end = SD0_PHYS_ADDR + 0x7ffff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = SD1_PHYS_ADDR,
- .end = SD1_PHYS_ADDR + 0x7ffff,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .start = AU1200_SD_INT,
- .end = AU1200_SD_INT,
- .flags = IORESOURCE_IRQ,
- }
-};
-
static u64 udc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_gdt_device = {
@@ -249,16 +233,79 @@ static struct platform_device au1200_lcd_device = {
static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
-static struct platform_device au1xxx_mmc_device = {
+extern struct au1xmmc_platform_data au1xmmc_platdata[2];
+
+static struct resource au1200_mmc0_resources[] = {
+ [0] = {
+ .start = SD0_PHYS_ADDR,
+ .end = SD0_PHYS_ADDR + 0x7ffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AU1200_SD_INT,
+ .end = AU1200_SD_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = DSCR_CMD0_SDMS_TX0,
+ .end = DSCR_CMD0_SDMS_TX0,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = DSCR_CMD0_SDMS_RX0,
+ .end = DSCR_CMD0_SDMS_RX0,
+ .flags = IORESOURCE_DMA,
+ }
+};
+
+static struct platform_device au1200_mmc0_device = {
.name = "au1xxx-mmc",
.id = 0,
.dev = {
- .dma_mask = &au1xxx_mmc_dmamask,
- .coherent_dma_mask = DMA_32BIT_MASK,
+ .dma_mask = &au1xxx_mmc_dmamask,
+ .coherent_dma_mask = DMA_32BIT_MASK,
+ .platform_data = &au1xmmc_platdata[0],
},
- .num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
- .resource = au1xxx_mmc_resources,
+ .num_resources = ARRAY_SIZE(au1200_mmc0_resources),
+ .resource = au1200_mmc0_resources,
};
+
+#ifndef CONFIG_MIPS_DB1200
+static struct resource au1200_mmc1_resources[] = {
+ [0] = {
+ .start = SD1_PHYS_ADDR,
+ .end = SD1_PHYS_ADDR + 0x7ffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AU1200_SD_INT,
+ .end = AU1200_SD_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = DSCR_CMD0_SDMS_TX1,
+ .end = DSCR_CMD0_SDMS_TX1,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = DSCR_CMD0_SDMS_RX1,
+ .end = DSCR_CMD0_SDMS_RX1,
+ .flags = IORESOURCE_DMA,
+ }
+};
+
+static struct platform_device au1200_mmc1_device = {
+ .name = "au1xxx-mmc",
+ .id = 1,
+ .dev = {
+ .dma_mask = &au1xxx_mmc_dmamask,
+ .coherent_dma_mask = DMA_32BIT_MASK,
+ .platform_data = &au1xmmc_platdata[1],
+ },
+ .num_resources = ARRAY_SIZE(au1200_mmc1_resources),
+ .resource = au1200_mmc1_resources,
+};
+#endif /* #ifndef CONFIG_MIPS_DB1200 */
#endif /* #ifdef CONFIG_SOC_AU1200 */
static struct platform_device au1x00_pcmcia_device = {
@@ -296,7 +343,10 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
&au1xxx_usb_gdt_device,
&au1xxx_usb_otg_device,
&au1200_lcd_device,
- &au1xxx_mmc_device,
+ &au1200_mmc0_device,
+#ifndef CONFIG_MIPS_DB1200
+ &au1200_mmc1_device,
+#endif
#endif
#ifdef SMBUS_PSC_BASE
&pbdb_smbus_device,
diff --git a/arch/mips/alchemy/pb1200/platform.c b/arch/mips/alchemy/pb1200/platform.c
index f8fb0aeac571..95303297c534 100644
--- a/arch/mips/alchemy/pb1200/platform.c
+++ b/arch/mips/alchemy/pb1200/platform.c
@@ -20,9 +20,90 @@
#include <linux/dma-mapping.h>
#include <linux/init.h>
+#include <linux/leds.h>
#include <linux/platform_device.h>
#include <asm/mach-au1x00/au1xxx.h>
+#include <asm/mach-au1x00/au1100_mmc.h>
+
+static int mmc_activity;
+
+static void pb1200mmc0_set_power(void *mmc_host, int state)
+{
+ if (state)
+ bcsr->board |= BCSR_BOARD_SD0PWR;
+ else
+ bcsr->board &= ~BCSR_BOARD_SD0PWR;
+
+ au_sync_delay(1);
+}
+
+static int pb1200mmc0_card_readonly(void *mmc_host)
+{
+ return (bcsr->status & BCSR_STATUS_SD0WP) ? 1 : 0;
+}
+
+static int pb1200mmc0_card_inserted(void *mmc_host)
+{
+ return (bcsr->sig_status & BCSR_INT_SD0INSERT) ? 1 : 0;
+}
+
+static void pb1200_mmcled_set(struct led_classdev *led,
+ enum led_brightness brightness)
+{
+ if (brightness != LED_OFF) {
+ if (++mmc_activity == 1)
+ bcsr->disk_leds &= ~(1 << 8);
+ } else {
+ if (--mmc_activity == 0)
+ bcsr->disk_leds |= (1 << 8);
+ }
+}
+
+static struct led_classdev pb1200mmc_led = {
+ .brightness_set = pb1200_mmcled_set,
+};
+
+#ifndef CONFIG_MIPS_DB1200
+static void pb1200mmc1_set_power(void *mmc_host, int state)
+{
+ if (state)
+ bcsr->board |= BCSR_BOARD_SD1PWR;
+ else
+ bcsr->board &= ~BCSR_BOARD_SD1PWR;
+
+ au_sync_delay(1);
+}
+
+static int pb1200mmc1_card_readonly(void *mmc_host)
+{
+ return (bcsr->status & BCSR_STATUS_SD1WP) ? 1 : 0;
+}
+
+static int pb1200mmc1_card_inserted(void *mmc_host)
+{
+ return (bcsr->sig_status & BCSR_INT_SD1INSERT) ? 1 : 0;
+}
+#endif
+
+const struct au1xmmc_platform_data au1xmmc_platdata[2] = {
+ [0] = {
+ .set_power = pb1200mmc0_set_power,
+ .card_inserted = pb1200mmc0_card_inserted,
+ .card_readonly = pb1200mmc0_card_readonly,
+ .cd_setup = NULL, /* use poll-timer in driver */
+ .led = &pb1200mmc_led,
+ },
+#ifndef CONFIG_MIPS_DB1200
+ [1] = {
+ .set_power = pb1200mmc1_set_power,
+ .card_inserted = pb1200mmc1_card_inserted,
+ .card_readonly = pb1200mmc1_card_readonly,
+ .cd_setup = NULL, /* use poll-timer in driver */
+ .led = &pb1200mmc_led,
+ },
+#endif
+};
static struct resource ide_resources[] = {
[0] = {
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index cc8e6bf2b245..f719bf5e01aa 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -771,7 +771,6 @@ CONFIG_WATCHDOG=y
CONFIG_INDYDOG=m
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
-CONFIG_SGI_DS1286=m
# CONFIG_R3964 is not set
CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 831d3e5a1ea6..34ea319be94c 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -701,7 +701,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_WATCHDOG is not set
CONFIG_HW_RANDOM=m
# CONFIG_RTC is not set
-CONFIG_SGI_IP27_RTC=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig
index 822b01f643e3..70a744e9a8c5 100644
--- a/arch/mips/configs/ip28_defconfig
+++ b/arch/mips/configs/ip28_defconfig
@@ -70,7 +70,6 @@ CONFIG_CPU_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
-CONFIG_SGI_HAS_DS1286=y
CONFIG_SGI_HAS_INDYDOG=y
CONFIG_SGI_HAS_SEEQ=y
CONFIG_SGI_HAS_WD93=y
@@ -585,7 +584,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
-CONFIG_SGI_DS1286=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
diff --git a/arch/mips/configs/pnx8335-stb225_defconfig b/arch/mips/configs/pnx8335-stb225_defconfig
new file mode 100644
index 000000000000..d9536522cff5
--- /dev/null
+++ b/arch/mips/configs/pnx8335-stb225_defconfig
@@ -0,0 +1,1149 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26
+# Sat Jul 26 09:02:59 2008
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_LEMOTE_FULONG is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+CONFIG_NXP_STB225=y
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_WR_PPMC is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+# CONFIG_HOTPLUG_CPU is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_SOC_PNX833X=y
+CONFIG_SOC_PNX8335=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+# CONFIG_CPU_LOONGSON2 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPSR2=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_MIPSR2_IRQ_VI=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_128=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=128
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_PCSPKR_PLATFORM=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_KPROBES is not set
+# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_MMU=y
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+CONFIG_INET_AH=y
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+# CONFIG_MTD_CFI_NOSWAP is not set
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_LE_BYTE_SWAP=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x18000000
+CONFIG_MTD_PHYSMAP_LEN=0x04000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_DM9000 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PNX8XXX=y
+CONFIG_SERIAL_PNX8XXX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_DVB_CORE=y
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_DVB_CAPTURE_DRIVERS=y
+# CONFIG_TTPCI_EEPROM is not set
+# CONFIG_DVB_B2C2_FLEXCOP is not set
+
+#
+# Supported DVB Frontends
+#
+
+#
+# Customise DVB Frontends
+#
+# CONFIG_DVB_FE_CUSTOMISE is not set
+
+#
+# DVB-S (satellite) frontends
+#
+# CONFIG_DVB_CX24110 is not set
+# CONFIG_DVB_CX24123 is not set
+# CONFIG_DVB_MT312 is not set
+# CONFIG_DVB_S5H1420 is not set
+# CONFIG_DVB_STV0299 is not set
+# CONFIG_DVB_TDA8083 is not set
+# CONFIG_DVB_TDA10086 is not set
+# CONFIG_DVB_VES1X93 is not set
+# CONFIG_DVB_TUNER_ITD1000 is not set
+# CONFIG_DVB_TDA826X is not set
+# CONFIG_DVB_TUA6100 is not set
+
+#
+# DVB-T (terrestrial) frontends
+#
+# CONFIG_DVB_SP8870 is not set
+# CONFIG_DVB_SP887X is not set
+# CONFIG_DVB_CX22700 is not set
+# CONFIG_DVB_CX22702 is not set
+# CONFIG_DVB_DRX397XD is not set
+# CONFIG_DVB_L64781 is not set
+CONFIG_DVB_TDA1004X=y
+# CONFIG_DVB_NXT6000 is not set
+# CONFIG_DVB_MT352 is not set
+# CONFIG_DVB_ZL10353 is not set
+# CONFIG_DVB_DIB3000MB is not set
+# CONFIG_DVB_DIB3000MC is not set
+# CONFIG_DVB_DIB7000M is not set
+# CONFIG_DVB_DIB7000P is not set
+# CONFIG_DVB_TDA10048 is not set
+
+#
+# DVB-C (cable) frontends
+#
+# CONFIG_DVB_VES1820 is not set
+# CONFIG_DVB_TDA10021 is not set
+# CONFIG_DVB_TDA10023 is not set
+# CONFIG_DVB_STV0297 is not set
+
+#
+# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
+#
+# CONFIG_DVB_NXT200X is not set
+# CONFIG_DVB_OR51211 is not set
+# CONFIG_DVB_OR51132 is not set
+# CONFIG_DVB_BCM3510 is not set
+# CONFIG_DVB_LGDT330X is not set
+# CONFIG_DVB_S5H1409 is not set
+# CONFIG_DVB_AU8522 is not set
+# CONFIG_DVB_S5H1411 is not set
+
+#
+# Digital terrestrial only tuners/PLL
+#
+# CONFIG_DVB_PLL is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+
+#
+# SEC control devices for DVB-S
+#
+# CONFIG_DVB_LNBP21 is not set
+# CONFIG_DVB_ISL6405 is not set
+# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_CFB_FILLRECT is not set
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+# CONFIG_LOGO is not set
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_SEQUENCER=m
+# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+CONFIG_SND_VERBOSE_PRINTK=y
+CONFIG_SND_DEBUG=y
+# CONFIG_SND_DEBUG_VERBOSE is not set
+# CONFIG_SND_PCM_XRUN_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_MIPS=y
+# CONFIG_SND_SOC is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=m
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=m
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=m
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_KERNEL_TESTS is not set
+CONFIG_CMDLINE=""
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_PRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/mips/emma/Kconfig b/arch/mips/emma/Kconfig
new file mode 100644
index 000000000000..9669c72123c9
--- /dev/null
+++ b/arch/mips/emma/Kconfig
@@ -0,0 +1,29 @@
+choice
+ prompt "Machine type"
+ depends on MACH_EMMA
+ default NEC_MARKEINS
+
+config NEC_MARKEINS
+ bool "NEC EMMA2RH Mark-eins board"
+ select SOC_EMMA2RH
+ select HW_HAS_PCI
+ help
+ This enables support for the NEC Electronics Mark-eins boards.
+
+endchoice
+
+config SOC_EMMA2RH
+ bool
+ select SOC_EMMA
+ select SYS_HAS_CPU_R5500
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+
+config SOC_EMMA
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SWAP_IO_SPACE
+ select SYS_SUPPORTS_BIG_ENDIAN
diff --git a/arch/mips/emma2rh/common/Makefile b/arch/mips/emma/common/Makefile
index 859121b3867d..c392d28c1ef1 100644
--- a/arch/mips/emma2rh/common/Makefile
+++ b/arch/mips/emma/common/Makefile
@@ -10,4 +10,4 @@
# (at your option) any later version.
#
-obj-$(CONFIG_MARKEINS) += irq.o irq_emma2rh.o prom.o
+obj-$(CONFIG_NEC_MARKEINS) += prom.o
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma/common/prom.c
index e14a2e3d8842..120f53fbdb45 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma/common/prom.c
@@ -29,11 +29,11 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
const char *get_system_type(void)
{
-#if defined(CONFIG_MARKEINS)
+#ifdef CONFIG_NEC_MARKEINS
return "NEC EMMA2RH Mark-eins";
#else
#error Unknown NEC board
@@ -60,7 +60,7 @@ void __init prom_init(void)
strcat(arcs_cmdline, " ");
}
-#if defined(CONFIG_MARKEINS)
+#ifdef CONFIG_NEC_MARKEINS
add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
#else
#error Unknown NEC board
diff --git a/arch/mips/emma2rh/markeins/Makefile b/arch/mips/emma/markeins/Makefile
index 14fc268b175c..16e0017ba919 100644
--- a/arch/mips/emma2rh/markeins/Makefile
+++ b/arch/mips/emma/markeins/Makefile
@@ -10,4 +10,4 @@
# (at your option) any later version.
#
-obj-$(CONFIG_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
+obj-$(CONFIG_NEC_MARKEINS) += irq.o setup.o led.o platform.o
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
new file mode 100644
index 000000000000..c2583ecc93cf
--- /dev/null
+++ b/arch/mips/emma/markeins/irq.c
@@ -0,0 +1,331 @@
+/*
+ * arch/mips/emma2rh/markeins/irq.c
+ * This file defines the irq handler for EMMA2RH.
+ *
+ * Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/delay.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/system.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+
+#include <asm/emma/emma2rh.h>
+
+static void emma2rh_irq_enable(unsigned int irq)
+{
+ u32 reg_value;
+ u32 reg_bitmask;
+ u32 reg_index;
+
+ irq -= EMMA2RH_IRQ_BASE;
+
+ reg_index = EMMA2RH_BHIF_INT_EN_0 +
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
+ reg_value = emma2rh_in32(reg_index);
+ reg_bitmask = 0x1 << (irq % 32);
+ emma2rh_out32(reg_index, reg_value | reg_bitmask);
+}
+
+static void emma2rh_irq_disable(unsigned int irq)
+{
+ u32 reg_value;
+ u32 reg_bitmask;
+ u32 reg_index;
+
+ irq -= EMMA2RH_IRQ_BASE;
+
+ reg_index = EMMA2RH_BHIF_INT_EN_0 +
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
+ reg_value = emma2rh_in32(reg_index);
+ reg_bitmask = 0x1 << (irq % 32);
+ emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
+}
+
+struct irq_chip emma2rh_irq_controller = {
+ .name = "emma2rh_irq",
+ .ack = emma2rh_irq_disable,
+ .mask = emma2rh_irq_disable,
+ .mask_ack = emma2rh_irq_disable,
+ .unmask = emma2rh_irq_enable,
+};
+
+void emma2rh_irq_init(void)
+{
+ u32 i;
+
+ for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
+ set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i,
+ &emma2rh_irq_controller,
+ handle_level_irq);
+}
+
+static void emma2rh_sw_irq_enable(unsigned int irq)
+{
+ u32 reg;
+
+ irq -= EMMA2RH_SW_IRQ_BASE;
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+
+static void emma2rh_sw_irq_disable(unsigned int irq)
+{
+ u32 reg;
+
+ irq -= EMMA2RH_SW_IRQ_BASE;
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+
+struct irq_chip emma2rh_sw_irq_controller = {
+ .name = "emma2rh_sw_irq",
+ .ack = emma2rh_sw_irq_disable,
+ .mask = emma2rh_sw_irq_disable,
+ .mask_ack = emma2rh_sw_irq_disable,
+ .unmask = emma2rh_sw_irq_enable,
+};
+
+void emma2rh_sw_irq_init(void)
+{
+ u32 i;
+
+ for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
+ set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i,
+ &emma2rh_sw_irq_controller,
+ handle_level_irq);
+}
+
+static void emma2rh_gpio_irq_enable(unsigned int irq)
+{
+ u32 reg;
+
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+
+static void emma2rh_gpio_irq_disable(unsigned int irq)
+{
+ u32 reg;
+
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+
+static void emma2rh_gpio_irq_ack(unsigned int irq)
+{
+ u32 reg;
+
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+ emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+
+static void emma2rh_gpio_irq_end(unsigned int irq)
+{
+ u32 reg;
+
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+ }
+}
+
+struct irq_chip emma2rh_gpio_irq_controller = {
+ .name = "emma2rh_gpio_irq",
+ .ack = emma2rh_gpio_irq_ack,
+ .mask = emma2rh_gpio_irq_disable,
+ .mask_ack = emma2rh_gpio_irq_ack,
+ .unmask = emma2rh_gpio_irq_enable,
+ .end = emma2rh_gpio_irq_end,
+};
+
+void emma2rh_gpio_irq_init(void)
+{
+ u32 i;
+
+ for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
+ set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
+ &emma2rh_gpio_irq_controller);
+}
+
+static struct irqaction irq_cascade = {
+ .handler = no_action,
+ .flags = 0,
+ .mask = CPU_MASK_NONE,
+ .name = "cascade",
+ .dev_id = NULL,
+ .next = NULL,
+};
+
+/*
+ * the first level int-handler will jump here if it is a emma2rh irq
+ */
+void emma2rh_irq_dispatch(void)
+{
+ u32 intStatus;
+ u32 bitmask;
+ u32 i;
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) &
+ emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
+
+#ifdef EMMA2RH_SW_CASCADE
+ if (intStatus &
+ (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+ u32 swIntStatus;
+ swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
+ & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (swIntStatus & bitmask) {
+ do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
+ return;
+ }
+ }
+ }
+#endif
+
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) &
+ emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
+
+#ifdef EMMA2RH_GPIO_CASCADE
+ if (intStatus &
+ (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+ u32 gpioIntStatus;
+ gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
+ & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (gpioIntStatus & bitmask) {
+ do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
+ return;
+ }
+ }
+ }
+#endif
+
+ for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) &
+ emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
+
+ for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+}
+
+void __init arch_init_irq(void)
+{
+ u32 reg;
+
+ /* by default, interrupts are disabled. */
+ emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
+
+ clear_c0_status(0xff00);
+ set_c0_status(0x0400);
+
+#define GPIO_PCI (0xf<<15)
+ /* setup GPIO interrupt for PCI interface */
+ /* direction input */
+ reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
+ emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
+ /* disable interrupt */
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
+ /* level triggerd */
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
+ emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
+ /* interrupt clear */
+ emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
+
+ /* init all controllers */
+ emma2rh_irq_init();
+ emma2rh_sw_irq_init();
+ emma2rh_gpio_irq_init();
+ mips_cpu_irq_init();
+
+ /* setup cascade interrupts */
+ setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
+ setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
+ setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+ unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+ if (pending & STATUSF_IP7)
+ do_IRQ(CPU_IRQ_BASE + 7);
+ else if (pending & STATUSF_IP2)
+ emma2rh_irq_dispatch();
+ else if (pending & STATUSF_IP1)
+ do_IRQ(CPU_IRQ_BASE + 1);
+ else if (pending & STATUSF_IP0)
+ do_IRQ(CPU_IRQ_BASE + 0);
+ else
+ spurious_interrupt();
+}
diff --git a/arch/mips/emma2rh/markeins/led.c b/arch/mips/emma/markeins/led.c
index b65254c1bfe9..377a181b6561 100644
--- a/arch/mips/emma2rh/markeins/led.c
+++ b/arch/mips/emma/markeins/led.c
@@ -21,7 +21,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/string.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
const unsigned long clear = 0x20202020;
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma/markeins/platform.c
index fb9cda253ab0..88e87f6b3442 100644
--- a/arch/mips/emma2rh/markeins/platform.c
+++ b/arch/mips/emma/markeins/platform.c
@@ -36,7 +36,7 @@
#include <asm/reboot.h>
#include <asm/traps.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma/markeins/setup.c
index b6a23ad539f8..67f456500084 100644
--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma/markeins/setup.c
@@ -29,7 +29,7 @@
#include <asm/time.h>
#include <asm/reboot.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
deleted file mode 100644
index 91cbd959ab67..000000000000
--- a/arch/mips/emma2rh/common/irq.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * arch/mips/emma2rh/common/irq.c
- * This file is common irq dispatcher.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-
-#include <asm/system.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-/*
- * the first level int-handler will jump here if it is a emma2rh irq
- */
-void emma2rh_irq_dispatch(void)
-{
- u32 intStatus;
- u32 bitmask;
- u32 i;
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
-
-#ifdef EMMA2RH_SW_CASCADE
- if (intStatus &
- (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
- u32 swIntStatus;
- swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
- & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (swIntStatus & bitmask) {
- do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
- return;
- }
- }
- }
-#endif
-
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
-
-#ifdef EMMA2RH_GPIO_CASCADE
- if (intStatus &
- (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
- u32 gpioIntStatus;
- gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
- & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (gpioIntStatus & bitmask) {
- do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
- return;
- }
- }
- }
-#endif
-
- for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
-
- for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-}
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
deleted file mode 100644
index 96df37b77759..000000000000
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * arch/mips/emma2rh/common/irq_emma2rh.c
- * This file defines the irq handler for EMMA2RH.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/*
- * EMMA2RH defines 64 IRQs.
- *
- * This file exports one function:
- * emma2rh_irq_init(u32 irq_base);
- */
-
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-
-#include <asm/debug.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-/* number of total irqs supported by EMMA2RH */
-#define NUM_EMMA2RH_IRQ 96
-
-static int emma2rh_irq_base = -1;
-
-void ll_emma2rh_irq_enable(int);
-void ll_emma2rh_irq_disable(int);
-
-static void emma2rh_irq_enable(unsigned int irq)
-{
- ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
-}
-
-static void emma2rh_irq_disable(unsigned int irq)
-{
- ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
-}
-
-struct irq_chip emma2rh_irq_controller = {
- .name = "emma2rh_irq",
- .ack = emma2rh_irq_disable,
- .mask = emma2rh_irq_disable,
- .mask_ack = emma2rh_irq_disable,
- .unmask = emma2rh_irq_enable,
-};
-
-void emma2rh_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
- set_irq_chip_and_handler(i, &emma2rh_irq_controller,
- handle_level_irq);
-
- emma2rh_irq_base = irq_base;
-}
-
-void ll_emma2rh_irq_enable(int emma2rh_irq)
-{
- u32 reg_value;
- u32 reg_bitmask;
- u32 reg_index;
-
- reg_index = EMMA2RH_BHIF_INT_EN_0
- + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
- * (emma2rh_irq / 32);
- reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) == 0);
- emma2rh_out32(reg_index, reg_value | reg_bitmask);
-}
-
-void ll_emma2rh_irq_disable(int emma2rh_irq)
-{
- u32 reg_value;
- u32 reg_bitmask;
- u32 reg_index;
-
- reg_index = EMMA2RH_BHIF_INT_EN_0
- + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
- * (emma2rh_irq / 32);
- reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) != 0);
- emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
-}
diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c
deleted file mode 100644
index 6bcf6a06367a..000000000000
--- a/arch/mips/emma2rh/markeins/irq.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/irq.c
- * This file defines the irq handler for EMMA2RH.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/delay.h>
-
-#include <asm/irq_cpu.h>
-#include <asm/system.h>
-#include <asm/mipsregs.h>
-#include <asm/debug.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-/*
- * IRQ mapping
- *
- * 0-7: 8 CPU interrupts
- * 0 - software interrupt 0
- * 1 - software interrupt 1
- * 2 - most Vrc5477 interrupts are routed to this pin
- * 3 - (optional) some other interrupts routed to this pin for debugg
- * 4 - not used
- * 5 - not used
- * 6 - not used
- * 7 - cpu timer (used by default)
- *
- */
-
-extern void emma2rh_sw_irq_init(u32 base);
-extern void emma2rh_gpio_irq_init(u32 base);
-extern void emma2rh_irq_init(u32 base);
-extern void emma2rh_irq_dispatch(void);
-
-static struct irqaction irq_cascade = {
- .handler = no_action,
- .flags = 0,
- .mask = CPU_MASK_NONE,
- .name = "cascade",
- .dev_id = NULL,
- .next = NULL,
-};
-
-void __init arch_init_irq(void)
-{
- u32 reg;
-
- db_run(printk("markeins_irq_setup invoked.\n"));
-
- /* by default, interrupts are disabled. */
- emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
-
- clear_c0_status(0xff00);
- set_c0_status(0x0400);
-
-#define GPIO_PCI (0xf<<15)
- /* setup GPIO interrupt for PCI interface */
- /* direction input */
- reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
- emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
- /* disable interrupt */
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
- /* level triggerd */
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
- emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
- emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
- /* interrupt clear */
- emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
-
- /* init all controllers */
- emma2rh_irq_init(EMMA2RH_IRQ_BASE);
- emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
- emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
- mips_cpu_irq_init();
-
- /* setup cascade interrupts */
- setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
- setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
- setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-
- if (pending & STATUSF_IP7)
- do_IRQ(CPU_IRQ_BASE + 7);
- else if (pending & STATUSF_IP2)
- emma2rh_irq_dispatch();
- else if (pending & STATUSF_IP1)
- do_IRQ(CPU_IRQ_BASE + 1);
- else if (pending & STATUSF_IP0)
- do_IRQ(CPU_IRQ_BASE + 0);
- else
- spurious_interrupt();
-}
-
-
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
deleted file mode 100644
index fba5c156f472..000000000000
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/irq_markeins.c
- * This file defines the irq handler for Mark-eins.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-
-#include <asm/debug.h>
-#include <asm/emma2rh/emma2rh.h>
-
-static int emma2rh_sw_irq_base = -1;
-static int emma2rh_gpio_irq_base = -1;
-
-void ll_emma2rh_sw_irq_enable(int reg);
-void ll_emma2rh_sw_irq_disable(int reg);
-void ll_emma2rh_gpio_irq_enable(int reg);
-void ll_emma2rh_gpio_irq_disable(int reg);
-
-static void emma2rh_sw_irq_enable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
-}
-
-static void emma2rh_sw_irq_disable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
-}
-
-struct irq_chip emma2rh_sw_irq_controller = {
- .name = "emma2rh_sw_irq",
- .ack = emma2rh_sw_irq_disable,
- .mask = emma2rh_sw_irq_disable,
- .mask_ack = emma2rh_sw_irq_disable,
- .unmask = emma2rh_sw_irq_enable,
-};
-
-void emma2rh_sw_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
- set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller,
- handle_level_irq);
-
- emma2rh_sw_irq_base = irq_base;
-}
-
-void ll_emma2rh_sw_irq_enable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_SW);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
-}
-
-void ll_emma2rh_sw_irq_disable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < 32);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
-}
-
-static void emma2rh_gpio_irq_enable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
-}
-
-static void emma2rh_gpio_irq_disable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
-}
-
-static void emma2rh_gpio_irq_ack(unsigned int irq)
-{
- irq -= emma2rh_gpio_irq_base;
- emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
- ll_emma2rh_gpio_irq_disable(irq);
-}
-
-static void emma2rh_gpio_irq_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
-}
-
-struct irq_chip emma2rh_gpio_irq_controller = {
- .name = "emma2rh_gpio_irq",
- .ack = emma2rh_gpio_irq_ack,
- .mask = emma2rh_gpio_irq_disable,
- .mask_ack = emma2rh_gpio_irq_ack,
- .unmask = emma2rh_gpio_irq_enable,
- .end = emma2rh_gpio_irq_end,
-};
-
-void emma2rh_gpio_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++)
- set_irq_chip(i, &emma2rh_gpio_irq_controller);
-
- emma2rh_gpio_irq_base = irq_base;
-}
-
-void ll_emma2rh_gpio_irq_enable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-}
-
-void ll_emma2rh_gpio_irq_disable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-}
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 49df8c4c9d25..bac4a960b24c 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -558,39 +558,67 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
__clear_bit(nr, addr);
}
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
-
/*
* Return the bit position (0..63) of the most significant 1 bit in a word
* Returns -1 if no 1 bit exists
*/
-static inline unsigned long __fls(unsigned long x)
+static inline unsigned long __fls(unsigned long word)
{
- int lz;
+ int num;
- if (sizeof(x) == 4) {
+ if (BITS_PER_LONG == 32 &&
+ __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {
__asm__(
" .set push \n"
" .set mips32 \n"
" clz %0, %1 \n"
" .set pop \n"
- : "=r" (lz)
- : "r" (x));
+ : "=r" (num)
+ : "r" (word));
- return 31 - lz;
+ return 31 - num;
}
- BUG_ON(sizeof(x) != 8);
+ if (BITS_PER_LONG == 64 &&
+ __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) {
+ __asm__(
+ " .set push \n"
+ " .set mips64 \n"
+ " dclz %0, %1 \n"
+ " .set pop \n"
+ : "=r" (num)
+ : "r" (word));
- __asm__(
- " .set push \n"
- " .set mips64 \n"
- " dclz %0, %1 \n"
- " .set pop \n"
- : "=r" (lz)
- : "r" (x));
+ return 63 - num;
+ }
+
+ num = BITS_PER_LONG - 1;
- return 63 - lz;
+#if BITS_PER_LONG == 64
+ if (!(word & (~0ul << 32))) {
+ num -= 32;
+ word <<= 32;
+ }
+#endif
+ if (!(word & (~0ul << (BITS_PER_LONG-16)))) {
+ num -= 16;
+ word <<= 16;
+ }
+ if (!(word & (~0ul << (BITS_PER_LONG-8)))) {
+ num -= 8;
+ word <<= 8;
+ }
+ if (!(word & (~0ul << (BITS_PER_LONG-4)))) {
+ num -= 4;
+ word <<= 4;
+ }
+ if (!(word & (~0ul << (BITS_PER_LONG-2)))) {
+ num -= 2;
+ word <<= 2;
+ }
+ if (!(word & (~0ul << (BITS_PER_LONG-1))))
+ num -= 1;
+ return num;
}
/*
@@ -612,23 +640,43 @@ static inline unsigned long __ffs(unsigned long word)
* This is defined the same way as ffs.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
-static inline int fls(int word)
+static inline int fls(int x)
{
- __asm__("clz %0, %1" : "=r" (word) : "r" (word));
+ int r;
- return 32 - word;
-}
+ if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {
+ __asm__("clz %0, %1" : "=r" (x) : "r" (x));
-#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPS64)
-static inline int fls64(__u64 word)
-{
- __asm__("dclz %0, %1" : "=r" (word) : "r" (word));
+ return 32 - x;
+ }
- return 64 - word;
+ r = 32;
+ if (!x)
+ return 0;
+ if (!(x & 0xffff0000u)) {
+ x <<= 16;
+ r -= 16;
+ }
+ if (!(x & 0xff000000u)) {
+ x <<= 8;
+ r -= 8;
+ }
+ if (!(x & 0xf0000000u)) {
+ x <<= 4;
+ r -= 4;
+ }
+ if (!(x & 0xc0000000u)) {
+ x <<= 2;
+ r -= 2;
+ }
+ if (!(x & 0x80000000u)) {
+ x <<= 1;
+ r -= 1;
+ }
+ return r;
}
-#else
+
#include <asm-generic/bitops/fls64.h>
-#endif
/*
* ffs - find first bit set.
@@ -646,16 +694,6 @@ static inline int ffs(int word)
return fls(word & -word);
}
-#else
-
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-
-#endif /*defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) */
-
#include <asm-generic/bitops/ffz.h>
#include <asm-generic/bitops/find.h>
diff --git a/arch/mips/include/asm/break.h b/arch/mips/include/asm/break.h
index 25b980c91e7e..44437ed765e8 100644
--- a/arch/mips/include/asm/break.h
+++ b/arch/mips/include/asm/break.h
@@ -29,6 +29,7 @@
#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
#define BRK_BUG 512 /* Used by BUG() */
#define BRK_KDB 513 /* Used in KDB_ENTER() */
+#define BRK_MEMU 514 /* Used by FPU emulator */
#define BRK_MULOVF 1023 /* Multiply overflow */
#endif /* __ASM_BREAK_H */
diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h
index fe7dc2d59b69..2988d29a0867 100644
--- a/arch/mips/include/asm/byteorder.h
+++ b/arch/mips/include/asm/byteorder.h
@@ -11,11 +11,19 @@
#include <linux/compiler.h>
#include <asm/types.h>
-#ifdef __GNUC__
+#if defined(__MIPSEB__)
+# define __BIG_ENDIAN
+#elif defined(__MIPSEL__)
+# define __LITTLE_ENDIAN
+#else
+# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
+#endif
+
+#define __SWAB_64_THRU_32__
#ifdef CONFIG_CPU_MIPSR2
-static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
+static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
{
__asm__(
" wsbh %0, %1 \n"
@@ -24,9 +32,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
return x;
}
-#define __arch__swab16(x) ___arch__swab16(x)
+#define __arch_swab16 __arch_swab16
-static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
{
__asm__(
" wsbh %0, %1 \n"
@@ -36,11 +44,10 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
return x;
}
-#define __arch__swab32(x) ___arch__swab32(x)
+#define __arch_swab32 __arch_swab32
#ifdef CONFIG_CPU_MIPS64_R2
-
-static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
+static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
{
__asm__(
" dsbh %0, %1 \n"
@@ -51,26 +58,11 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
return x;
}
-
-#define __arch__swab64(x) ___arch__swab64(x)
-
+#define __arch_swab64 __arch_swab64
#endif /* CONFIG_CPU_MIPS64_R2 */
#endif /* CONFIG_CPU_MIPSR2 */
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-# define __BYTEORDER_HAS_U64__
-# define __SWAB_64_THRU_32__
-#endif
-
-#endif /* __GNUC__ */
-
-#if defined(__MIPSEB__)
-# include <linux/byteorder/big_endian.h>
-#elif defined(__MIPSEL__)
-# include <linux/byteorder/little_endian.h>
-#else
-# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
-#endif
+#include <linux/byteorder.h>
#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 5ea701fc3425..12d12dfe73c0 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -141,6 +141,8 @@
#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2)
#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1)
#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2)
+#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
+ cpu_has_mips64r1 | cpu_has_mips64r2)
#ifndef cpu_has_dsp
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
diff --git a/arch/mips/include/asm/ds1286.h b/arch/mips/include/asm/ds1286.h
deleted file mode 100644
index 6983b6ff0af3..000000000000
--- a/arch/mips/include/asm/ds1286.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Machine dependent access functions for RTC registers.
- *
- * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
- */
-#ifndef _ASM_DS1286_H
-#define _ASM_DS1286_H
-
-#include <ds1286.h>
-
-#endif /* _ASM_DS1286_H */
diff --git a/arch/mips/include/asm/emma2rh/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
index 6a1af0af51e3..30aea91de626 100644
--- a/arch/mips/include/asm/emma2rh/emma2rh.h
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -1,5 +1,5 @@
/*
- * include/asm-mips/emma2rh/emma2rh.h
+ * arch/mips/include/asm/emma/emma2rh.h
* This file is EMMA2RH common header.
*
* Copyright (C) NEC Electronics Corporation 2005-2006
@@ -21,8 +21,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#ifndef __ASM_EMMA2RH_EMMA2RH_H
-#define __ASM_EMMA2RH_EMMA2RH_H
+#ifndef __ASM_EMMA_EMMA2RH_H
+#define __ASM_EMMA_EMMA2RH_H
#include <irq.h>
@@ -206,7 +206,6 @@ static inline void emma2rh_out32(u32 offset, u32 val)
static inline u32 emma2rh_in32(u32 offset)
{
u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
return val;
}
@@ -219,7 +218,6 @@ static inline void emma2rh_out16(u32 offset, u16 val)
static inline u16 emma2rh_in16(u32 offset)
{
u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
return val;
}
@@ -232,7 +230,6 @@ static inline void emma2rh_out8(u32 offset, u8 val)
static inline u8 emma2rh_in8(u32 offset)
{
u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
return val;
}
@@ -324,10 +321,10 @@ static inline u8 emma2rh_in8(u32 offset)
/*
* include the board dependent part
*/
-#if defined(CONFIG_MARKEINS)
-#include <asm/emma2rh/markeins.h>
+#ifdef CONFIG_NEC_MARKEINS
+#include <asm/emma/markeins.h>
#else
#error "Unknown EMMA2RH board!"
#endif
-#endif /* __ASM_EMMA2RH_EMMA2RH_H */
+#endif /* __ASM_EMMA_EMMA2RH_H */
diff --git a/arch/mips/include/asm/emma2rh/markeins.h b/arch/mips/include/asm/emma/markeins.h
index 973b0628490d..973b0628490d 100644
--- a/arch/mips/include/asm/emma2rh/markeins.h
+++ b/arch/mips/include/asm/emma/markeins.h
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index 2731c38bd7ae..e5189572956c 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -23,6 +23,9 @@
#ifndef _ASM_FPU_EMULATOR_H
#define _ASM_FPU_EMULATOR_H
+#include <asm/break.h>
+#include <asm/inst.h>
+
struct mips_fpu_emulator_stats {
unsigned int emulated;
unsigned int loads;
@@ -34,4 +37,18 @@ struct mips_fpu_emulator_stats {
extern struct mips_fpu_emulator_stats fpuemustats;
+extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
+ unsigned long cpc);
+extern int do_dsemulret(struct pt_regs *xcp);
+
+/*
+ * Instruction inserted following the badinst to further tag the sequence
+ */
+#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */
+
+/*
+ * Break instruction with special math emu break code set
+ */
+#define BREAK_MATH (0x0000000d | (BRK_MEMU << 16))
+
#endif /* _ASM_FPU_EMULATOR_H */
diff --git a/arch/mips/include/asm/m48t35.h b/arch/mips/include/asm/m48t35.h
deleted file mode 100644
index f44852e9a96d..000000000000
--- a/arch/mips/include/asm/m48t35.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Registers for the SGS-Thomson M48T35 Timekeeper RAM chip
- */
-#ifndef _ASM_M48T35_H
-#define _ASM_M48T35_H
-
-#include <linux/spinlock.h>
-
-extern spinlock_t rtc_lock;
-
-struct m48t35_rtc {
- volatile u8 pad[0x7ff8]; /* starts at 0x7ff8 */
- volatile u8 control;
- volatile u8 sec;
- volatile u8 min;
- volatile u8 hour;
- volatile u8 day;
- volatile u8 date;
- volatile u8 month;
- volatile u8 year;
-};
-
-#define M48T35_RTC_SET 0x80
-#define M48T35_RTC_STOPPED 0x80
-#define M48T35_RTC_READ 0x40
-
-#endif /* _ASM_M48T35_H */
diff --git a/arch/mips/include/asm/mach-lemote/pci.h b/arch/mips/include/asm/mach-lemote/pci.h
new file mode 100644
index 000000000000..ea6aa143b78e
--- /dev/null
+++ b/arch/mips/include/asm/mach-lemote/pci.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org>
+ *
+ * This program is free software; you can redistribute it
+ * and/or modify it under the terms of the GNU General
+ * Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be
+ * useful, but WITHOUT ANY WARRANTY; without even the implied
+ * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+ * PURPOSE. See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program; if not, write to the Free
+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
+ * 02139, USA.
+ */
+
+#ifndef _LEMOTE_PCI_H_
+#define _LEMOTE_PCI_H_
+
+#define LOONGSON2E_PCI_MEM_START 0x14000000UL
+#define LOONGSON2E_PCI_MEM_END 0x1fffffffUL
+#define LOONGSON2E_PCI_IO_START 0x00004000UL
+#define LOONGSON2E_IO_PORT_BASE 0x1fd00000UL
+
+#endif /* !_LEMOTE_PCI_H_ */
diff --git a/arch/mips/include/asm/mach-pnx833x/gpio.h b/arch/mips/include/asm/mach-pnx833x/gpio.h
new file mode 100644
index 000000000000..8de0eb9c98a3
--- /dev/null
+++ b/arch/mips/include/asm/mach-pnx833x/gpio.h
@@ -0,0 +1,172 @@
+/*
+ * gpio.h: GPIO Support for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_MIPS_MACH_PNX833X_GPIO_H
+#define __ASM_MIPS_MACH_PNX833X_GPIO_H
+
+/* BIG FAT WARNING: races danger!
+ No protections exist here. Current users are only early init code,
+ when locking is not needed because no cuncurency yet exists there,
+ and GPIO IRQ dispatcher, which does locking.
+ However, if many uses will ever happen, proper locking will be needed
+ - including locking between different uses
+*/
+
+#include "pnx833x.h"
+
+#define SET_REG_BIT(reg, bit) do { (reg |= (1 << (bit))); } while (0)
+#define CLEAR_REG_BIT(reg, bit) do { (reg &= ~(1 << (bit))); } while (0)
+
+/* Initialize GPIO to a known state */
+static inline void pnx833x_gpio_init(void)
+{
+ PNX833X_PIO_DIR = 0;
+ PNX833X_PIO_DIR2 = 0;
+ PNX833X_PIO_SEL = 0;
+ PNX833X_PIO_SEL2 = 0;
+ PNX833X_PIO_INT_EDGE = 0;
+ PNX833X_PIO_INT_HI = 0;
+ PNX833X_PIO_INT_LO = 0;
+
+ /* clear any GPIO interrupt requests */
+ PNX833X_PIO_INT_CLEAR = 0xffff;
+ PNX833X_PIO_INT_CLEAR = 0;
+ PNX833X_PIO_INT_ENABLE = 0;
+}
+
+/* Select GPIO direction for a pin */
+static inline void pnx833x_gpio_select_input(unsigned int pin)
+{
+ if (pin < 32)
+ CLEAR_REG_BIT(PNX833X_PIO_DIR, pin);
+ else
+ CLEAR_REG_BIT(PNX833X_PIO_DIR2, pin & 31);
+}
+static inline void pnx833x_gpio_select_output(unsigned int pin)
+{
+ if (pin < 32)
+ SET_REG_BIT(PNX833X_PIO_DIR, pin);
+ else
+ SET_REG_BIT(PNX833X_PIO_DIR2, pin & 31);
+}
+
+/* Select GPIO or alternate function for a pin */
+static inline void pnx833x_gpio_select_function_io(unsigned int pin)
+{
+ if (pin < 32)
+ CLEAR_REG_BIT(PNX833X_PIO_SEL, pin);
+ else
+ CLEAR_REG_BIT(PNX833X_PIO_SEL2, pin & 31);
+}
+static inline void pnx833x_gpio_select_function_alt(unsigned int pin)
+{
+ if (pin < 32)
+ SET_REG_BIT(PNX833X_PIO_SEL, pin);
+ else
+ SET_REG_BIT(PNX833X_PIO_SEL2, pin & 31);
+}
+
+/* Read GPIO pin */
+static inline int pnx833x_gpio_read(unsigned int pin)
+{
+ if (pin < 32)
+ return (PNX833X_PIO_IN >> pin) & 1;
+ else
+ return (PNX833X_PIO_IN2 >> (pin & 31)) & 1;
+}
+
+/* Write GPIO pin */
+static inline void pnx833x_gpio_write(unsigned int val, unsigned int pin)
+{
+ if (pin < 32) {
+ if (val)
+ SET_REG_BIT(PNX833X_PIO_OUT, pin);
+ else
+ CLEAR_REG_BIT(PNX833X_PIO_OUT, pin);
+ } else {
+ if (val)
+ SET_REG_BIT(PNX833X_PIO_OUT2, pin & 31);
+ else
+ CLEAR_REG_BIT(PNX833X_PIO_OUT2, pin & 31);
+ }
+}
+
+/* Configure GPIO interrupt */
+#define GPIO_INT_NONE 0
+#define GPIO_INT_LEVEL_LOW 1
+#define GPIO_INT_LEVEL_HIGH 2
+#define GPIO_INT_EDGE_RISING 3
+#define GPIO_INT_EDGE_FALLING 4
+#define GPIO_INT_EDGE_BOTH 5
+static inline void pnx833x_gpio_setup_irq(int when, unsigned int pin)
+{
+ switch (when) {
+ case GPIO_INT_LEVEL_LOW:
+ CLEAR_REG_BIT(PNX833X_PIO_INT_EDGE, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_HI, pin);
+ SET_REG_BIT(PNX833X_PIO_INT_LO, pin);
+ break;
+ case GPIO_INT_LEVEL_HIGH:
+ CLEAR_REG_BIT(PNX833X_PIO_INT_EDGE, pin);
+ SET_REG_BIT(PNX833X_PIO_INT_HI, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_LO, pin);
+ break;
+ case GPIO_INT_EDGE_RISING:
+ SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin);
+ SET_REG_BIT(PNX833X_PIO_INT_HI, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_LO, pin);
+ break;
+ case GPIO_INT_EDGE_FALLING:
+ SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_HI, pin);
+ SET_REG_BIT(PNX833X_PIO_INT_LO, pin);
+ break;
+ case GPIO_INT_EDGE_BOTH:
+ SET_REG_BIT(PNX833X_PIO_INT_EDGE, pin);
+ SET_REG_BIT(PNX833X_PIO_INT_HI, pin);
+ SET_REG_BIT(PNX833X_PIO_INT_LO, pin);
+ break;
+ default:
+ CLEAR_REG_BIT(PNX833X_PIO_INT_EDGE, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_HI, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_LO, pin);
+ break;
+ }
+}
+
+/* Enable/disable GPIO interrupt */
+static inline void pnx833x_gpio_enable_irq(unsigned int pin)
+{
+ SET_REG_BIT(PNX833X_PIO_INT_ENABLE, pin);
+}
+static inline void pnx833x_gpio_disable_irq(unsigned int pin)
+{
+ CLEAR_REG_BIT(PNX833X_PIO_INT_ENABLE, pin);
+}
+
+/* Clear GPIO interrupt request */
+static inline void pnx833x_gpio_clear_irq(unsigned int pin)
+{
+ SET_REG_BIT(PNX833X_PIO_INT_CLEAR, pin);
+ CLEAR_REG_BIT(PNX833X_PIO_INT_CLEAR, pin);
+}
+
+#endif
diff --git a/arch/mips/include/asm/mach-pnx833x/irq-mapping.h b/arch/mips/include/asm/mach-pnx833x/irq-mapping.h
new file mode 100644
index 000000000000..657f089b1724
--- /dev/null
+++ b/arch/mips/include/asm/mach-pnx833x/irq-mapping.h
@@ -0,0 +1,126 @@
+
+/*
+ * irq.h: IRQ mappings for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ASM_MIPS_MACH_PNX833X_IRQ_MAPPING_H
+#define __ASM_MIPS_MACH_PNX833X_IRQ_MAPPING_H
+/*
+ * The "IRQ numbers" are completely virtual.
+ *
+ * In PNX8330/1, we have 48 interrupt lines, numbered from 1 to 48.
+ * Let's use numbers 1..48 for PIC interrupts, number 0 for timer interrupt,
+ * numbers 49..64 for (virtual) GPIO interrupts.
+ *
+ * In PNX8335, we have 57 interrupt lines, numbered from 1 to 57,
+ * connected to PIC, which uses core hardware interrupt 2, and also
+ * a timer interrupt through hardware interrupt 5.
+ * Let's use numbers 1..64 for PIC interrupts, number 0 for timer interrupt,
+ * numbers 65..80 for (virtual) GPIO interrupts.
+ *
+ */
+#include <irq.h>
+
+#define PNX833X_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7)
+
+/* Interrupts supported by PIC */
+#define PNX833X_PIC_I2C0_INT (PNX833X_PIC_IRQ_BASE + 1)
+#define PNX833X_PIC_I2C1_INT (PNX833X_PIC_IRQ_BASE + 2)
+#define PNX833X_PIC_UART0_INT (PNX833X_PIC_IRQ_BASE + 3)
+#define PNX833X_PIC_UART1_INT (PNX833X_PIC_IRQ_BASE + 4)
+#define PNX833X_PIC_TS_IN0_DV_INT (PNX833X_PIC_IRQ_BASE + 5)
+#define PNX833X_PIC_TS_IN0_DMA_INT (PNX833X_PIC_IRQ_BASE + 6)
+#define PNX833X_PIC_GPIO_INT (PNX833X_PIC_IRQ_BASE + 7)
+#define PNX833X_PIC_AUDIO_DEC_INT (PNX833X_PIC_IRQ_BASE + 8)
+#define PNX833X_PIC_VIDEO_DEC_INT (PNX833X_PIC_IRQ_BASE + 9)
+#define PNX833X_PIC_CONFIG_INT (PNX833X_PIC_IRQ_BASE + 10)
+#define PNX833X_PIC_AOI_INT (PNX833X_PIC_IRQ_BASE + 11)
+#define PNX833X_PIC_SYNC_INT (PNX833X_PIC_IRQ_BASE + 12)
+#define PNX8330_PIC_SPU_INT (PNX833X_PIC_IRQ_BASE + 13)
+#define PNX8335_PIC_SATA_INT (PNX833X_PIC_IRQ_BASE + 13)
+#define PNX833X_PIC_OSD_INT (PNX833X_PIC_IRQ_BASE + 14)
+#define PNX833X_PIC_DISP1_INT (PNX833X_PIC_IRQ_BASE + 15)
+#define PNX833X_PIC_DEINTERLACER_INT (PNX833X_PIC_IRQ_BASE + 16)
+#define PNX833X_PIC_DISPLAY2_INT (PNX833X_PIC_IRQ_BASE + 17)
+#define PNX833X_PIC_VC_INT (PNX833X_PIC_IRQ_BASE + 18)
+#define PNX833X_PIC_SC_INT (PNX833X_PIC_IRQ_BASE + 19)
+#define PNX833X_PIC_IDE_INT (PNX833X_PIC_IRQ_BASE + 20)
+#define PNX833X_PIC_IDE_DMA_INT (PNX833X_PIC_IRQ_BASE + 21)
+#define PNX833X_PIC_TS_IN1_DV_INT (PNX833X_PIC_IRQ_BASE + 22)
+#define PNX833X_PIC_TS_IN1_DMA_INT (PNX833X_PIC_IRQ_BASE + 23)
+#define PNX833X_PIC_SGDX_DMA_INT (PNX833X_PIC_IRQ_BASE + 24)
+#define PNX833X_PIC_TS_OUT_INT (PNX833X_PIC_IRQ_BASE + 25)
+#define PNX833X_PIC_IR_INT (PNX833X_PIC_IRQ_BASE + 26)
+#define PNX833X_PIC_VMSP1_INT (PNX833X_PIC_IRQ_BASE + 27)
+#define PNX833X_PIC_VMSP2_INT (PNX833X_PIC_IRQ_BASE + 28)
+#define PNX833X_PIC_PIBC_INT (PNX833X_PIC_IRQ_BASE + 29)
+#define PNX833X_PIC_TS_IN0_TRD_INT (PNX833X_PIC_IRQ_BASE + 30)
+#define PNX833X_PIC_SGDX_TPD_INT (PNX833X_PIC_IRQ_BASE + 31)
+#define PNX833X_PIC_USB_INT (PNX833X_PIC_IRQ_BASE + 32)
+#define PNX833X_PIC_TS_IN1_TRD_INT (PNX833X_PIC_IRQ_BASE + 33)
+#define PNX833X_PIC_CLOCK_INT (PNX833X_PIC_IRQ_BASE + 34)
+#define PNX833X_PIC_SGDX_PARSER_INT (PNX833X_PIC_IRQ_BASE + 35)
+#define PNX833X_PIC_VMSP_DMA_INT (PNX833X_PIC_IRQ_BASE + 36)
+
+#if defined(CONFIG_SOC_PNX8335)
+#define PNX8335_PIC_MIU_INT (PNX833X_PIC_IRQ_BASE + 37)
+#define PNX8335_PIC_AVCHIP_IRQ_INT (PNX833X_PIC_IRQ_BASE + 38)
+#define PNX8335_PIC_SYNC_HD_INT (PNX833X_PIC_IRQ_BASE + 39)
+#define PNX8335_PIC_DISP_HD_INT (PNX833X_PIC_IRQ_BASE + 40)
+#define PNX8335_PIC_DISP_SCALER_INT (PNX833X_PIC_IRQ_BASE + 41)
+#define PNX8335_PIC_OSD_HD1_INT (PNX833X_PIC_IRQ_BASE + 42)
+#define PNX8335_PIC_DTL_WRITER_Y_INT (PNX833X_PIC_IRQ_BASE + 43)
+#define PNX8335_PIC_DTL_WRITER_C_INT (PNX833X_PIC_IRQ_BASE + 44)
+#define PNX8335_PIC_DTL_EMULATOR_Y_IR_INT (PNX833X_PIC_IRQ_BASE + 45)
+#define PNX8335_PIC_DTL_EMULATOR_C_IR_INT (PNX833X_PIC_IRQ_BASE + 46)
+#define PNX8335_PIC_DENC_TTX_INT (PNX833X_PIC_IRQ_BASE + 47)
+#define PNX8335_PIC_MMI_SIF0_INT (PNX833X_PIC_IRQ_BASE + 48)
+#define PNX8335_PIC_MMI_SIF1_INT (PNX833X_PIC_IRQ_BASE + 49)
+#define PNX8335_PIC_MMI_CDMMU_INT (PNX833X_PIC_IRQ_BASE + 50)
+#define PNX8335_PIC_PIBCS_INT (PNX833X_PIC_IRQ_BASE + 51)
+#define PNX8335_PIC_ETHERNET_INT (PNX833X_PIC_IRQ_BASE + 52)
+#define PNX8335_PIC_VMSP1_0_INT (PNX833X_PIC_IRQ_BASE + 53)
+#define PNX8335_PIC_VMSP1_1_INT (PNX833X_PIC_IRQ_BASE + 54)
+#define PNX8335_PIC_VMSP1_DMA_INT (PNX833X_PIC_IRQ_BASE + 55)
+#define PNX8335_PIC_TDGR_DE_INT (PNX833X_PIC_IRQ_BASE + 56)
+#define PNX8335_PIC_IR1_IRQ_INT (PNX833X_PIC_IRQ_BASE + 57)
+#endif
+
+/* GPIO interrupts */
+#define PNX833X_GPIO_0_INT (PNX833X_GPIO_IRQ_BASE + 0)
+#define PNX833X_GPIO_1_INT (PNX833X_GPIO_IRQ_BASE + 1)
+#define PNX833X_GPIO_2_INT (PNX833X_GPIO_IRQ_BASE + 2)
+#define PNX833X_GPIO_3_INT (PNX833X_GPIO_IRQ_BASE + 3)
+#define PNX833X_GPIO_4_INT (PNX833X_GPIO_IRQ_BASE + 4)
+#define PNX833X_GPIO_5_INT (PNX833X_GPIO_IRQ_BASE + 5)
+#define PNX833X_GPIO_6_INT (PNX833X_GPIO_IRQ_BASE + 6)
+#define PNX833X_GPIO_7_INT (PNX833X_GPIO_IRQ_BASE + 7)
+#define PNX833X_GPIO_8_INT (PNX833X_GPIO_IRQ_BASE + 8)
+#define PNX833X_GPIO_9_INT (PNX833X_GPIO_IRQ_BASE + 9)
+#define PNX833X_GPIO_10_INT (PNX833X_GPIO_IRQ_BASE + 10)
+#define PNX833X_GPIO_11_INT (PNX833X_GPIO_IRQ_BASE + 11)
+#define PNX833X_GPIO_12_INT (PNX833X_GPIO_IRQ_BASE + 12)
+#define PNX833X_GPIO_13_INT (PNX833X_GPIO_IRQ_BASE + 13)
+#define PNX833X_GPIO_14_INT (PNX833X_GPIO_IRQ_BASE + 14)
+#define PNX833X_GPIO_15_INT (PNX833X_GPIO_IRQ_BASE + 15)
+
+#endif
+
diff --git a/arch/mips/include/asm/mach-pnx833x/irq.h b/arch/mips/include/asm/mach-pnx833x/irq.h
new file mode 100644
index 000000000000..745114b1d8d5
--- /dev/null
+++ b/arch/mips/include/asm/mach-pnx833x/irq.h
@@ -0,0 +1,53 @@
+/*
+ * irq.h: IRQ mappings for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ASM_MIPS_MACH_PNX833X_IRQ_H
+#define __ASM_MIPS_MACH_PNX833X_IRQ_H
+/*
+ * The "IRQ numbers" are completely virtual.
+ *
+ * In PNX8330/1, we have 48 interrupt lines, numbered from 1 to 48.
+ * Let's use numbers 1..48 for PIC interrupts, number 0 for timer interrupt,
+ * numbers 49..64 for (virtual) GPIO interrupts.
+ *
+ * In PNX8335, we have 57 interrupt lines, numbered from 1 to 57,
+ * connected to PIC, which uses core hardware interrupt 2, and also
+ * a timer interrupt through hardware interrupt 5.
+ * Let's use numbers 1..64 for PIC interrupts, number 0 for timer interrupt,
+ * numbers 65..80 for (virtual) GPIO interrupts.
+ *
+ */
+#if defined(CONFIG_SOC_PNX8335)
+ #define PNX833X_PIC_NUM_IRQ 58
+#else
+ #define PNX833X_PIC_NUM_IRQ 37
+#endif
+
+#define MIPS_CPU_NUM_IRQ 8
+#define PNX833X_GPIO_NUM_IRQ 16
+
+#define MIPS_CPU_IRQ_BASE 0
+#define PNX833X_PIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + MIPS_CPU_NUM_IRQ)
+#define PNX833X_GPIO_IRQ_BASE (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ)
+#define NR_IRQS (MIPS_CPU_NUM_IRQ + PNX833X_PIC_NUM_IRQ + PNX833X_GPIO_NUM_IRQ)
+
+#endif
diff --git a/arch/mips/include/asm/mach-pnx833x/pnx833x.h b/arch/mips/include/asm/mach-pnx833x/pnx833x.h
new file mode 100644
index 000000000000..100f52870e3c
--- /dev/null
+++ b/arch/mips/include/asm/mach-pnx833x/pnx833x.h
@@ -0,0 +1,202 @@
+/*
+ * pnx833x.h: Register mappings for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_MIPS_MACH_PNX833X_PNX833X_H
+#define __ASM_MIPS_MACH_PNX833X_PNX833X_H
+
+/* All regs are accessed in KSEG1 */
+#define PNX833X_BASE (0xa0000000ul + 0x17E00000ul)
+
+#define PNX833X_REG(offs) (*((volatile unsigned long *)(PNX833X_BASE + offs)))
+
+/* Registers are named exactly as in PNX833X docs, just with PNX833X_ prefix */
+
+/* Read access to multibit fields */
+#define PNX833X_BIT(val, reg, field) ((val) & PNX833X_##reg##_##field)
+#define PNX833X_REGBIT(reg, field) PNX833X_BIT(PNX833X_##reg, reg, field)
+
+/* Use PNX833X_FIELD to extract a field from val */
+#define PNX_FIELD(cpu, val, reg, field) \
+ (((val) & PNX##cpu##_##reg##_##field##_MASK) >> \
+ PNX##cpu##_##reg##_##field##_SHIFT)
+#define PNX833X_FIELD(val, reg, field) PNX_FIELD(833X, val, reg, field)
+#define PNX8330_FIELD(val, reg, field) PNX_FIELD(8330, val, reg, field)
+#define PNX8335_FIELD(val, reg, field) PNX_FIELD(8335, val, reg, field)
+
+/* Use PNX833X_REGFIELD to extract a field from a register */
+#define PNX833X_REGFIELD(reg, field) PNX833X_FIELD(PNX833X_##reg, reg, field)
+#define PNX8330_REGFIELD(reg, field) PNX8330_FIELD(PNX8330_##reg, reg, field)
+#define PNX8335_REGFIELD(reg, field) PNX8335_FIELD(PNX8335_##reg, reg, field)
+
+
+#define PNX_WRITEFIELD(cpu, val, reg, field) \
+ (PNX##cpu##_##reg = (PNX##cpu##_##reg & ~(PNX##cpu##_##reg##_##field##_MASK)) | \
+ ((val) << PNX##cpu##_##reg##_##field##_SHIFT))
+#define PNX833X_WRITEFIELD(val, reg, field) \
+ PNX_WRITEFIELD(833X, val, reg, field)
+#define PNX8330_WRITEFIELD(val, reg, field) \
+ PNX_WRITEFIELD(8330, val, reg, field)
+#define PNX8335_WRITEFIELD(val, reg, field) \
+ PNX_WRITEFIELD(8335, val, reg, field)
+
+
+/* Macros to detect CPU type */
+
+#define PNX833X_CONFIG_MODULE_ID PNX833X_REG(0x7FFC)
+#define PNX833X_CONFIG_MODULE_ID_MAJREV_MASK 0x0000f000
+#define PNX833X_CONFIG_MODULE_ID_MAJREV_SHIFT 12
+#define PNX8330_CONFIG_MODULE_MAJREV 4
+#define PNX8335_CONFIG_MODULE_MAJREV 5
+#define CPU_IS_PNX8330 (PNX833X_REGFIELD(CONFIG_MODULE_ID, MAJREV) == \
+ PNX8330_CONFIG_MODULE_MAJREV)
+#define CPU_IS_PNX8335 (PNX833X_REGFIELD(CONFIG_MODULE_ID, MAJREV) == \
+ PNX8335_CONFIG_MODULE_MAJREV)
+
+
+
+#define PNX833X_RESET_CONTROL PNX833X_REG(0x8004)
+#define PNX833X_RESET_CONTROL_2 PNX833X_REG(0x8014)
+
+#define PNX833X_PIC_REG(offs) PNX833X_REG(0x01000 + (offs))
+#define PNX833X_PIC_INT_PRIORITY PNX833X_PIC_REG(0x0)
+#define PNX833X_PIC_INT_SRC PNX833X_PIC_REG(0x4)
+#define PNX833X_PIC_INT_SRC_INT_SRC_MASK 0x00000FF8ul /* bits 11:3 */
+#define PNX833X_PIC_INT_SRC_INT_SRC_SHIFT 3
+#define PNX833X_PIC_INT_REG(irq) PNX833X_PIC_REG(0x10 + 4*(irq))
+
+#define PNX833X_CLOCK_CPUCP_CTL PNX833X_REG(0x9228)
+#define PNX833X_CLOCK_CPUCP_CTL_EXIT_RESET 0x00000002ul /* bit 1 */
+#define PNX833X_CLOCK_CPUCP_CTL_DIV_CLOCK_MASK 0x00000018ul /* bits 4:3 */
+#define PNX833X_CLOCK_CPUCP_CTL_DIV_CLOCK_SHIFT 3
+
+#define PNX8335_CLOCK_PLL_CPU_CTL PNX833X_REG(0x9020)
+#define PNX8335_CLOCK_PLL_CPU_CTL_FREQ_MASK 0x1f
+#define PNX8335_CLOCK_PLL_CPU_CTL_FREQ_SHIFT 0
+
+#define PNX833X_CONFIG_MUX PNX833X_REG(0x7004)
+#define PNX833X_CONFIG_MUX_IDE_MUX 0x00000080 /* bit 7 */
+
+#define PNX8330_CONFIG_POLYFUSE_7 PNX833X_REG(0x7040)
+#define PNX8330_CONFIG_POLYFUSE_7_BOOT_MODE_MASK 0x00180000
+#define PNX8330_CONFIG_POLYFUSE_7_BOOT_MODE_SHIFT 19
+
+#define PNX833X_PIO_IN PNX833X_REG(0xF000)
+#define PNX833X_PIO_OUT PNX833X_REG(0xF004)
+#define PNX833X_PIO_DIR PNX833X_REG(0xF008)
+#define PNX833X_PIO_SEL PNX833X_REG(0xF014)
+#define PNX833X_PIO_INT_EDGE PNX833X_REG(0xF020)
+#define PNX833X_PIO_INT_HI PNX833X_REG(0xF024)
+#define PNX833X_PIO_INT_LO PNX833X_REG(0xF028)
+#define PNX833X_PIO_INT_STATUS PNX833X_REG(0xFFE0)
+#define PNX833X_PIO_INT_ENABLE PNX833X_REG(0xFFE4)
+#define PNX833X_PIO_INT_CLEAR PNX833X_REG(0xFFE8)
+#define PNX833X_PIO_IN2 PNX833X_REG(0xF05C)
+#define PNX833X_PIO_OUT2 PNX833X_REG(0xF060)
+#define PNX833X_PIO_DIR2 PNX833X_REG(0xF064)
+#define PNX833X_PIO_SEL2 PNX833X_REG(0xF068)
+
+#define PNX833X_UART0_PORTS_START (PNX833X_BASE + 0xB000)
+#define PNX833X_UART0_PORTS_END (PNX833X_BASE + 0xBFFF)
+#define PNX833X_UART1_PORTS_START (PNX833X_BASE + 0xC000)
+#define PNX833X_UART1_PORTS_END (PNX833X_BASE + 0xCFFF)
+
+#define PNX833X_USB_PORTS_START (PNX833X_BASE + 0x19000)
+#define PNX833X_USB_PORTS_END (PNX833X_BASE + 0x19FFF)
+
+#define PNX833X_CONFIG_USB PNX833X_REG(0x7008)
+
+#define PNX833X_I2C0_PORTS_START (PNX833X_BASE + 0xD000)
+#define PNX833X_I2C0_PORTS_END (PNX833X_BASE + 0xDFFF)
+#define PNX833X_I2C1_PORTS_START (PNX833X_BASE + 0xE000)
+#define PNX833X_I2C1_PORTS_END (PNX833X_BASE + 0xEFFF)
+
+#define PNX833X_IDE_PORTS_START (PNX833X_BASE + 0x1A000)
+#define PNX833X_IDE_PORTS_END (PNX833X_BASE + 0x1AFFF)
+#define PNX833X_IDE_MODULE_ID PNX833X_REG(0x1AFFC)
+
+#define PNX833X_IDE_MODULE_ID_MODULE_ID_MASK 0xFFFF0000
+#define PNX833X_IDE_MODULE_ID_MODULE_ID_SHIFT 16
+#define PNX833X_IDE_MODULE_ID_VALUE 0xA009
+
+
+#define PNX833X_MIU_SEL0 PNX833X_REG(0x2004)
+#define PNX833X_MIU_SEL0_TIMING PNX833X_REG(0x2008)
+#define PNX833X_MIU_SEL1 PNX833X_REG(0x200C)
+#define PNX833X_MIU_SEL1_TIMING PNX833X_REG(0x2010)
+#define PNX833X_MIU_SEL2 PNX833X_REG(0x2014)
+#define PNX833X_MIU_SEL2_TIMING PNX833X_REG(0x2018)
+#define PNX833X_MIU_SEL3 PNX833X_REG(0x201C)
+#define PNX833X_MIU_SEL3_TIMING PNX833X_REG(0x2020)
+
+#define PNX833X_MIU_SEL0_SPI_MODE_ENABLE_MASK (1 << 14)
+#define PNX833X_MIU_SEL0_SPI_MODE_ENABLE_SHIFT 14
+
+#define PNX833X_MIU_SEL0_BURST_MODE_ENABLE_MASK (1 << 7)
+#define PNX833X_MIU_SEL0_BURST_MODE_ENABLE_SHIFT 7
+
+#define PNX833X_MIU_SEL0_BURST_PAGE_LEN_MASK (0xF << 9)
+#define PNX833X_MIU_SEL0_BURST_PAGE_LEN_SHIFT 9
+
+#define PNX833X_MIU_CONFIG_SPI PNX833X_REG(0x2000)
+
+#define PNX833X_MIU_CONFIG_SPI_OPCODE_MASK (0xFF << 3)
+#define PNX833X_MIU_CONFIG_SPI_OPCODE_SHIFT 3
+
+#define PNX833X_MIU_CONFIG_SPI_DATA_ENABLE_MASK (1 << 2)
+#define PNX833X_MIU_CONFIG_SPI_DATA_ENABLE_SHIFT 2
+
+#define PNX833X_MIU_CONFIG_SPI_ADDR_ENABLE_MASK (1 << 1)
+#define PNX833X_MIU_CONFIG_SPI_ADDR_ENABLE_SHIFT 1
+
+#define PNX833X_MIU_CONFIG_SPI_SYNC_MASK (1 << 0)
+#define PNX833X_MIU_CONFIG_SPI_SYNC_SHIFT 0
+
+#define PNX833X_WRITE_CONFIG_SPI(opcode, data_enable, addr_enable, sync) \
+ (PNX833X_MIU_CONFIG_SPI = \
+ ((opcode) << PNX833X_MIU_CONFIG_SPI_OPCODE_SHIFT) | \
+ ((data_enable) << PNX833X_MIU_CONFIG_SPI_DATA_ENABLE_SHIFT) | \
+ ((addr_enable) << PNX833X_MIU_CONFIG_SPI_ADDR_ENABLE_SHIFT) | \
+ ((sync) << PNX833X_MIU_CONFIG_SPI_SYNC_SHIFT))
+
+#define PNX8335_IP3902_PORTS_START (PNX833X_BASE + 0x2F000)
+#define PNX8335_IP3902_PORTS_END (PNX833X_BASE + 0x2FFFF)
+#define PNX8335_IP3902_MODULE_ID PNX833X_REG(0x2FFFC)
+
+#define PNX8335_IP3902_MODULE_ID_MODULE_ID_MASK 0xFFFF0000
+#define PNX8335_IP3902_MODULE_ID_MODULE_ID_SHIFT 16
+#define PNX8335_IP3902_MODULE_ID_VALUE 0x3902
+
+ /* I/O location(gets remapped)*/
+#define PNX8335_NAND_BASE 0x18000000
+/* I/O location with CLE high */
+#define PNX8335_NAND_CLE_MASK 0x00100000
+/* I/O location with ALE high */
+#define PNX8335_NAND_ALE_MASK 0x00010000
+
+#define PNX8335_SATA_PORTS_START (PNX833X_BASE + 0x2E000)
+#define PNX8335_SATA_PORTS_END (PNX833X_BASE + 0x2EFFF)
+#define PNX8335_SATA_MODULE_ID PNX833X_REG(0x2EFFC)
+
+#define PNX8335_SATA_MODULE_ID_MODULE_ID_MASK 0xFFFF0000
+#define PNX8335_SATA_MODULE_ID_MODULE_ID_SHIFT 16
+#define PNX8335_SATA_MODULE_ID_VALUE 0xA099
+
+#endif
diff --git a/arch/mips/include/asm/mach-pnx833x/war.h b/arch/mips/include/asm/mach-pnx833x/war.h
new file mode 100644
index 000000000000..82cd1e97bc2e
--- /dev/null
+++ b/arch/mips/include/asm/mach-pnx833x/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_PNX833X_WAR_H
+#define __ASM_MIPS_MACH_PNX833X_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_PNX8550_WAR_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/include/asm/mach-tx49xx/mangle-port.h
new file mode 100644
index 000000000000..5e6912fdd0ed
--- /dev/null
+++ b/arch/mips/include/asm/mach-tx49xx/mangle-port.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H
+#define __ASM_MACH_TX49XX_MANGLE_PORT_H
+
+#define __swizzle_addr_b(port) (port)
+#define __swizzle_addr_w(port) (port)
+#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
+
+#define ioswabb(a, x) (x)
+#define __mem_ioswabb(a, x) (x)
+#if defined(CONFIG_TOSHIBA_RBTX4939) && \
+ (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)) && \
+ defined(__BIG_ENDIAN)
+#define NEEDS_TXX9_IOSWABW
+extern u16 (*ioswabw)(volatile u16 *a, u16 x);
+extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x);
+#else
+#define ioswabw(a, x) le16_to_cpu(x)
+#define __mem_ioswabw(a, x) (x)
+#endif
+#define ioswabl(a, x) le32_to_cpu(x)
+#define __mem_ioswabl(a, x) (x)
+#define ioswabq(a, x) le64_to_cpu(x)
+#define __mem_ioswabq(a, x) (x)
+
+#endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 979866000da4..9316324d070d 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -192,6 +192,7 @@
#define PM_16M 0x01ffe000
#define PM_64M 0x07ffe000
#define PM_256M 0x1fffe000
+#define PM_1G 0x7fffe000
#endif
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index de6d09ebbd80..e2e09b2cd265 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -98,6 +98,8 @@ search_module_dbetables(unsigned long addr)
#define MODULE_PROC_FAMILY "R5000 "
#elif defined CONFIG_CPU_R5432
#define MODULE_PROC_FAMILY "R5432 "
+#elif defined CONFIG_CPU_R5500
+#define MODULE_PROC_FAMILY "R5500 "
#elif defined CONFIG_CPU_R6000
#define MODULE_PROC_FAMILY "R6000 "
#elif defined CONFIG_CPU_NEVADA
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 9c22571b160d..813abd16255d 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -80,25 +80,25 @@ enum pt_watch_style {
pt_watch_style_mips64
};
struct mips32_watch_regs {
- uint32_t watchlo[8];
+ unsigned int watchlo[8];
/* Lower 16 bits of watchhi. */
- uint16_t watchhi[8];
+ unsigned short watchhi[8];
/* Valid mask and I R W bits.
* bit 0 -- 1 if W bit is usable.
* bit 1 -- 1 if R bit is usable.
* bit 2 -- 1 if I bit is usable.
* bits 3 - 11 -- Valid watchhi mask bits.
*/
- uint16_t watch_masks[8];
+ unsigned short watch_masks[8];
/* The number of valid watch register pairs. */
- uint32_t num_valid;
+ unsigned int num_valid;
} __attribute__((aligned(8)));
struct mips64_watch_regs {
- uint64_t watchlo[8];
- uint16_t watchhi[8];
- uint16_t watch_masks[8];
- uint32_t num_valid;
+ unsigned long long watchlo[8];
+ unsigned short watchhi[8];
+ unsigned short watch_masks[8];
+ unsigned int num_valid;
} __attribute__((aligned(8)));
struct pt_watch_regs {
@@ -116,6 +116,7 @@ struct pt_watch_regs {
#include <linux/compiler.h>
#include <linux/linkage.h>
+#include <linux/types.h>
#include <asm/isadep.h>
struct task_struct;
diff --git a/arch/mips/include/asm/txx9/generic.h b/arch/mips/include/asm/txx9/generic.h
index 4316a3e57678..9cde0090cbf6 100644
--- a/arch/mips/include/asm/txx9/generic.h
+++ b/arch/mips/include/asm/txx9/generic.h
@@ -86,4 +86,9 @@ void txx9_iocled_init(unsigned long baseaddr,
int basenum, unsigned int num, int lowactive,
const char *color, char **deftriggers);
+/* 7SEG LED */
+void txx9_7segled_init(unsigned int num,
+ void (*putc)(unsigned int pos, unsigned char val));
+int txx9_7segled_putc(unsigned int pos, char c);
+
#endif /* __ASM_TXX9_GENERIC_H */
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index d9da7112aaf8..b1372c27f136 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5432) += r4k_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_R5500) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R8000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_RM7000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 0cf15457ecac..c9207b5fd923 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -286,11 +286,12 @@ static inline int __cpu_has_fpu(void)
#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
| MIPS_CPU_COUNTER)
-static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
+static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
{
switch (c->processor_id & 0xff00) {
case PRID_IMP_R2000:
c->cputype = CPU_R2000;
+ __cpu_name[cpu] = "R2000";
c->isa_level = MIPS_CPU_ISA_I;
c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
MIPS_CPU_NOFPUEX;
@@ -299,13 +300,19 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
c->tlbsize = 64;
break;
case PRID_IMP_R3000:
- if ((c->processor_id & 0xff) == PRID_REV_R3000A)
- if (cpu_has_confreg())
+ if ((c->processor_id & 0xff) == PRID_REV_R3000A) {
+ if (cpu_has_confreg()) {
c->cputype = CPU_R3081E;
- else
+ __cpu_name[cpu] = "R3081";
+ } else {
c->cputype = CPU_R3000A;
- else
+ __cpu_name[cpu] = "R3000A";
+ }
+ break;
+ } else {
c->cputype = CPU_R3000;
+ __cpu_name[cpu] = "R3000";
+ }
c->isa_level = MIPS_CPU_ISA_I;
c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
MIPS_CPU_NOFPUEX;
@@ -315,15 +322,21 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R4000:
if (read_c0_config() & CONF_SC) {
- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
+ if ((c->processor_id & 0xff) >= PRID_REV_R4400) {
c->cputype = CPU_R4400PC;
- else
+ __cpu_name[cpu] = "R4400PC";
+ } else {
c->cputype = CPU_R4000PC;
+ __cpu_name[cpu] = "R4000PC";
+ }
} else {
- if ((c->processor_id & 0xff) >= PRID_REV_R4400)
+ if ((c->processor_id & 0xff) >= PRID_REV_R4400) {
c->cputype = CPU_R4400SC;
- else
+ __cpu_name[cpu] = "R4400SC";
+ } else {
c->cputype = CPU_R4000SC;
+ __cpu_name[cpu] = "R4000SC";
+ }
}
c->isa_level = MIPS_CPU_ISA_III;
@@ -336,25 +349,34 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
switch (c->processor_id & 0xf0) {
case PRID_REV_VR4111:
c->cputype = CPU_VR4111;
+ __cpu_name[cpu] = "NEC VR4111";
break;
case PRID_REV_VR4121:
c->cputype = CPU_VR4121;
+ __cpu_name[cpu] = "NEC VR4121";
break;
case PRID_REV_VR4122:
- if ((c->processor_id & 0xf) < 0x3)
+ if ((c->processor_id & 0xf) < 0x3) {
c->cputype = CPU_VR4122;
- else
+ __cpu_name[cpu] = "NEC VR4122";
+ } else {
c->cputype = CPU_VR4181A;
+ __cpu_name[cpu] = "NEC VR4181A";
+ }
break;
case PRID_REV_VR4130:
- if ((c->processor_id & 0xf) < 0x4)
+ if ((c->processor_id & 0xf) < 0x4) {
c->cputype = CPU_VR4131;
- else
+ __cpu_name[cpu] = "NEC VR4131";
+ } else {
c->cputype = CPU_VR4133;
+ __cpu_name[cpu] = "NEC VR4133";
+ }
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
c->cputype = CPU_VR41XX;
+ __cpu_name[cpu] = "NEC Vr41xx";
break;
}
c->isa_level = MIPS_CPU_ISA_III;
@@ -363,6 +385,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R4300:
c->cputype = CPU_R4300;
+ __cpu_name[cpu] = "R4300";
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_LLSC;
@@ -370,6 +393,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R4600:
c->cputype = CPU_R4600;
+ __cpu_name[cpu] = "R4600";
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_LLSC;
@@ -384,6 +408,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
* it's c0_prid id number with the TX3900.
*/
c->cputype = CPU_R4650;
+ __cpu_name[cpu] = "R4650";
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
c->tlbsize = 48;
@@ -395,25 +420,26 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
c->cputype = CPU_TX3927;
+ __cpu_name[cpu] = "TX3927";
c->tlbsize = 64;
} else {
switch (c->processor_id & 0xff) {
case PRID_REV_TX3912:
c->cputype = CPU_TX3912;
+ __cpu_name[cpu] = "TX3912";
c->tlbsize = 32;
break;
case PRID_REV_TX3922:
c->cputype = CPU_TX3922;
+ __cpu_name[cpu] = "TX3922";
c->tlbsize = 64;
break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
}
}
break;
case PRID_IMP_R4700:
c->cputype = CPU_R4700;
+ __cpu_name[cpu] = "R4700";
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_LLSC;
@@ -421,6 +447,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_TX49:
c->cputype = CPU_TX49XX;
+ __cpu_name[cpu] = "R49XX";
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS | MIPS_CPU_LLSC;
if (!(c->processor_id & 0x08))
@@ -429,6 +456,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R5000:
c->cputype = CPU_R5000;
+ __cpu_name[cpu] = "R5000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_LLSC;
@@ -436,6 +464,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R5432:
c->cputype = CPU_R5432;
+ __cpu_name[cpu] = "R5432";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_WATCH | MIPS_CPU_LLSC;
@@ -443,6 +472,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R5500:
c->cputype = CPU_R5500;
+ __cpu_name[cpu] = "R5500";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_WATCH | MIPS_CPU_LLSC;
@@ -450,6 +480,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_NEVADA:
c->cputype = CPU_NEVADA;
+ __cpu_name[cpu] = "Nevada";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
@@ -457,6 +488,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R6000:
c->cputype = CPU_R6000;
+ __cpu_name[cpu] = "R6000";
c->isa_level = MIPS_CPU_ISA_II;
c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
MIPS_CPU_LLSC;
@@ -464,6 +496,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R6000A:
c->cputype = CPU_R6000A;
+ __cpu_name[cpu] = "R6000A";
c->isa_level = MIPS_CPU_ISA_II;
c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
MIPS_CPU_LLSC;
@@ -471,6 +504,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_RM7000:
c->cputype = CPU_RM7000;
+ __cpu_name[cpu] = "RM7000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_LLSC;
@@ -486,6 +520,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_RM9000:
c->cputype = CPU_RM9000;
+ __cpu_name[cpu] = "RM9000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
MIPS_CPU_LLSC;
@@ -500,6 +535,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R8000:
c->cputype = CPU_R8000;
+ __cpu_name[cpu] = "RM8000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
MIPS_CPU_FPU | MIPS_CPU_32FPR |
@@ -508,6 +544,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R10000:
c->cputype = CPU_R10000;
+ __cpu_name[cpu] = "R10000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
MIPS_CPU_FPU | MIPS_CPU_32FPR |
@@ -517,6 +554,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R12000:
c->cputype = CPU_R12000;
+ __cpu_name[cpu] = "R12000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
MIPS_CPU_FPU | MIPS_CPU_32FPR |
@@ -526,6 +564,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_R14000:
c->cputype = CPU_R14000;
+ __cpu_name[cpu] = "R14000";
c->isa_level = MIPS_CPU_ISA_IV;
c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
MIPS_CPU_FPU | MIPS_CPU_32FPR |
@@ -535,6 +574,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
break;
case PRID_IMP_LOONGSON2:
c->cputype = CPU_LOONGSON2;
+ __cpu_name[cpu] = "ICT Loongson-2";
c->isa_level = MIPS_CPU_ISA_III;
c->options = R4K_OPTS |
MIPS_CPU_FPU | MIPS_CPU_LLSC |
@@ -652,21 +692,24 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
static void __cpuinit decode_configs(struct cpuinfo_mips *c)
{
+ int ok;
+
/* MIPS32 or MIPS64 compliant CPU. */
c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
c->scache.flags = MIPS_CACHE_NOT_PRESENT;
- /* Read Config registers. */
- if (!decode_config0(c))
- return; /* actually worth a panic() */
- if (!decode_config1(c))
- return;
- if (!decode_config2(c))
- return;
- if (!decode_config3(c))
- return;
+ ok = decode_config0(c); /* Read Config registers. */
+ BUG_ON(!ok); /* Arch spec violation! */
+ if (ok)
+ ok = decode_config1(c);
+ if (ok)
+ ok = decode_config2(c);
+ if (ok)
+ ok = decode_config3(c);
+
+ mips_probe_watch_registers(c);
}
#ifdef CONFIG_CPU_MIPSR2
@@ -675,52 +718,62 @@ extern void spram_config(void);
static inline void spram_config(void) {}
#endif
-static inline void cpu_probe_mips(struct cpuinfo_mips *c)
+static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
- mips_probe_watch_registers(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_4KC:
c->cputype = CPU_4KC;
+ __cpu_name[cpu] = "MIPS 4Kc";
break;
case PRID_IMP_4KEC:
c->cputype = CPU_4KEC;
+ __cpu_name[cpu] = "MIPS 4KEc";
break;
case PRID_IMP_4KECR2:
c->cputype = CPU_4KEC;
+ __cpu_name[cpu] = "MIPS 4KEc";
break;
case PRID_IMP_4KSC:
case PRID_IMP_4KSD:
c->cputype = CPU_4KSC;
+ __cpu_name[cpu] = "MIPS 4KSc";
break;
case PRID_IMP_5KC:
c->cputype = CPU_5KC;
+ __cpu_name[cpu] = "MIPS 5Kc";
break;
case PRID_IMP_20KC:
c->cputype = CPU_20KC;
+ __cpu_name[cpu] = "MIPS 20Kc";
break;
case PRID_IMP_24K:
case PRID_IMP_24KE:
c->cputype = CPU_24K;
+ __cpu_name[cpu] = "MIPS 24Kc";
break;
case PRID_IMP_25KF:
c->cputype = CPU_25KF;
+ __cpu_name[cpu] = "MIPS 25Kc";
break;
case PRID_IMP_34K:
c->cputype = CPU_34K;
+ __cpu_name[cpu] = "MIPS 34Kc";
break;
case PRID_IMP_74K:
c->cputype = CPU_74K;
+ __cpu_name[cpu] = "MIPS 74Kc";
break;
case PRID_IMP_1004K:
c->cputype = CPU_1004K;
+ __cpu_name[cpu] = "MIPS 1004Kc";
break;
}
spram_config();
}
-static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
+static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
switch (c->processor_id & 0xff00) {
@@ -729,23 +782,31 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
switch ((c->processor_id >> 24) & 0xff) {
case 0:
c->cputype = CPU_AU1000;
+ __cpu_name[cpu] = "Au1000";
break;
case 1:
c->cputype = CPU_AU1500;
+ __cpu_name[cpu] = "Au1500";
break;
case 2:
c->cputype = CPU_AU1100;
+ __cpu_name[cpu] = "Au1100";
break;
case 3:
c->cputype = CPU_AU1550;
+ __cpu_name[cpu] = "Au1550";
break;
case 4:
c->cputype = CPU_AU1200;
- if (2 == (c->processor_id & 0xff))
+ __cpu_name[cpu] = "Au1200";
+ if ((c->processor_id & 0xff) == 2) {
c->cputype = CPU_AU1250;
+ __cpu_name[cpu] = "Au1250";
+ }
break;
case 5:
c->cputype = CPU_AU1210;
+ __cpu_name[cpu] = "Au1210";
break;
default:
panic("Unknown Au Core!");
@@ -755,154 +816,67 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
}
}
-static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
+static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_SB1:
c->cputype = CPU_SB1;
+ __cpu_name[cpu] = "SiByte SB1";
/* FPU in pass1 is known to have issues. */
if ((c->processor_id & 0xff) < 0x02)
c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
break;
case PRID_IMP_SB1A:
c->cputype = CPU_SB1A;
+ __cpu_name[cpu] = "SiByte SB1A";
break;
}
}
-static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
+static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_SR71000:
c->cputype = CPU_SR71000;
+ __cpu_name[cpu] = "Sandcraft SR71000";
c->scache.ways = 8;
c->tlbsize = 64;
break;
}
}
-static inline void cpu_probe_nxp(struct cpuinfo_mips *c)
+static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_PR4450:
c->cputype = CPU_PR4450;
+ __cpu_name[cpu] = "Philips PR4450";
c->isa_level = MIPS_CPU_ISA_M32R1;
break;
- default:
- panic("Unknown NXP Core!"); /* REVISIT: die? */
- break;
}
}
-
-static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_BCM3302:
c->cputype = CPU_BCM3302;
+ __cpu_name[cpu] = "Broadcom BCM3302";
break;
case PRID_IMP_BCM4710:
c->cputype = CPU_BCM4710;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
+ __cpu_name[cpu] = "Broadcom BCM4710";
break;
}
}
const char *__cpu_name[NR_CPUS];
-/*
- * Name a CPU
- */
-static __cpuinit const char *cpu_to_name(struct cpuinfo_mips *c)
-{
- const char *name = NULL;
-
- switch (c->cputype) {
- case CPU_UNKNOWN: name = "unknown"; break;
- case CPU_R2000: name = "R2000"; break;
- case CPU_R3000: name = "R3000"; break;
- case CPU_R3000A: name = "R3000A"; break;
- case CPU_R3041: name = "R3041"; break;
- case CPU_R3051: name = "R3051"; break;
- case CPU_R3052: name = "R3052"; break;
- case CPU_R3081: name = "R3081"; break;
- case CPU_R3081E: name = "R3081E"; break;
- case CPU_R4000PC: name = "R4000PC"; break;
- case CPU_R4000SC: name = "R4000SC"; break;
- case CPU_R4000MC: name = "R4000MC"; break;
- case CPU_R4200: name = "R4200"; break;
- case CPU_R4400PC: name = "R4400PC"; break;
- case CPU_R4400SC: name = "R4400SC"; break;
- case CPU_R4400MC: name = "R4400MC"; break;
- case CPU_R4600: name = "R4600"; break;
- case CPU_R6000: name = "R6000"; break;
- case CPU_R6000A: name = "R6000A"; break;
- case CPU_R8000: name = "R8000"; break;
- case CPU_R10000: name = "R10000"; break;
- case CPU_R12000: name = "R12000"; break;
- case CPU_R14000: name = "R14000"; break;
- case CPU_R4300: name = "R4300"; break;
- case CPU_R4650: name = "R4650"; break;
- case CPU_R4700: name = "R4700"; break;
- case CPU_R5000: name = "R5000"; break;
- case CPU_R5000A: name = "R5000A"; break;
- case CPU_R4640: name = "R4640"; break;
- case CPU_NEVADA: name = "Nevada"; break;
- case CPU_RM7000: name = "RM7000"; break;
- case CPU_RM9000: name = "RM9000"; break;
- case CPU_R5432: name = "R5432"; break;
- case CPU_4KC: name = "MIPS 4Kc"; break;
- case CPU_5KC: name = "MIPS 5Kc"; break;
- case CPU_R4310: name = "R4310"; break;
- case CPU_SB1: name = "SiByte SB1"; break;
- case CPU_SB1A: name = "SiByte SB1A"; break;
- case CPU_TX3912: name = "TX3912"; break;
- case CPU_TX3922: name = "TX3922"; break;
- case CPU_TX3927: name = "TX3927"; break;
- case CPU_AU1000: name = "Au1000"; break;
- case CPU_AU1500: name = "Au1500"; break;
- case CPU_AU1100: name = "Au1100"; break;
- case CPU_AU1550: name = "Au1550"; break;
- case CPU_AU1200: name = "Au1200"; break;
- case CPU_AU1210: name = "Au1210"; break;
- case CPU_AU1250: name = "Au1250"; break;
- case CPU_4KEC: name = "MIPS 4KEc"; break;
- case CPU_4KSC: name = "MIPS 4KSc"; break;
- case CPU_VR41XX: name = "NEC Vr41xx"; break;
- case CPU_R5500: name = "R5500"; break;
- case CPU_TX49XX: name = "TX49xx"; break;
- case CPU_20KC: name = "MIPS 20Kc"; break;
- case CPU_24K: name = "MIPS 24K"; break;
- case CPU_25KF: name = "MIPS 25Kf"; break;
- case CPU_34K: name = "MIPS 34K"; break;
- case CPU_1004K: name = "MIPS 1004K"; break;
- case CPU_74K: name = "MIPS 74K"; break;
- case CPU_VR4111: name = "NEC VR4111"; break;
- case CPU_VR4121: name = "NEC VR4121"; break;
- case CPU_VR4122: name = "NEC VR4122"; break;
- case CPU_VR4131: name = "NEC VR4131"; break;
- case CPU_VR4133: name = "NEC VR4133"; break;
- case CPU_VR4181: name = "NEC VR4181"; break;
- case CPU_VR4181A: name = "NEC VR4181A"; break;
- case CPU_SR71000: name = "Sandcraft SR71000"; break;
- case CPU_BCM3302: name = "Broadcom BCM3302"; break;
- case CPU_BCM4710: name = "Broadcom BCM4710"; break;
- case CPU_PR4450: name = "Philips PR4450"; break;
- case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
- default:
- BUG();
- }
-
- return name;
-}
-
__cpuinit void cpu_probe(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
@@ -915,30 +889,31 @@ __cpuinit void cpu_probe(void)
c->processor_id = read_c0_prid();
switch (c->processor_id & 0xff0000) {
case PRID_COMP_LEGACY:
- cpu_probe_legacy(c);
+ cpu_probe_legacy(c, cpu);
break;
case PRID_COMP_MIPS:
- cpu_probe_mips(c);
+ cpu_probe_mips(c, cpu);
break;
case PRID_COMP_ALCHEMY:
- cpu_probe_alchemy(c);
+ cpu_probe_alchemy(c, cpu);
break;
case PRID_COMP_SIBYTE:
- cpu_probe_sibyte(c);
+ cpu_probe_sibyte(c, cpu);
break;
case PRID_COMP_BROADCOM:
- cpu_probe_broadcom(c);
+ cpu_probe_broadcom(c, cpu);
break;
case PRID_COMP_SANDCRAFT:
- cpu_probe_sandcraft(c);
+ cpu_probe_sandcraft(c, cpu);
break;
case PRID_COMP_NXP:
- cpu_probe_nxp(c);
+ cpu_probe_nxp(c, cpu);
break;
- default:
- c->cputype = CPU_UNKNOWN;
}
+ BUG_ON(!__cpu_name[cpu]);
+ BUG_ON(c->cputype == CPU_UNKNOWN);
+
/*
* Platform code can force the cpu type to optimize code
* generation. In that case be sure the cpu type is correctly
@@ -958,8 +933,6 @@ __cpuinit void cpu_probe(void)
}
}
- __cpu_name[cpu] = cpu_to_name(c);
-
if (cpu_has_mips_r2)
c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
else
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 5e75a316f6b1..759f68066b5d 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -180,7 +180,7 @@ bad_stack:
* The system call does not exist in this kernel
*/
illegal_syscall:
- li v0, -ENOSYS # error
+ li v0, ENOSYS # error
sw v0, PT_R2(sp)
li t0, 1 # set error flag
sw t0, PT_R7(sp)
@@ -293,7 +293,7 @@ bad_alignment:
jr t2
/* Unreached */
-einval: li v0, -EINVAL
+einval: li v0, -ENOSYS
jr ra
END(sys_syscall)
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 3d58204c9d44..a9e171618994 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -117,7 +117,7 @@ syscall_trace_entry:
illegal_syscall:
/* This also isn't a 64-bit syscall, throw an error. */
- li v0, -ENOSYS # error
+ li v0, ENOSYS # error
sd v0, PT_R2(sp)
li t0, 1 # set error flag
sd t0, PT_R7(sp)
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 16f8edfe5cdc..4430a1f8fdf1 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -601,8 +601,8 @@ static int __init debugfs_mips(void)
struct dentry *d;
d = debugfs_create_dir("mips", NULL);
- if (IS_ERR(d))
- return PTR_ERR(d);
+ if (!d)
+ return -ENOMEM;
mips_debugfs_dir = d;
return 0;
}
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 7b59cfb7e602..8bf88faf5afd 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -163,8 +163,10 @@ static void stop_this_cpu(void *dummy)
* Remove this CPU:
*/
cpu_clear(smp_processor_id(), cpu_online_map);
- local_irq_enable(); /* May need to service _machine_restart IPI */
- for (;;); /* Wait if available. */
+ for (;;) {
+ if (cpu_wait)
+ (*cpu_wait)(); /* Wait if available. */
+ }
}
void smp_send_stop(void)
@@ -193,12 +195,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
/* preload SMP state for boot cpu */
void __devinit smp_prepare_boot_cpu(void)
{
- /*
- * This assumes that bootup is always handled by the processor
- * with the logic and physical number 0.
- */
- __cpu_number_map[0] = 0;
- __cpu_logical_map[0] = 0;
cpu_set(0, phys_cpu_present_map);
cpu_set(0, cpu_online_map);
cpu_set(0, cpu_callin_map);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 80b9e070c207..353056110f2b 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -32,6 +32,7 @@
#include <asm/cpu.h>
#include <asm/dsp.h>
#include <asm/fpu.h>
+#include <asm/fpu_emulator.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
#include <asm/module.h>
@@ -722,6 +723,21 @@ static void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
die_if_kernel("Kernel bug detected", regs);
force_sig(SIGTRAP, current);
break;
+ case BRK_MEMU:
+ /*
+ * Address errors may be deliberately induced by the FPU
+ * emulator to retake control of the CPU after executing the
+ * instruction in the delay slot of an emulated branch.
+ *
+ * Terminate if exception was recognized as a delay slot return
+ * otherwise handle as normal.
+ */
+ if (do_dsemulret(regs))
+ return;
+
+ die_if_kernel("Math emu break/trap", regs);
+ force_sig(SIGTRAP, current);
+ break;
default:
scnprintf(b, sizeof(b), "%s instruction in kernel code", str);
die_if_kernel(b, regs);
@@ -1555,6 +1571,8 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
#ifdef CONFIG_64BIT
unsigned long uncached_ebase = TO_UNCAC(ebase);
#endif
+ if (cpu_has_mips_r2)
+ ebase += (read_c0_ebase() & 0x3ffff000);
if (!addr)
panic(panic_null_cerr);
@@ -1588,8 +1606,11 @@ void __init trap_init(void)
if (cpu_has_veic || cpu_has_vint)
ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
- else
+ else {
ebase = CAC_BASE;
+ if (cpu_has_mips_r2)
+ ebase += (read_c0_ebase() & 0x3ffff000);
+ }
per_cpu_trap_init();
@@ -1697,11 +1718,11 @@ void __init trap_init(void)
if (cpu_has_vce)
/* Special exception: R4[04]00 uses also the divec space. */
- memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
+ memcpy((void *)(ebase + 0x180), &except_vec3_r4000, 0x100);
else if (cpu_has_4kex)
- memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
+ memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
else
- memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
+ memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
signal_init();
#ifdef CONFIG_MIPS32_COMPAT
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index c327b21bca81..bf4c4a979abb 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -499,22 +499,10 @@ sigill:
asmlinkage void do_ade(struct pt_regs *regs)
{
- extern int do_dsemulret(struct pt_regs *);
unsigned int __user *pc;
mm_segment_t seg;
/*
- * Address errors may be deliberately induced by the FPU emulator to
- * retake control of the CPU after executing the instruction in the
- * delay slot of an emulated branch.
- */
- /* Terminate if exception was recognized as a delay slot return */
- if (do_dsemulret(regs))
- return;
-
- /* Otherwise handle as normal */
-
- /*
* Did we catch a fault trying to load an instruction?
* Or are we running in MIPS16 mode?
*/
@@ -560,12 +548,12 @@ static int __init debugfs_unaligned(void)
return -ENODEV;
d = debugfs_create_u32("unaligned_instructions", S_IRUGO,
mips_debugfs_dir, &unaligned_instructions);
- if (IS_ERR(d))
- return PTR_ERR(d);
+ if (!d)
+ return -ENOMEM;
d = debugfs_create_u32("unaligned_action", S_IRUGO | S_IWUSR,
mips_debugfs_dir, &unaligned_action);
- if (IS_ERR(d))
- return PTR_ERR(d);
+ if (!d)
+ return -ENOMEM;
return 0;
}
__initcall(debugfs_unaligned);
diff --git a/arch/mips/lemote/lm2e/pci.c b/arch/mips/lemote/lm2e/pci.c
index c1e41f15cc7e..8be03a8e1ad4 100644
--- a/arch/mips/lemote/lm2e/pci.c
+++ b/arch/mips/lemote/lm2e/pci.c
@@ -30,19 +30,20 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/mips-boards/bonito64.h>
+#include <asm/mach-lemote/pci.h>
extern struct pci_ops bonito64_pci_ops;
static struct resource loongson2e_pci_mem_resource = {
.name = "LOONGSON2E PCI MEM",
- .start = 0x14000000UL,
- .end = 0x1fffffffUL,
+ .start = LOONGSON2E_PCI_MEM_START,
+ .end = LOONGSON2E_PCI_MEM_END,
.flags = IORESOURCE_MEM,
};
static struct resource loongson2e_pci_io_resource = {
.name = "LOONGSON2E PCI IO MEM",
- .start = 0x00004000UL,
+ .start = LOONGSON2E_PCI_IO_START,
.end = IO_SPACE_LIMIT,
.flags = IORESOURCE_IO,
};
@@ -82,6 +83,12 @@ static void __init ict_pcimap(void)
static int __init pcibios_init(void)
{
ict_pcimap();
+
+ loongson2e_pci_controller.io_map_base =
+ (unsigned long) ioremap(LOONGSON2E_IO_PORT_BASE,
+ loongson2e_pci_io_resource.end -
+ loongson2e_pci_io_resource.start + 1);
+
register_pci_controller(&loongson2e_pci_controller);
return 0;
diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c
index 2cc6745991ab..ebd6ceaef2fd 100644
--- a/arch/mips/lemote/lm2e/setup.c
+++ b/arch/mips/lemote/lm2e/setup.c
@@ -34,6 +34,7 @@
#include <asm/mc146818-time.h>
#include <asm/time.h>
#include <asm/wbflush.h>
+#include <asm/mach-lemote/pci.h>
#ifdef CONFIG_VT
#include <linux/console.h>
@@ -42,12 +43,6 @@
extern void mips_reboot_setup(void);
-#ifdef CONFIG_64BIT
-#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p)))
-#else
-#define PTR_PAD(p) (p)
-#endif
-
unsigned long cpu_clock_freq;
unsigned long bus_clock;
unsigned int memsize;
@@ -80,8 +75,8 @@ static void wbflush_loongson2e(void)
void __init plat_mem_setup(void)
{
- set_io_port_base(PTR_PAD(0xbfd00000));
-
+ set_io_port_base((unsigned long)ioremap(LOONGSON2E_IO_PORT_BASE,
+ IO_SPACE_LIMIT - LOONGSON2E_PCI_IO_START + 1));
mips_reboot_setup();
__wbflush = wbflush_loongson2e;
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 8810dfb915dd..dbcf6511b74e 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_CPU_R4300) += dump_tlb.o
obj-$(CONFIG_CPU_R4X00) += dump_tlb.o
obj-$(CONFIG_CPU_R5000) += dump_tlb.o
obj-$(CONFIG_CPU_R5432) += dump_tlb.o
+obj-$(CONFIG_CPU_R5500) += dump_tlb.o
obj-$(CONFIG_CPU_R6000) +=
obj-$(CONFIG_CPU_R8000) +=
obj-$(CONFIG_CPU_RM7000) += dump_tlb.o
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 465ff0ec85b9..779821cd54ab 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -25,6 +25,7 @@ static inline const char *msk2str(unsigned int mask)
case PM_16M: return "16Mb";
case PM_64M: return "64Mb";
case PM_256M: return "256Mb";
+ case PM_1G: return "1Gb";
#endif
}
return "";
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index b08fc65c13a6..890f77927d62 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -48,7 +48,6 @@
#include <asm/branch.h>
#include "ieee754.h"
-#include "dsemul.h"
/* Strap kernel emulator for full MIPS IV emulation */
@@ -346,9 +345,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
/* cop control register rd -> gpr[rt] */
u32 value;
- if (ir == CP1UNDEF) {
- return do_dsemulret(xcp);
- }
if (MIPSInst_RD(ir) == FPCREG_CSR) {
value = ctx->fcr31;
value = (value & ~0x3) | mips_rm[value & 0x3];
@@ -1299,12 +1295,12 @@ static int __init debugfs_fpuemu(void)
if (!mips_debugfs_dir)
return -ENODEV;
dir = debugfs_create_dir("fpuemustats", mips_debugfs_dir);
- if (IS_ERR(dir))
- return PTR_ERR(dir);
+ if (!dir)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(vars); i++) {
d = debugfs_create_u32(vars[i].name, S_IRUGO, dir, vars[i].v);
- if (IS_ERR(d))
- return PTR_ERR(d);
+ if (!d)
+ return -ENOMEM;
}
return 0;
}
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c
index 653e325849e4..df7b9d928efc 100644
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -18,7 +18,6 @@
#include <asm/fpu_emulator.h>
#include "ieee754.h"
-#include "dsemul.h"
/* Strap kernel emulator for full MIPS IV emulation */
@@ -94,7 +93,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
return SIGBUS;
err = __put_user(ir, &fr->emul);
- err |= __put_user((mips_instruction)BADINST, &fr->badinst);
+ err |= __put_user((mips_instruction)BREAK_MATH, &fr->badinst);
err |= __put_user((mips_instruction)BD_COOKIE, &fr->cookie);
err |= __put_user(cpc, &fr->epc);
@@ -130,13 +129,13 @@ int do_dsemulret(struct pt_regs *xcp)
/*
* Do some sanity checking on the stackframe:
*
- * - Is the instruction pointed to by the EPC an BADINST?
+ * - Is the instruction pointed to by the EPC an BREAK_MATH?
* - Is the following memory word the BD_COOKIE?
*/
err = __get_user(insn, &fr->badinst);
err |= __get_user(cookie, &fr->cookie);
- if (unlikely(err || (insn != BADINST) || (cookie != BD_COOKIE))) {
+ if (unlikely(err || (insn != BREAK_MATH) || (cookie != BD_COOKIE))) {
fpuemustats.errors++;
return 0;
}
diff --git a/arch/mips/math-emu/dsemul.h b/arch/mips/math-emu/dsemul.h
deleted file mode 100644
index 091f0e76730f..000000000000
--- a/arch/mips/math-emu/dsemul.h
+++ /dev/null
@@ -1,17 +0,0 @@
-extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc);
-extern int do_dsemulret(struct pt_regs *xcp);
-
-/* Instruction which will always cause an address error */
-#define AdELOAD 0x8c000001 /* lw $0,1($0) */
-/* Instruction which will plainly cause a CP1 exception when FPU is disabled */
-#define CP1UNDEF 0x44400001 /* cfc1 $0,$0 undef */
-
-/* Instruction inserted following the badinst to further tag the sequence */
-#define BD_COOKIE 0x0000bd36 /* tne $0,$0 with baggage */
-
-/* Setup which instruction to use for trampoline */
-#ifdef STANDALONE_EMULATOR
-#define BADINST CP1UNDEF
-#else
-#define BADINST AdELOAD
-#endif
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 44e8dd8106bf..95ba32b5b720 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R5500) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o tlb-r8k.o
obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o tlb-r4k.o
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 891312f8e5a6..5b98d0e731c2 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -324,7 +324,6 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
if (cpu_is_noncoherent_r10000(dev))
__dma_sync((unsigned long)page_address(sg_page(sg)),
sg->length, direction);
- plat_unmap_dma_mem(sg->dma_address);
}
}
@@ -342,7 +341,6 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele
if (!plat_device_is_coherent(dev))
__dma_sync((unsigned long)page_address(sg_page(sg)),
sg->length, direction);
- plat_unmap_dma_mem(sg->dma_address);
}
}
diff --git a/arch/mips/nxp/pnx833x/common/Makefile b/arch/mips/nxp/pnx833x/common/Makefile
new file mode 100644
index 000000000000..4a16f3b503b5
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/common/Makefile
@@ -0,0 +1,3 @@
+obj-y := interrupts.o platform.o prom.o setup.o reset.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/nxp/pnx833x/common/interrupts.c b/arch/mips/nxp/pnx833x/common/interrupts.c
new file mode 100644
index 000000000000..30533ba200e2
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/common/interrupts.c
@@ -0,0 +1,380 @@
+/*
+ * interrupts.c: Interrupt mappings for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/hardirq.h>
+#include <linux/interrupt.h>
+#include <asm/mipsregs.h>
+#include <asm/irq_cpu.h>
+#include <irq.h>
+#include <irq-mapping.h>
+#include <gpio.h>
+
+static int mips_cpu_timer_irq;
+
+static const unsigned int irq_prio[PNX833X_PIC_NUM_IRQ] =
+{
+ 0, /* unused */
+ 4, /* PNX833X_PIC_I2C0_INT 1 */
+ 4, /* PNX833X_PIC_I2C1_INT 2 */
+ 1, /* PNX833X_PIC_UART0_INT 3 */
+ 1, /* PNX833X_PIC_UART1_INT 4 */
+ 6, /* PNX833X_PIC_TS_IN0_DV_INT 5 */
+ 6, /* PNX833X_PIC_TS_IN0_DMA_INT 6 */
+ 7, /* PNX833X_PIC_GPIO_INT 7 */
+ 4, /* PNX833X_PIC_AUDIO_DEC_INT 8 */
+ 5, /* PNX833X_PIC_VIDEO_DEC_INT 9 */
+ 4, /* PNX833X_PIC_CONFIG_INT 10 */
+ 4, /* PNX833X_PIC_AOI_INT 11 */
+ 9, /* PNX833X_PIC_SYNC_INT 12 */
+ 9, /* PNX8335_PIC_SATA_INT 13 */
+ 4, /* PNX833X_PIC_OSD_INT 14 */
+ 9, /* PNX833X_PIC_DISP1_INT 15 */
+ 4, /* PNX833X_PIC_DEINTERLACER_INT 16 */
+ 9, /* PNX833X_PIC_DISPLAY2_INT 17 */
+ 4, /* PNX833X_PIC_VC_INT 18 */
+ 4, /* PNX833X_PIC_SC_INT 19 */
+ 9, /* PNX833X_PIC_IDE_INT 20 */
+ 9, /* PNX833X_PIC_IDE_DMA_INT 21 */
+ 6, /* PNX833X_PIC_TS_IN1_DV_INT 22 */
+ 6, /* PNX833X_PIC_TS_IN1_DMA_INT 23 */
+ 4, /* PNX833X_PIC_SGDX_DMA_INT 24 */
+ 4, /* PNX833X_PIC_TS_OUT_INT 25 */
+ 4, /* PNX833X_PIC_IR_INT 26 */
+ 3, /* PNX833X_PIC_VMSP1_INT 27 */
+ 3, /* PNX833X_PIC_VMSP2_INT 28 */
+ 4, /* PNX833X_PIC_PIBC_INT 29 */
+ 4, /* PNX833X_PIC_TS_IN0_TRD_INT 30 */
+ 4, /* PNX833X_PIC_SGDX_TPD_INT 31 */
+ 5, /* PNX833X_PIC_USB_INT 32 */
+ 4, /* PNX833X_PIC_TS_IN1_TRD_INT 33 */
+ 4, /* PNX833X_PIC_CLOCK_INT 34 */
+ 4, /* PNX833X_PIC_SGDX_PARSER_INT 35 */
+ 4, /* PNX833X_PIC_VMSP_DMA_INT 36 */
+#if defined(CONFIG_SOC_PNX8335)
+ 4, /* PNX8335_PIC_MIU_INT 37 */
+ 4, /* PNX8335_PIC_AVCHIP_IRQ_INT 38 */
+ 9, /* PNX8335_PIC_SYNC_HD_INT 39 */
+ 9, /* PNX8335_PIC_DISP_HD_INT 40 */
+ 9, /* PNX8335_PIC_DISP_SCALER_INT 41 */
+ 4, /* PNX8335_PIC_OSD_HD1_INT 42 */
+ 4, /* PNX8335_PIC_DTL_WRITER_Y_INT 43 */
+ 4, /* PNX8335_PIC_DTL_WRITER_C_INT 44 */
+ 4, /* PNX8335_PIC_DTL_EMULATOR_Y_IR_INT 45 */
+ 4, /* PNX8335_PIC_DTL_EMULATOR_C_IR_INT 46 */
+ 4, /* PNX8335_PIC_DENC_TTX_INT 47 */
+ 4, /* PNX8335_PIC_MMI_SIF0_INT 48 */
+ 4, /* PNX8335_PIC_MMI_SIF1_INT 49 */
+ 4, /* PNX8335_PIC_MMI_CDMMU_INT 50 */
+ 4, /* PNX8335_PIC_PIBCS_INT 51 */
+ 12, /* PNX8335_PIC_ETHERNET_INT 52 */
+ 3, /* PNX8335_PIC_VMSP1_0_INT 53 */
+ 3, /* PNX8335_PIC_VMSP1_1_INT 54 */
+ 4, /* PNX8335_PIC_VMSP1_DMA_INT 55 */
+ 4, /* PNX8335_PIC_TDGR_DE_INT 56 */
+ 4, /* PNX8335_PIC_IR1_IRQ_INT 57 */
+#endif
+};
+
+static void pnx833x_timer_dispatch(void)
+{
+ do_IRQ(mips_cpu_timer_irq);
+}
+
+static void pic_dispatch(void)
+{
+ unsigned int irq = PNX833X_REGFIELD(PIC_INT_SRC, INT_SRC);
+
+ if ((irq >= 1) && (irq < (PNX833X_PIC_NUM_IRQ))) {
+ unsigned long priority = PNX833X_PIC_INT_PRIORITY;
+ PNX833X_PIC_INT_PRIORITY = irq_prio[irq];
+
+ if (irq == PNX833X_PIC_GPIO_INT) {
+ unsigned long mask = PNX833X_PIO_INT_STATUS & PNX833X_PIO_INT_ENABLE;
+ int pin;
+ while ((pin = ffs(mask & 0xffff))) {
+ pin -= 1;
+ do_IRQ(PNX833X_GPIO_IRQ_BASE + pin);
+ mask &= ~(1 << pin);
+ }
+ } else {
+ do_IRQ(irq + PNX833X_PIC_IRQ_BASE);
+ }
+
+ PNX833X_PIC_INT_PRIORITY = priority;
+ } else {
+ printk(KERN_ERR "plat_irq_dispatch: unexpected irq %u\n", irq);
+ }
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+ unsigned int pending = read_c0_status() & read_c0_cause();
+
+ if (pending & STATUSF_IP4)
+ pic_dispatch();
+ else if (pending & STATUSF_IP7)
+ do_IRQ(PNX833X_TIMER_IRQ);
+ else
+ spurious_interrupt();
+}
+
+static inline void pnx833x_hard_enable_pic_irq(unsigned int irq)
+{
+ /* Currently we do this by setting IRQ priority to 1.
+ If priority support is being implemented, 1 should be repalced
+ by a better value. */
+ PNX833X_PIC_INT_REG(irq) = irq_prio[irq];
+}
+
+static inline void pnx833x_hard_disable_pic_irq(unsigned int irq)
+{
+ /* Disable IRQ by writing setting it's priority to 0 */
+ PNX833X_PIC_INT_REG(irq) = 0;
+}
+
+static int irqflags[PNX833X_PIC_NUM_IRQ]; /* initialized by zeroes */
+#define IRQFLAG_STARTED 1
+#define IRQFLAG_DISABLED 2
+
+static DEFINE_SPINLOCK(pnx833x_irq_lock);
+
+static unsigned int pnx833x_startup_pic_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
+
+ spin_lock_irqsave(&pnx833x_irq_lock, flags);
+
+ irqflags[pic_irq] = IRQFLAG_STARTED; /* started, not disabled */
+ pnx833x_hard_enable_pic_irq(pic_irq);
+
+ spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
+ return 0;
+}
+
+static void pnx833x_shutdown_pic_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
+
+ spin_lock_irqsave(&pnx833x_irq_lock, flags);
+
+ irqflags[pic_irq] = 0; /* not started */
+ pnx833x_hard_disable_pic_irq(pic_irq);
+
+ spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
+}
+
+static void pnx833x_enable_pic_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
+
+ spin_lock_irqsave(&pnx833x_irq_lock, flags);
+
+ irqflags[pic_irq] &= ~IRQFLAG_DISABLED;
+ if (irqflags[pic_irq] == IRQFLAG_STARTED)
+ pnx833x_hard_enable_pic_irq(pic_irq);
+
+ spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
+}
+
+static void pnx833x_disable_pic_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE;
+
+ spin_lock_irqsave(&pnx833x_irq_lock, flags);
+
+ irqflags[pic_irq] |= IRQFLAG_DISABLED;
+ pnx833x_hard_disable_pic_irq(pic_irq);
+
+ spin_unlock_irqrestore(&pnx833x_irq_lock, flags);
+}
+
+static void pnx833x_ack_pic_irq(unsigned int irq)
+{
+}
+
+static void pnx833x_end_pic_irq(unsigned int irq)
+{
+}
+
+static DEFINE_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock);
+
+static unsigned int pnx833x_startup_gpio_irq(unsigned int irq)
+{
+ int pin = irq - PNX833X_GPIO_IRQ_BASE;
+ unsigned long flags;
+ spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
+ pnx833x_gpio_enable_irq(pin);
+ spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
+ return 0;
+}
+
+static void pnx833x_enable_gpio_irq(unsigned int irq)
+{
+ int pin = irq - PNX833X_GPIO_IRQ_BASE;
+ unsigned long flags;
+ spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
+ pnx833x_gpio_enable_irq(pin);
+ spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
+}
+
+static void pnx833x_disable_gpio_irq(unsigned int irq)
+{
+ int pin = irq - PNX833X_GPIO_IRQ_BASE;
+ unsigned long flags;
+ spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
+ pnx833x_gpio_disable_irq(pin);
+ spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
+}
+
+static void pnx833x_ack_gpio_irq(unsigned int irq)
+{
+}
+
+static void pnx833x_end_gpio_irq(unsigned int irq)
+{
+ int pin = irq - PNX833X_GPIO_IRQ_BASE;
+ unsigned long flags;
+ spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags);
+ pnx833x_gpio_clear_irq(pin);
+ spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags);
+}
+
+static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type)
+{
+ int pin = irq - PNX833X_GPIO_IRQ_BASE;
+ int gpio_mode;
+
+ switch (flow_type) {
+ case IRQ_TYPE_EDGE_RISING:
+ gpio_mode = GPIO_INT_EDGE_RISING;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ gpio_mode = GPIO_INT_EDGE_FALLING;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ gpio_mode = GPIO_INT_EDGE_BOTH;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ gpio_mode = GPIO_INT_LEVEL_HIGH;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ gpio_mode = GPIO_INT_LEVEL_LOW;
+ break;
+ default:
+ gpio_mode = GPIO_INT_NONE;
+ break;
+ }
+
+ pnx833x_gpio_setup_irq(gpio_mode, pin);
+
+ return 0;
+}
+
+static struct irq_chip pnx833x_pic_irq_type = {
+ .typename = "PNX-PIC",
+ .startup = pnx833x_startup_pic_irq,
+ .shutdown = pnx833x_shutdown_pic_irq,
+ .enable = pnx833x_enable_pic_irq,
+ .disable = pnx833x_disable_pic_irq,
+ .ack = pnx833x_ack_pic_irq,
+ .end = pnx833x_end_pic_irq
+};
+
+static struct irq_chip pnx833x_gpio_irq_type = {
+ .typename = "PNX-GPIO",
+ .startup = pnx833x_startup_gpio_irq,
+ .shutdown = pnx833x_disable_gpio_irq,
+ .enable = pnx833x_enable_gpio_irq,
+ .disable = pnx833x_disable_gpio_irq,
+ .ack = pnx833x_ack_gpio_irq,
+ .end = pnx833x_end_gpio_irq,
+ .set_type = pnx833x_set_type_gpio_irq
+};
+
+void __init arch_init_irq(void)
+{
+ unsigned int irq;
+
+ /* setup standard internal cpu irqs */
+ mips_cpu_irq_init();
+
+ /* Set IRQ information in irq_desc */
+ for (irq = PNX833X_PIC_IRQ_BASE; irq < (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ); irq++) {
+ pnx833x_hard_disable_pic_irq(irq);
+ set_irq_chip_and_handler(irq, &pnx833x_pic_irq_type, handle_simple_irq);
+ }
+
+ for (irq = PNX833X_GPIO_IRQ_BASE; irq < (PNX833X_GPIO_IRQ_BASE + PNX833X_GPIO_NUM_IRQ); irq++)
+ set_irq_chip_and_handler(irq, &pnx833x_gpio_irq_type, handle_simple_irq);
+
+ /* Set PIC priority limiter register to 0 */
+ PNX833X_PIC_INT_PRIORITY = 0;
+
+ /* Setup GPIO IRQ dispatching */
+ pnx833x_startup_pic_irq(PNX833X_PIC_GPIO_INT);
+
+ /* Enable PIC IRQs (HWIRQ2) */
+ if (cpu_has_vint)
+ set_vi_handler(4, pic_dispatch);
+
+ write_c0_status(read_c0_status() | IE_IRQ2);
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+ if (cpu_has_vint)
+ set_vi_handler(cp0_compare_irq, pnx833x_timer_dispatch);
+
+ mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
+ return mips_cpu_timer_irq;
+}
+
+void __init plat_time_init(void)
+{
+ /* calculate mips_hpt_frequency based on PNX833X_CLOCK_CPUCP_CTL reg */
+
+ extern unsigned long mips_hpt_frequency;
+ unsigned long reg = PNX833X_CLOCK_CPUCP_CTL;
+
+ if (!(PNX833X_BIT(reg, CLOCK_CPUCP_CTL, EXIT_RESET))) {
+ /* Functional clock is disabled so use crystal frequency */
+ mips_hpt_frequency = 25;
+ } else {
+#if defined(CONFIG_SOC_PNX8335)
+ /* Functional clock is enabled, so get clock multiplier */
+ mips_hpt_frequency = 90 + (10 * PNX8335_REGFIELD(CLOCK_PLL_CPU_CTL, FREQ));
+#else
+ static const unsigned long int freq[4] = {240, 160, 120, 80};
+ mips_hpt_frequency = freq[PNX833X_FIELD(reg, CLOCK_CPUCP_CTL, DIV_CLOCK)];
+#endif
+ }
+
+ printk(KERN_INFO "CPU clock is %ld MHz\n", mips_hpt_frequency);
+
+ mips_hpt_frequency *= 500000;
+}
+
diff --git a/arch/mips/nxp/pnx833x/common/platform.c b/arch/mips/nxp/pnx833x/common/platform.c
new file mode 100644
index 000000000000..b1ccbcc18f78
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/common/platform.c
@@ -0,0 +1,319 @@
+/*
+ * platform.c: platform support for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * Based on software written by:
+ * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+#include <linux/serial.h>
+#include <linux/serial_pnx8xxx.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
+#ifdef CONFIG_I2C_PNX0105
+/* Until i2c driver available in kernel.*/
+#include <linux/i2c-pnx0105.h>
+#endif
+
+#include <irq.h>
+#include <irq-mapping.h>
+#include <pnx833x.h>
+
+static u64 uart_dmamask = DMA_32BIT_MASK;
+
+static struct resource pnx833x_uart_resources[] = {
+ [0] = {
+ .start = PNX833X_UART0_PORTS_START,
+ .end = PNX833X_UART0_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PNX833X_PIC_UART0_INT,
+ .end = PNX833X_PIC_UART0_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = PNX833X_UART1_PORTS_START,
+ .end = PNX833X_UART1_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ [3] = {
+ .start = PNX833X_PIC_UART1_INT,
+ .end = PNX833X_PIC_UART1_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct pnx8xxx_port pnx8xxx_ports[] = {
+ [0] = {
+ .port = {
+ .type = PORT_PNX8XXX,
+ .iotype = UPIO_MEM,
+ .membase = (void __iomem *)PNX833X_UART0_PORTS_START,
+ .mapbase = PNX833X_UART0_PORTS_START,
+ .irq = PNX833X_PIC_UART0_INT,
+ .uartclk = 3692300,
+ .fifosize = 16,
+ .flags = UPF_BOOT_AUTOCONF,
+ .line = 0,
+ },
+ },
+ [1] = {
+ .port = {
+ .type = PORT_PNX8XXX,
+ .iotype = UPIO_MEM,
+ .membase = (void __iomem *)PNX833X_UART1_PORTS_START,
+ .mapbase = PNX833X_UART1_PORTS_START,
+ .irq = PNX833X_PIC_UART1_INT,
+ .uartclk = 3692300,
+ .fifosize = 16,
+ .flags = UPF_BOOT_AUTOCONF,
+ .line = 1,
+ },
+ },
+};
+
+static struct platform_device pnx833x_uart_device = {
+ .name = "pnx8xxx-uart",
+ .id = -1,
+ .dev = {
+ .dma_mask = &uart_dmamask,
+ .coherent_dma_mask = DMA_32BIT_MASK,
+ .platform_data = pnx8xxx_ports,
+ },
+ .num_resources = ARRAY_SIZE(pnx833x_uart_resources),
+ .resource = pnx833x_uart_resources,
+};
+
+static u64 ehci_dmamask = DMA_32BIT_MASK;
+
+static struct resource pnx833x_usb_ehci_resources[] = {
+ [0] = {
+ .start = PNX833X_USB_PORTS_START,
+ .end = PNX833X_USB_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PNX833X_PIC_USB_INT,
+ .end = PNX833X_PIC_USB_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device pnx833x_usb_ehci_device = {
+ .name = "pnx833x-ehci",
+ .id = -1,
+ .dev = {
+ .dma_mask = &ehci_dmamask,
+ .coherent_dma_mask = DMA_32BIT_MASK,
+ },
+ .num_resources = ARRAY_SIZE(pnx833x_usb_ehci_resources),
+ .resource = pnx833x_usb_ehci_resources,
+};
+
+#ifdef CONFIG_I2C_PNX0105
+static struct resource pnx833x_i2c0_resources[] = {
+ {
+ .start = PNX833X_I2C0_PORTS_START,
+ .end = PNX833X_I2C0_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = PNX833X_PIC_I2C0_INT,
+ .end = PNX833X_PIC_I2C0_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource pnx833x_i2c1_resources[] = {
+ {
+ .start = PNX833X_I2C1_PORTS_START,
+ .end = PNX833X_I2C1_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = PNX833X_PIC_I2C1_INT,
+ .end = PNX833X_PIC_I2C1_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct i2c_pnx0105_dev pnx833x_i2c_dev[] = {
+ {
+ .base = PNX833X_I2C0_PORTS_START,
+ .irq = -1, /* should be PNX833X_PIC_I2C0_INT but polling is faster */
+ .clock = 6, /* 0 == 400 kHz, 4 == 100 kHz(Maximum HDMI), 6 = 50kHz(Prefered HDCP) */
+ .bus_addr = 0, /* no slave support */
+ },
+ {
+ .base = PNX833X_I2C1_PORTS_START,
+ .irq = -1, /* on high freq, polling is faster */
+ /*.irq = PNX833X_PIC_I2C1_INT,*/
+ .clock = 4, /* 0 == 400 kHz, 4 == 100 kHz. 100 kHz seems a safe default for now */
+ .bus_addr = 0, /* no slave support */
+ },
+};
+
+static struct platform_device pnx833x_i2c0_device = {
+ .name = "i2c-pnx0105",
+ .id = 0,
+ .dev = {
+ .platform_data = &pnx833x_i2c_dev[0],
+ },
+ .num_resources = ARRAY_SIZE(pnx833x_i2c0_resources),
+ .resource = pnx833x_i2c0_resources,
+};
+
+static struct platform_device pnx833x_i2c1_device = {
+ .name = "i2c-pnx0105",
+ .id = 1,
+ .dev = {
+ .platform_data = &pnx833x_i2c_dev[1],
+ },
+ .num_resources = ARRAY_SIZE(pnx833x_i2c1_resources),
+ .resource = pnx833x_i2c1_resources,
+};
+#endif
+
+static u64 ethernet_dmamask = DMA_32BIT_MASK;
+
+static struct resource pnx833x_ethernet_resources[] = {
+ [0] = {
+ .start = PNX8335_IP3902_PORTS_START,
+ .end = PNX8335_IP3902_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PNX8335_PIC_ETHERNET_INT,
+ .end = PNX8335_PIC_ETHERNET_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device pnx833x_ethernet_device = {
+ .name = "ip3902-eth",
+ .id = -1,
+ .dev = {
+ .dma_mask = &ethernet_dmamask,
+ .coherent_dma_mask = DMA_32BIT_MASK,
+ },
+ .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
+ .resource = pnx833x_ethernet_resources,
+};
+
+static struct resource pnx833x_sata_resources[] = {
+ [0] = {
+ .start = PNX8335_SATA_PORTS_START,
+ .end = PNX8335_SATA_PORTS_END,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = PNX8335_PIC_SATA_INT,
+ .end = PNX8335_PIC_SATA_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device pnx833x_sata_device = {
+ .name = "pnx833x-sata",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(pnx833x_sata_resources),
+ .resource = pnx833x_sata_resources,
+};
+
+static const char *part_probes[] = {
+ "cmdlinepart",
+ NULL
+};
+
+static void
+pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *this = mtd->priv;
+ unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
+
+ if (cmd == NAND_CMD_NONE)
+ return;
+
+ if (ctrl & NAND_CLE)
+ writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_CLE_MASK));
+ else
+ writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_ALE_MASK));
+}
+
+static struct platform_nand_data pnx833x_flash_nand_data = {
+ .chip = {
+ .chip_delay = 25,
+ .part_probe_types = part_probes,
+ },
+ .ctrl = {
+ .cmd_ctrl = pnx833x_flash_nand_cmd_ctrl
+ }
+};
+
+/*
+ * Set start to be the correct address (PNX8335_NAND_BASE with no 0xb!!),
+ * 12 bytes more seems to be the standard that allows for NAND access.
+ */
+static struct resource pnx833x_flash_nand_resource = {
+ .start = PNX8335_NAND_BASE,
+ .end = PNX8335_NAND_BASE + 12,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device pnx833x_flash_nand = {
+ .name = "gen_nand",
+ .id = -1,
+ .num_resources = 1,
+ .resource = &pnx833x_flash_nand_resource,
+ .dev = {
+ .platform_data = &pnx833x_flash_nand_data,
+ },
+};
+
+static struct platform_device *pnx833x_platform_devices[] __initdata = {
+ &pnx833x_uart_device,
+ &pnx833x_usb_ehci_device,
+#ifdef CONFIG_I2C_PNX0105
+ &pnx833x_i2c0_device,
+ &pnx833x_i2c1_device,
+#endif
+ &pnx833x_ethernet_device,
+ &pnx833x_sata_device,
+ &pnx833x_flash_nand,
+};
+
+static int __init pnx833x_platform_init(void)
+{
+ int res;
+
+ res = platform_add_devices(pnx833x_platform_devices,
+ ARRAY_SIZE(pnx833x_platform_devices));
+
+ return res;
+}
+
+arch_initcall(pnx833x_platform_init);
diff --git a/arch/mips/nxp/pnx833x/common/prom.c b/arch/mips/nxp/pnx833x/common/prom.c
new file mode 100644
index 000000000000..2a41e8fec210
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/common/prom.c
@@ -0,0 +1,70 @@
+/*
+ * prom.c:
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * Based on software written by:
+ * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+#include <linux/string.h>
+
+void __init prom_init_cmdline(void)
+{
+ int argc = fw_arg0;
+ char **argv = (char **)fw_arg1;
+ char *c = &(arcs_cmdline[0]);
+ int i;
+
+ for (i = 1; i < argc; i++) {
+ strcpy(c, argv[i]);
+ c += strlen(argv[i]);
+ if (i < argc-1)
+ *c++ = ' ';
+ }
+ *c = 0;
+}
+
+char __init *prom_getenv(char *envname)
+{
+ extern char **prom_envp;
+ char **env = prom_envp;
+ int i;
+
+ i = strlen(envname);
+
+ while (*env) {
+ if (strncmp(envname, *env, i) == 0 && *(*env+i) == '=')
+ return *env + i + 1;
+ env++;
+ }
+
+ return 0;
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+char * __init prom_getcmdline(void)
+{
+ return arcs_cmdline;
+}
+
diff --git a/arch/mips/nxp/pnx833x/common/reset.c b/arch/mips/nxp/pnx833x/common/reset.c
new file mode 100644
index 000000000000..a9bc9bacad2b
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/common/reset.c
@@ -0,0 +1,45 @@
+/*
+ * reset.c: reset support for PNX833X.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * Based on software written by:
+ * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/slab.h>
+#include <linux/reboot.h>
+#include <pnx833x.h>
+
+void pnx833x_machine_restart(char *command)
+{
+ PNX833X_RESET_CONTROL_2 = 0;
+ PNX833X_RESET_CONTROL = 0;
+}
+
+void pnx833x_machine_halt(void)
+{
+ while (1)
+ __asm__ __volatile__ ("wait");
+
+}
+
+void pnx833x_machine_power_off(void)
+{
+ pnx833x_machine_halt();
+}
diff --git a/arch/mips/nxp/pnx833x/common/setup.c b/arch/mips/nxp/pnx833x/common/setup.c
new file mode 100644
index 000000000000..e51fbc4b644d
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/common/setup.c
@@ -0,0 +1,64 @@
+/*
+ * setup.c: Setup PNX833X Soc.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * Based on software written by:
+ * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/pci.h>
+#include <asm/reboot.h>
+#include <pnx833x.h>
+#include <gpio.h>
+
+extern void pnx833x_board_setup(void);
+extern void pnx833x_machine_restart(char *);
+extern void pnx833x_machine_halt(void);
+extern void pnx833x_machine_power_off(void);
+
+int __init plat_mem_setup(void)
+{
+ /* fake pci bus to avoid bounce buffers */
+ PCI_DMA_BUS_IS_PHYS = 1;
+
+ /* set mips clock to 320MHz */
+#if defined(CONFIG_SOC_PNX8335)
+ PNX8335_WRITEFIELD(0x17, CLOCK_PLL_CPU_CTL, FREQ);
+#endif
+ pnx833x_gpio_init(); /* so it will be ready in board_setup() */
+
+ pnx833x_board_setup();
+
+ _machine_restart = pnx833x_machine_restart;
+ _machine_halt = pnx833x_machine_halt;
+ pm_power_off = pnx833x_machine_power_off;
+
+ /* IO/MEM resources. */
+ set_io_port_base(KSEG1);
+ ioport_resource.start = 0;
+ ioport_resource.end = ~0;
+ iomem_resource.start = 0;
+ iomem_resource.end = ~0;
+
+ return 0;
+}
diff --git a/arch/mips/nxp/pnx833x/stb22x/Makefile b/arch/mips/nxp/pnx833x/stb22x/Makefile
new file mode 100644
index 000000000000..f81c5801f455
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/stb22x/Makefile
@@ -0,0 +1,3 @@
+lib-y := board.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/nxp/pnx833x/stb22x/board.c b/arch/mips/nxp/pnx833x/stb22x/board.c
new file mode 100644
index 000000000000..90cc604bdadf
--- /dev/null
+++ b/arch/mips/nxp/pnx833x/stb22x/board.c
@@ -0,0 +1,133 @@
+/*
+ * board.c: STB225 board support.
+ *
+ * Copyright 2008 NXP Semiconductors
+ * Chris Steel <chris.steel@nxp.com>
+ * Daniel Laird <daniel.j.laird@nxp.com>
+ *
+ * Based on software written by:
+ * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+#include <linux/mm.h>
+#include <pnx833x.h>
+#include <gpio.h>
+
+/* endianess twiddlers */
+#define PNX8335_DEBUG0 0x4400
+#define PNX8335_DEBUG1 0x4404
+#define PNX8335_DEBUG2 0x4408
+#define PNX8335_DEBUG3 0x440c
+#define PNX8335_DEBUG4 0x4410
+#define PNX8335_DEBUG5 0x4414
+#define PNX8335_DEBUG6 0x4418
+#define PNX8335_DEBUG7 0x441c
+
+int prom_argc;
+char **prom_argv = 0, **prom_envp = 0;
+
+extern void prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+const char *get_system_type(void)
+{
+ return "NXP STB22x";
+}
+
+static inline unsigned long env_or_default(char *env, unsigned long dfl)
+{
+ char *str = prom_getenv(env);
+ return str ? simple_strtol(str, 0, 0) : dfl;
+}
+
+void __init prom_init(void)
+{
+ unsigned long memsize;
+
+ prom_argc = fw_arg0;
+ prom_argv = (char **)fw_arg1;
+ prom_envp = (char **)fw_arg2;
+
+ prom_init_cmdline();
+
+ memsize = env_or_default("memsize", 0x02000000);
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+}
+
+void __init pnx833x_board_setup(void)
+{
+ pnx833x_gpio_select_function_alt(4);
+ pnx833x_gpio_select_output(4);
+ pnx833x_gpio_select_function_alt(5);
+ pnx833x_gpio_select_input(5);
+ pnx833x_gpio_select_function_alt(6);
+ pnx833x_gpio_select_input(6);
+ pnx833x_gpio_select_function_alt(7);
+ pnx833x_gpio_select_output(7);
+
+ pnx833x_gpio_select_function_alt(25);
+ pnx833x_gpio_select_function_alt(26);
+
+ pnx833x_gpio_select_function_alt(27);
+ pnx833x_gpio_select_function_alt(28);
+ pnx833x_gpio_select_function_alt(29);
+ pnx833x_gpio_select_function_alt(30);
+ pnx833x_gpio_select_function_alt(31);
+ pnx833x_gpio_select_function_alt(32);
+ pnx833x_gpio_select_function_alt(33);
+
+#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
+ /* Setup MIU for NAND access on CS0...
+ *
+ * (it seems that we must also configure CS1 for reliable operation,
+ * otherwise the first read ID command will fail if it's read as 4 bytes
+ * but pass if it's read as 1 word.)
+ */
+
+ /* Setup MIU CS0 & CS1 timing */
+ PNX833X_MIU_SEL0 = 0;
+ PNX833X_MIU_SEL1 = 0;
+ PNX833X_MIU_SEL0_TIMING = 0x50003081;
+ PNX833X_MIU_SEL1_TIMING = 0x50003081;
+
+ /* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */
+ pnx833x_gpio_select_function_alt(0);
+
+ /* Setup GPIO 04 to input NAND read/busy signal */
+ pnx833x_gpio_select_function_io(4);
+ pnx833x_gpio_select_input(4);
+
+ /* Setup GPIO 05 to disable NAND write protect */
+ pnx833x_gpio_select_function_io(5);
+ pnx833x_gpio_select_output(5);
+ pnx833x_gpio_write(1, 5);
+
+#elif defined(CONFIG_MTD_CFI) || defined(CONFIG_MTD_CFI_MODULE)
+
+ /* Set up MIU for 16-bit NOR access on CS0 and CS1... */
+
+ /* Setup MIU CS0 & CS1 timing */
+ PNX833X_MIU_SEL0 = 1;
+ PNX833X_MIU_SEL1 = 1;
+ PNX833X_MIU_SEL0_TIMING = 0x6A08D082;
+ PNX833X_MIU_SEL1_TIMING = 0x6A08D082;
+
+ /* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */
+ pnx833x_gpio_select_function_alt(0);
+#endif
+}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index b1886244cedf..e8a97f59e066 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
-obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
+obj-$(CONFIG_NEC_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
index 846eae9cdd05..fba5aad00d51 100644
--- a/arch/mips/pci/fixup-emma2rh.c
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -30,7 +30,7 @@
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define EMMA2RH_PCI_HOST_SLOT 0x09
#define EMMA2RH_USB_SLOT 0x03
diff --git a/arch/mips/pci/fixup-rc32434.c b/arch/mips/pci/fixup-rc32434.c
index 75b90dcb7a09..3d86823d03a0 100644
--- a/arch/mips/pci/fixup-rc32434.c
+++ b/arch/mips/pci/fixup-rc32434.c
@@ -30,6 +30,7 @@
#include <linux/init.h>
#include <asm/mach-rc32434/rc32434.h>
+#include <asm/mach-rc32434/irq.h>
static int __devinitdata irq_map[2][12] = {
{0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1},
diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c
index d31bfc6d4150..5947a70b0b7f 100644
--- a/arch/mips/pci/ops-emma2rh.c
+++ b/arch/mips/pci/ops-emma2rh.c
@@ -30,7 +30,7 @@
#include <asm/addrspace.h>
#include <asm/debug.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define RTABORT (0x1<<9)
#define RMABORT (0x1<<10)
diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c
index 772e283daa63..2df4190232cd 100644
--- a/arch/mips/pci/pci-emma2rh.c
+++ b/arch/mips/pci/pci-emma2rh.c
@@ -30,7 +30,7 @@
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
static struct resource pci_io_resource = {
.name = "pci IO space",
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 31619c601b11..2f22d714d5b0 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -280,7 +280,7 @@ static int __init plat_setup_devices(void)
{
/* Look for the CF card reader */
if (!readl(IDT434_REG_BASE + DEV1MASK))
- rb532_devs[1] = NULL;
+ rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */
else {
cf_slot0_res[0].start =
readl(IDT434_REG_BASE + DEV1BASE);
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 76a7fd96d564..70c4a6726377 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -310,6 +310,10 @@ int __init rb532_gpio_init(void)
return -ENXIO;
}
+ /* Set the interrupt status and level for the CF pin */
+ rb532_gpio_set_int_level(&rb532_gpio_chip->chip, CF_GPIO_NUM, 1);
+ rb532_gpio_set_int_status(&rb532_gpio_chip->chip, CF_GPIO_NUM, 0);
+
return 0;
}
arch_initcall(rb532_gpio_init);
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index f6d9bf4b26e7..f8b18af141a1 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -12,20 +12,11 @@
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
#include <asm/irq_cpu.h>
-#include <asm/sgi/ioc.h>
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ip22.h>
-#include <asm/time.h>
-
-/* #define DEBUG_SGINT */
/* So far nothing hangs here */
#undef USE_LIO3_IRQ
@@ -68,7 +59,7 @@ static void enable_local1_irq(unsigned int irq)
sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
}
-void disable_local1_irq(unsigned int irq)
+static void disable_local1_irq(unsigned int irq)
{
sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
}
@@ -87,7 +78,7 @@ static void enable_local2_irq(unsigned int irq)
sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
}
-void disable_local2_irq(unsigned int irq)
+static void disable_local2_irq(unsigned int irq)
{
sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
if (!sgint->cmeimask0)
@@ -108,7 +99,7 @@ static void enable_local3_irq(unsigned int irq)
sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
}
-void disable_local3_irq(unsigned int irq)
+static void disable_local3_irq(unsigned int irq)
{
sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
if (!sgint->cmeimask1)
@@ -344,6 +335,6 @@ void __init arch_init_irq(void)
#ifdef CONFIG_EISA
if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
- ip22_eisa_init();
+ ip22_eisa_init();
#endif
}
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
index 17052db4161d..226e8bb2f0a1 100644
--- a/arch/mips/txx9/Kconfig
+++ b/arch/mips/txx9/Kconfig
@@ -46,9 +46,10 @@ config TOSHIBA_RBTX4938
support this machine type
config TOSHIBA_RBTX4939
- bool "Toshiba RBTX4939 bobard"
+ bool "Toshiba RBTX4939 board"
depends on MACH_TX49XX
select SOC_TX4939
+ select TXX9_7SEGLED
help
This Toshiba board is based on the TX4939 processor. Say Y here to
support this machine type
@@ -86,6 +87,9 @@ config SOC_TX4939
select HW_HAS_PCI
select PCI_TX4927
+config TXX9_7SEGLED
+ bool
+
config TOSHIBA_FPCIB0
bool "FPCIB0 Backplane Support"
depends on PCI && MACH_TXX9
diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c
new file mode 100644
index 000000000000..727ab21b6618
--- /dev/null
+++ b/arch/mips/txx9/generic/7segled.c
@@ -0,0 +1,112 @@
+/*
+ * 7 Segment LED routines
+ * Based on RBTX49xx patch from CELF patch archive.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) Copyright TOSHIBA CORPORATION 2005-2007
+ * All Rights Reserved.
+ */
+#include <linux/sysdev.h>
+#include <linux/slab.h>
+#include <linux/map_to_7segment.h>
+#include <asm/txx9/generic.h>
+
+static unsigned int tx_7segled_num;
+static void (*tx_7segled_putc)(unsigned int pos, unsigned char val);
+
+void __init txx9_7segled_init(unsigned int num,
+ void (*putc)(unsigned int pos, unsigned char val))
+{
+ tx_7segled_num = num;
+ tx_7segled_putc = putc;
+}
+
+static SEG7_CONVERSION_MAP(txx9_seg7map, MAP_ASCII7SEG_ALPHANUM_LC);
+
+int txx9_7segled_putc(unsigned int pos, char c)
+{
+ if (pos >= tx_7segled_num)
+ return -EINVAL;
+ c = map_to_seg7(&txx9_seg7map, c);
+ if (c < 0)
+ return c;
+ tx_7segled_putc(pos, c);
+ return 0;
+}
+
+static ssize_t ascii_store(struct sys_device *dev,
+ struct sysdev_attribute *attr,
+ const char *buf, size_t size)
+{
+ unsigned int ch = dev->id;
+ txx9_7segled_putc(ch, buf[0]);
+ return size;
+}
+
+static ssize_t raw_store(struct sys_device *dev,
+ struct sysdev_attribute *attr,
+ const char *buf, size_t size)
+{
+ unsigned int ch = dev->id;
+ tx_7segled_putc(ch, buf[0]);
+ return size;
+}
+
+static SYSDEV_ATTR(ascii, 0200, NULL, ascii_store);
+static SYSDEV_ATTR(raw, 0200, NULL, raw_store);
+
+static ssize_t map_seg7_show(struct sysdev_class *class, char *buf)
+{
+ memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map));
+ return sizeof(txx9_seg7map);
+}
+
+static ssize_t map_seg7_store(struct sysdev_class *class,
+ const char *buf, size_t size)
+{
+ if (size != sizeof(txx9_seg7map))
+ return -EINVAL;
+ memcpy(&txx9_seg7map, buf, size);
+ return size;
+}
+
+static SYSDEV_CLASS_ATTR(map_seg7, 0600, map_seg7_show, map_seg7_store);
+
+static struct sysdev_class tx_7segled_sysdev_class = {
+ .name = "7segled",
+};
+
+static int __init tx_7segled_init_sysfs(void)
+{
+ int error, i;
+ if (!tx_7segled_num)
+ return -ENODEV;
+ error = sysdev_class_register(&tx_7segled_sysdev_class);
+ if (error)
+ return error;
+ error = sysdev_class_create_file(&tx_7segled_sysdev_class,
+ &attr_map_seg7);
+ if (error)
+ return error;
+ for (i = 0; i < tx_7segled_num; i++) {
+ struct sys_device *dev;
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev) {
+ error = -ENODEV;
+ break;
+ }
+ dev->id = i;
+ dev->cls = &tx_7segled_sysdev_class;
+ error = sysdev_register(dev);
+ if (!error) {
+ sysdev_create_file(dev, &attr_ascii);
+ sysdev_create_file(dev, &attr_raw);
+ }
+ }
+ return error;
+}
+
+device_initcall(tx_7segled_init_sysfs);
diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile
index 0030d23bef5b..f2579ce054a1 100644
--- a/arch/mips/txx9/generic/Makefile
+++ b/arch/mips/txx9/generic/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o
obj-$(CONFIG_SOC_TX4939) += setup_tx4939.o irq_tx4939.o
obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
obj-$(CONFIG_SPI) += spi_eeprom.o
+obj-$(CONFIG_TXX9_7SEGLED) += 7segled.o
EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 5526375010f8..a13a08b8c9ec 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -156,11 +156,23 @@ static struct txx9_board_vec *__init find_board_byname(const char *name)
static void __init prom_init_cmdline(void)
{
- int argc = (int)fw_arg0;
- int *argv32 = (int *)fw_arg1;
+ int argc;
+ int *argv32;
int i; /* Always ignore the "-c" at argv[0] */
char builtin[CL_SIZE];
+ if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
+ /*
+ * argc is not a valid number, or argv32 is not a valid
+ * pointer
+ */
+ argc = 0;
+ argv32 = NULL;
+ } else {
+ argc = (int)fw_arg0;
+ argv32 = (int *)fw_arg1;
+ }
+
/* ignore all built-in args if any f/w args given */
/*
* But if built-in strings was started with '+', append them
@@ -414,10 +426,12 @@ char * __init prom_getcmdline(void)
const char *__init prom_getenv(const char *name)
{
- const s32 *str = (const s32 *)fw_arg2;
+ const s32 *str;
- if (!str)
+ if (fw_arg2 < CKSEG0)
return NULL;
+
+ str = (const s32 *)fw_arg2;
/* YAMON style ("name", "value" pairs) */
while (str[0] && str[1]) {
if (!strcmp((const char *)(unsigned long)str[0], name))
@@ -622,6 +636,21 @@ unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
EXPORT_SYMBOL(__swizzle_addr_b);
#endif
+#ifdef NEEDS_TXX9_IOSWABW
+static u16 ioswabw_default(volatile u16 *a, u16 x)
+{
+ return le16_to_cpu(x);
+}
+static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
+{
+ return x;
+}
+u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
+EXPORT_SYMBOL(ioswabw);
+u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
+EXPORT_SYMBOL(__mem_ioswabw);
+#endif
+
void __init txx9_physmap_flash_init(int no, unsigned long addr,
unsigned long size,
const struct physmap_flash_data *pdata)
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
index 4a74423b2ba8..01129a9d50fa 100644
--- a/arch/mips/txx9/rbtx4927/setup.c
+++ b/arch/mips/txx9/rbtx4927/setup.c
@@ -49,6 +49,7 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio.h>
+#include <linux/leds.h>
#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/txx9/generic.h>
@@ -210,10 +211,6 @@ static void __init rbtx4927_mem_setup(void)
/* TX4927-SIO DTR on (PIO[15]) */
gpio_request(15, "sio-dtr");
gpio_direction_output(15, 1);
- gpio_request(0, "led");
- gpio_direction_output(0, 1);
- gpio_request(1, "led");
- gpio_direction_output(1, 1);
tx4927_sio_init(0, 0);
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
@@ -315,6 +312,25 @@ static void __init rbtx4927_mtd_init(void)
tx4927_mtd_init(i);
}
+static void __init rbtx4927_gpioled_init(void)
+{
+ static struct gpio_led leds[] = {
+ { .name = "gpioled:green:0", .gpio = 0, .active_low = 1, },
+ { .name = "gpioled:green:1", .gpio = 1, .active_low = 1, },
+ };
+ static struct gpio_led_platform_data pdata = {
+ .num_leds = ARRAY_SIZE(leds),
+ .leds = leds,
+ };
+ struct platform_device *pdev = platform_device_alloc("leds-gpio", 0);
+
+ if (!pdev)
+ return;
+ pdev->dev.platform_data = &pdata;
+ if (platform_device_add(pdev))
+ platform_device_put(pdev);
+}
+
static void __init rbtx4927_device_init(void)
{
toshiba_rbtx4927_rtc_init();
@@ -322,6 +338,7 @@ static void __init rbtx4927_device_init(void)
tx4927_wdt_init();
rbtx4927_mtd_init();
txx9_iocled_init(RBTX4927_LED_ADDR - IO_BASE, -1, 3, 1, "green", NULL);
+ rbtx4927_gpioled_init();
}
struct txx9_board_vec rbtx4927_vec __initdata = {
diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c
index 9855d7bccc20..98fbd9391bf8 100644
--- a/arch/mips/txx9/rbtx4939/setup.c
+++ b/arch/mips/txx9/rbtx4939/setup.c
@@ -14,6 +14,8 @@
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
+#include <linux/interrupt.h>
+#include <linux/smc91x.h>
#include <asm/reboot.h>
#include <asm/txx9/generic.h>
#include <asm/txx9/pci.h>
@@ -33,6 +35,21 @@ static void __init rbtx4939_time_init(void)
tx4939_time_init(0);
}
+#if defined(__BIG_ENDIAN) && \
+ (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE))
+#define HAVE_RBTX4939_IOSWAB
+#define IS_CE1_ADDR(addr) \
+ ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
+static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x)
+{
+ return IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
+}
+static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x)
+{
+ return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
+}
+#endif /* __BIG_ENDIAN && CONFIG_SMC91X */
+
static void __init rbtx4939_pci_setup(void)
{
#ifdef CONFIG_PCI
@@ -239,6 +256,32 @@ static inline void rbtx4939_led_setup(void)
}
#endif
+static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
+{
+#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
+ unsigned long flags;
+ local_irq_save(flags);
+ /* bit7: reserved for LED class */
+ led_val[pos] = (led_val[pos] & 0x80) | (val & 0x7f);
+ val = led_val[pos];
+ local_irq_restore(flags);
+#endif
+ writeb(val, rbtx4939_7seg_addr(pos / 4, pos % 4));
+}
+
+static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
+{
+ /* convert from map_to_seg7() notation */
+ val = (val & 0x88) |
+ ((val & 0x40) >> 6) |
+ ((val & 0x20) >> 4) |
+ ((val & 0x10) >> 2) |
+ ((val & 0x04) << 2) |
+ ((val & 0x02) << 4) |
+ ((val & 0x01) << 6);
+ __rbtx4939_7segled_putc(pos, val);
+}
+
static void __init rbtx4939_arch_init(void)
{
rbtx4939_pci_setup();
@@ -246,22 +289,50 @@ static void __init rbtx4939_arch_init(void)
static void __init rbtx4939_device_init(void)
{
+ unsigned long smc_addr = RBTX4939_ETHER_ADDR - IO_BASE;
+ struct resource smc_res[] = {
+ {
+ .start = smc_addr,
+ .end = smc_addr + 0x10 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = RBTX4939_IRQ_ETHER,
+ /* override default irq flag defined in smc91x.h */
+ .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
+ },
+ };
+ struct smc91x_platdata smc_pdata = {
+ .flags = SMC91X_USE_16BIT,
+ };
+ struct platform_device *pdev;
#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
int i, j;
unsigned char ethaddr[2][6];
+ u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
+
for (i = 0; i < 2; i++) {
unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
- if (readb(rbtx4939_bdipsw_addr) & 8) {
+ if (bdipsw == 0)
+ memcpy(ethaddr[i], (void *)area, 6);
+ else {
u16 buf[3];
- area -= 0x03000000;
+ if (bdipsw & 8)
+ area -= 0x03000000;
+ else
+ area -= 0x01000000;
for (j = 0; j < 3; j++)
buf[j] = le16_to_cpup((u16 *)(area + j * 2));
memcpy(ethaddr[i], buf, 6);
- } else
- memcpy(ethaddr[i], (void *)area, 6);
+ }
}
tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
#endif
+ pdev = platform_device_alloc("smc91x", -1);
+ if (!pdev ||
+ platform_device_add_resources(pdev, smc_res, ARRAY_SIZE(smc_res)) ||
+ platform_device_add_data(pdev, &smc_pdata, sizeof(smc_pdata)) ||
+ platform_device_add(pdev))
+ platform_device_put(pdev);
rbtx4939_led_setup();
tx4939_wdt_init();
tx4939_ata_init();
@@ -269,6 +340,8 @@ static void __init rbtx4939_device_init(void)
static void __init rbtx4939_setup(void)
{
+ int i;
+
rbtx4939_ebusc_setup();
/* always enable ATA0 */
txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
@@ -276,9 +349,16 @@ static void __init rbtx4939_setup(void)
if (txx9_master_clock == 0)
txx9_master_clock = 20000000;
tx4939_setup();
+#ifdef HAVE_RBTX4939_IOSWAB
+ ioswabw = rbtx4939_ioswabw;
+ __mem_ioswabw = rbtx4939_mem_ioswabw;
+#endif
_machine_restart = rbtx4939_machine_restart;
+ txx9_7segled_init(RBTX4939_MAX_7SEGLEDS, rbtx4939_7segled_putc);
+ for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++)
+ txx9_7segled_putc(i, '-');
pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5b1527883fcb..525c13a4de93 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -108,8 +108,7 @@ config ARCH_NO_VIRT_TO_BUS
config PPC
bool
default y
- select HAVE_DYNAMIC_FTRACE
- select HAVE_FTRACE
+ select HAVE_FUNCTION_TRACER
select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_IDE
select HAVE_IOREMAP_PROT
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 24dd1a37f8fb..1f0667069940 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -122,7 +122,7 @@ KBUILD_CFLAGS += -mcpu=powerpc
endif
# Work around a gcc code-gen bug with -fno-omit-frame-pointer.
-ifeq ($(CONFIG_FTRACE),y)
+ifeq ($(CONFIG_FUNCTION_TRACER),y)
KBUILD_CFLAGS += -mno-sched-epilog
endif
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h
index de921326cca8..b298f7a631e6 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arch/powerpc/include/asm/ftrace.h
@@ -1,7 +1,7 @@
#ifndef _ASM_POWERPC_FTRACE
#define _ASM_POWERPC_FTRACE
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#define MCOUNT_ADDR ((long)(_mcount))
#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index fdb58253fa5b..92673b43858d 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -12,7 +12,7 @@ CFLAGS_prom_init.o += -fPIC
CFLAGS_btext.o += -fPIC
endif
-ifdef CONFIG_FTRACE
+ifdef CONFIG_FUNCTION_TRACER
# Do not trace early boot code
CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog
CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 1cbbf7033641..7ecc0d1855c3 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -1158,7 +1158,7 @@ machine_check_in_rtas:
#endif /* CONFIG_PPC_RTAS */
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
_GLOBAL(mcount)
_GLOBAL(_mcount)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index fd8b4bae9b04..e6d52845854f 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -884,7 +884,7 @@ _GLOBAL(enter_prom)
mtlr r0
blr
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
_GLOBAL(mcount)
_GLOBAL(_mcount)
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 3855ceb937b0..f4b006ed0ab1 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -28,17 +28,17 @@ static unsigned int ftrace_nop = 0x60000000;
#endif
-static unsigned int notrace ftrace_calc_offset(long ip, long addr)
+static unsigned int ftrace_calc_offset(long ip, long addr)
{
return (int)(addr - ip);
}
-notrace unsigned char *ftrace_nop_replace(void)
+unsigned char *ftrace_nop_replace(void)
{
return (char *)&ftrace_nop;
}
-notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
+unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
{
static unsigned int op;
@@ -68,7 +68,7 @@ notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
# define _ASM_PTR " .long "
#endif
-notrace int
+int
ftrace_modify_code(unsigned long ip, unsigned char *old_code,
unsigned char *new_code)
{
@@ -113,7 +113,7 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
return faulted;
}
-notrace int ftrace_update_ftrace_func(ftrace_func_t func)
+int ftrace_update_ftrace_func(ftrace_func_t func)
{
unsigned long ip = (unsigned long)(&ftrace_call);
unsigned char old[MCOUNT_INSN_SIZE], *new;
@@ -126,23 +126,6 @@ notrace int ftrace_update_ftrace_func(ftrace_func_t func)
return ret;
}
-notrace int ftrace_mcount_set(unsigned long *data)
-{
- unsigned long ip = (long)(&mcount_call);
- unsigned long *addr = data;
- unsigned char old[MCOUNT_INSN_SIZE], *new;
-
- /*
- * Replace the mcount stub with a pointer to the
- * ip recorder function.
- */
- memcpy(old, &mcount_call, MCOUNT_INSN_SIZE);
- new = ftrace_call_replace(ip, *addr);
- *addr = ftrace_modify_code(ip, old, new);
-
- return 0;
-}
-
int __init ftrace_dyn_arch_init(void *data)
{
/* This is running in kstop_machine */
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 8edc2359c419..260089dccfb0 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -68,7 +68,7 @@ EXPORT_SYMBOL(single_step_exception);
EXPORT_SYMBOL(sys_sigreturn);
#endif
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
EXPORT_SYMBOL(_mcount);
#endif
diff --git a/arch/powerpc/platforms/powermac/Makefile b/arch/powerpc/platforms/powermac/Makefile
index be60d64be7ad..50f169392551 100644
--- a/arch/powerpc/platforms/powermac/Makefile
+++ b/arch/powerpc/platforms/powermac/Makefile
@@ -1,6 +1,6 @@
CFLAGS_bootx_init.o += -fPIC
-ifdef CONFIG_FTRACE
+ifdef CONFIG_FUNCTION_TRACER
# Do not trace early boot code
CFLAGS_REMOVE_bootx_init.o = -pg -mno-sched-epilog
endif
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 70b7645ce745..8116a3328a19 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -241,19 +241,17 @@ config PACK_STACK
Say Y if you are unsure.
config SMALL_STACK
- bool "Use 4kb/8kb for kernel stack instead of 8kb/16kb"
- depends on PACK_STACK && !LOCKDEP
+ bool "Use 8kb for kernel stack instead of 16kb"
+ depends on PACK_STACK && 64BIT && !LOCKDEP
help
If you say Y here and the compiler supports the -mkernel-backchain
- option the kernel will use a smaller kernel stack size. For 31 bit
- the reduced size is 4kb instead of 8kb and for 64 bit it is 8kb
- instead of 16kb. This allows to run more thread on a system and
- reduces the pressure on the memory management for higher order
- page allocations.
+ option the kernel will use a smaller kernel stack size. The reduced
+ size is 8kb instead of 16kb. This allows to run more threads on a
+ system and reduces the pressure on the memory management for higher
+ order page allocations.
Say N if you are unsure.
-
config CHECK_STACK
bool "Detect kernel stack overflow"
help
@@ -384,7 +382,7 @@ config IPL
choice
prompt "IPL method generated into head.S"
depends on IPL
- default IPL_TAPE
+ default IPL_VM
help
Select "tape" if you want to IPL the image from a Tape.
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index a7f8979fb925..a06a47cdd5e0 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -424,7 +424,7 @@ out:
*/
int appldata_register_ops(struct appldata_ops *ops)
{
- if ((ops->size > APPLDATA_MAX_REC_SIZE) || (ops->size < 0))
+ if (ops->size > APPLDATA_MAX_REC_SIZE)
return -EINVAL;
ops->ctl_table = kzalloc(4 * sizeof(struct ctl_table), GFP_KERNEL);
diff --git a/arch/s390/include/asm/kvm_virtio.h b/arch/s390/include/asm/kvm_virtio.h
index 146100224def..c13568b9351c 100644
--- a/arch/s390/include/asm/kvm_virtio.h
+++ b/arch/s390/include/asm/kvm_virtio.h
@@ -52,7 +52,7 @@ struct kvm_vqconfig {
#ifdef __KERNEL__
/* early virtio console setup */
-#ifdef CONFIG_VIRTIO_CONSOLE
+#ifdef CONFIG_S390_GUEST
extern void s390_virtio_console_init(void);
#else
static inline void s390_virtio_console_init(void)
diff --git a/arch/s390/include/asm/mmu.h b/arch/s390/include/asm/mmu.h
index 5dd5e7b3476f..d2b4ff831477 100644
--- a/arch/s390/include/asm/mmu.h
+++ b/arch/s390/include/asm/mmu.h
@@ -7,7 +7,8 @@ typedef struct {
unsigned long asce_bits;
unsigned long asce_limit;
int noexec;
- int pgstes;
+ int has_pgste; /* The mmu context has extended page tables */
+ int alloc_pgste; /* cloned contexts will have extended page tables */
} mm_context_t;
#endif
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index 4c2fbf48c9c4..28ec870655af 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -20,12 +20,25 @@ static inline int init_new_context(struct task_struct *tsk,
#ifdef CONFIG_64BIT
mm->context.asce_bits |= _ASCE_TYPE_REGION3;
#endif
- if (current->mm->context.pgstes) {
+ if (current->mm->context.alloc_pgste) {
+ /*
+ * alloc_pgste indicates, that any NEW context will be created
+ * with extended page tables. The old context is unchanged. The
+ * page table allocation and the page table operations will
+ * look at has_pgste to distinguish normal and extended page
+ * tables. The only way to create extended page tables is to
+ * set alloc_pgste and then create a new context (e.g. dup_mm).
+ * The page table allocation is called after init_new_context
+ * and if has_pgste is set, it will create extended page
+ * tables.
+ */
mm->context.noexec = 0;
- mm->context.pgstes = 1;
+ mm->context.has_pgste = 1;
+ mm->context.alloc_pgste = 1;
} else {
mm->context.noexec = s390_noexec;
- mm->context.pgstes = 0;
+ mm->context.has_pgste = 0;
+ mm->context.alloc_pgste = 0;
}
mm->context.asce_limit = STACK_TOP_MAX;
crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 1a928f84afd6..7fc76133b3e4 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -679,7 +679,7 @@ static inline void pmd_clear(pmd_t *pmd)
static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
- if (mm->context.pgstes)
+ if (mm->context.has_pgste)
ptep_rcp_copy(ptep);
pte_val(*ptep) = _PAGE_TYPE_EMPTY;
if (mm->context.noexec)
@@ -763,7 +763,7 @@ static inline int kvm_s390_test_and_clear_page_dirty(struct mm_struct *mm,
struct page *page;
unsigned int skey;
- if (!mm->context.pgstes)
+ if (!mm->context.has_pgste)
return -EINVAL;
rcp_lock(ptep);
pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
@@ -794,7 +794,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
int young;
unsigned long *pgste;
- if (!vma->vm_mm->context.pgstes)
+ if (!vma->vm_mm->context.has_pgste)
return 0;
physpage = pte_val(*ptep) & PAGE_MASK;
pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
@@ -844,7 +844,7 @@ static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
static inline void ptep_invalidate(struct mm_struct *mm,
unsigned long address, pte_t *ptep)
{
- if (mm->context.pgstes) {
+ if (mm->context.has_pgste) {
rcp_lock(ptep);
__ptep_ipte(address, ptep);
ptep_rcp_copy(ptep);
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index de3fad60c682..c1eaf9604da7 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -15,13 +15,8 @@
* Size of kernel stack for each process
*/
#ifndef __s390x__
-#ifndef __SMALL_STACK
#define THREAD_ORDER 1
#define ASYNC_ORDER 1
-#else
-#define THREAD_ORDER 0
-#define ASYNC_ORDER 0
-#endif
#else /* __s390x__ */
#ifndef __SMALL_STACK
#define THREAD_ORDER 2
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 9e8b1f9b8f4d..b5595688a477 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -1119,9 +1119,7 @@ out:
return rc;
}
-static ssize_t __ref rescan_store(struct sys_device *dev,
- struct sysdev_attribute *attr,
- const char *buf,
+static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
size_t count)
{
int rc;
@@ -1129,12 +1127,10 @@ static ssize_t __ref rescan_store(struct sys_device *dev,
rc = smp_rescan_cpus();
return rc ? rc : count;
}
-static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store);
+static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
#endif /* CONFIG_HOTPLUG_CPU */
-static ssize_t dispatching_show(struct sys_device *dev,
- struct sysdev_attribute *attr,
- char *buf)
+static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
{
ssize_t count;
@@ -1144,9 +1140,8 @@ static ssize_t dispatching_show(struct sys_device *dev,
return count;
}
-static ssize_t dispatching_store(struct sys_device *dev,
- struct sysdev_attribute *attr,
- const char *buf, size_t count)
+static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf,
+ size_t count)
{
int val, rc;
char delim;
@@ -1168,7 +1163,8 @@ out:
put_online_cpus();
return rc ? rc : count;
}
-static SYSDEV_ATTR(dispatching, 0644, dispatching_show, dispatching_store);
+static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
+ dispatching_store);
static int __init topology_init(void)
{
@@ -1178,13 +1174,11 @@ static int __init topology_init(void)
register_cpu_notifier(&smp_cpu_nb);
#ifdef CONFIG_HOTPLUG_CPU
- rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
- &attr_rescan.attr);
+ rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
if (rc)
return rc;
#endif
- rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
- &attr_dispatching.attr);
+ rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
if (rc)
return rc;
for_each_present_cpu(cpu) {
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 3d98ba82ea67..ef3635b52fc0 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -169,7 +169,7 @@ unsigned long *page_table_alloc(struct mm_struct *mm)
unsigned long *table;
unsigned long bits;
- bits = (mm->context.noexec || mm->context.pgstes) ? 3UL : 1UL;
+ bits = (mm->context.noexec || mm->context.has_pgste) ? 3UL : 1UL;
spin_lock(&mm->page_table_lock);
page = NULL;
if (!list_empty(&mm->context.pgtable_list)) {
@@ -186,7 +186,7 @@ unsigned long *page_table_alloc(struct mm_struct *mm)
pgtable_page_ctor(page);
page->flags &= ~FRAG_MASK;
table = (unsigned long *) page_to_phys(page);
- if (mm->context.pgstes)
+ if (mm->context.has_pgste)
clear_table_pgstes(table);
else
clear_table(table, _PAGE_TYPE_EMPTY, PAGE_SIZE);
@@ -210,7 +210,7 @@ void page_table_free(struct mm_struct *mm, unsigned long *table)
struct page *page;
unsigned long bits;
- bits = (mm->context.noexec || mm->context.pgstes) ? 3UL : 1UL;
+ bits = (mm->context.noexec || mm->context.has_pgste) ? 3UL : 1UL;
bits <<= (__pa(table) & (PAGE_SIZE - 1)) / 256 / sizeof(unsigned long);
page = pfn_to_page(__pa(table) >> PAGE_SHIFT);
spin_lock(&mm->page_table_lock);
@@ -257,7 +257,7 @@ int s390_enable_sie(void)
struct mm_struct *mm, *old_mm;
/* Do we have pgstes? if yes, we are done */
- if (tsk->mm->context.pgstes)
+ if (tsk->mm->context.has_pgste)
return 0;
/* lets check if we are allowed to replace the mm */
@@ -269,14 +269,14 @@ int s390_enable_sie(void)
}
task_unlock(tsk);
- /* we copy the mm with pgstes enabled */
- tsk->mm->context.pgstes = 1;
+ /* we copy the mm and let dup_mm create the page tables with_pgstes */
+ tsk->mm->context.alloc_pgste = 1;
mm = dup_mm(tsk);
- tsk->mm->context.pgstes = 0;
+ tsk->mm->context.alloc_pgste = 0;
if (!mm)
return -ENOMEM;
- /* Now lets check again if somebody attached ptrace etc */
+ /* Now lets check again if something happened */
task_lock(tsk);
if (!tsk->mm || atomic_read(&tsk->mm->mm_users) > 1 ||
tsk->mm != tsk->active_mm || tsk->mm->ioctx_list) {
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index cb2c87df70ce..80119b3398e7 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -24,7 +24,7 @@ config SUPERH32
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_ARCH_TRACEHOOK
- select HAVE_FTRACE
+ select HAVE_FUNCTION_TRACER
config SUPERH64
def_bool y if CPU_SH5
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 1f409bf81809..c43eb0d7fa3b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -2,7 +2,7 @@
# arch/sh/Makefile
#
# Copyright (C) 1999 Kaz Kojima
-# Copyright (C) 2002, 2003, 2004 Paul Mundt
+# Copyright (C) 2002 - 2008 Paul Mundt
# Copyright (C) 2002 M. R. Brown
#
# This file is subject to the terms and conditions of the GNU General Public
@@ -18,16 +18,12 @@ isa-$(CONFIG_CPU_SH4) := sh4
isa-$(CONFIG_CPU_SH4A) := sh4a
isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al
isa-$(CONFIG_CPU_SH5) := shmedia
-isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
-ifndef CONFIG_SH_DSP
-ifndef CONFIG_SH_FPU
-isa-y := $(isa-y)-nofpu
-endif
+ifeq ($(CONFIG_SUPERH32),y)
+isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
+isa-y := $(isa-y)-up
endif
-isa-y := $(isa-y)-up
-
cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,)
cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \
$(call cc-option,-m2a-nofpu,)
@@ -38,6 +34,22 @@ cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \
$(call cc-option,-m4a-nofpu,)
cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,)
+ifeq ($(cflags-y),)
+#
+# In the case where we are stuck with a compiler that has been uselessly
+# restricted to a particular ISA, a favourite default of newer GCCs when
+# extensive multilib targets are not provided, ensure we get the best fit
+# regarding FP generation. This is necessary to avoid references to FP
+# variants in libgcc where integer variants exist, which otherwise result
+# in link errors. This is intentionally stupid (albeit many orders of
+# magnitude less than GCC's default behaviour), as anything with a large
+# number of multilib targets better have been built correctly for
+# the target in mind.
+#
+cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \
+ grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//')
+endif
+
cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
@@ -65,7 +77,8 @@ OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \
-R .stab -R .stabstr -S
# Give the various platforms the opportunity to set default image types
-defaultimage-$(CONFIG_SUPERH32) := zImage
+defaultimage-$(CONFIG_SUPERH32) := zImage
+defaultimage-$(CONFIG_SH_SH7785LCR) := uImage
# Set some sensible Kbuild defaults
KBUILD_DEFCONFIG := shx3_defconfig
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
index 301e6d503256..b96a055b053e 100644
--- a/arch/sh/boot/compressed/Makefile_32
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -23,7 +23,7 @@ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-ifeq ($(CONFIG_FTRACE),y)
+ifeq ($(CONFIG_FUNCTION_TRACER),y)
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
index 7892361eedc8..f43d18373f22 100644
--- a/arch/sh/cchips/Kconfig
+++ b/arch/sh/cchips/Kconfig
@@ -22,20 +22,6 @@ config HD64461
Say Y if you want support for the HD64461.
Otherwise, say N.
-config HD64465
- bool "Hitachi HD64465 companion chip support"
- ---help---
- The Hitachi HD64465 provides an interface for
- the SH7750 CPU, supporting a LCD controller,
- CRT color controller, IrDA, USB, PCMCIA,
- keyboard controller, and a printer interface.
-
- More information is available at
- <http://global.hitachi.com/New/cnews/E/1998/981019B.html>.
-
- Say Y if you want support for the HD64465.
- Otherwise, say N.
-
endchoice
# These will also be split into the Kconfig's below
@@ -61,23 +47,4 @@ config HD64461_ENABLER
via the HD64461 companion chip.
Otherwise, say N.
-config HD64465_IOBASE
- hex "HD64465 start address"
- depends on HD64465
- default "0xb0000000"
- help
- The default setting of the HD64465 IO base address is 0xb0000000.
-
- Do not change this unless you know what you are doing.
-
-config HD64465_IRQ
- int "HD64465 IRQ"
- depends on HD64465
- default "5"
- help
- The default setting of the HD64465 IRQ is 5.
-
- Do not change this unless you know what you are doing.
-
endmenu
-
diff --git a/arch/sh/cchips/hd6446x/Makefile b/arch/sh/cchips/hd6446x/Makefile
index f7de4076e242..9682e3ab668f 100644
--- a/arch/sh/cchips/hd6446x/Makefile
+++ b/arch/sh/cchips/hd6446x/Makefile
@@ -1,4 +1,3 @@
obj-$(CONFIG_HD64461) += hd64461.o
-obj-$(CONFIG_HD64465) += hd64465/
EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/cchips/hd6446x/hd64465/Makefile b/arch/sh/cchips/hd6446x/hd64465/Makefile
deleted file mode 100644
index f66edcb52c5b..000000000000
--- a/arch/sh/cchips/hd6446x/hd64465/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile for the HD64465
-#
-
-obj-y := setup.o io.o gpio.o
-
diff --git a/arch/sh/cchips/hd6446x/hd64465/gpio.c b/arch/sh/cchips/hd6446x/hd64465/gpio.c
deleted file mode 100644
index 43431855ec86..000000000000
--- a/arch/sh/cchips/hd6446x/hd64465/gpio.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * $Id: gpio.c,v 1.4 2003/05/19 22:24:18 lethal Exp $
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc
- *
- * GPIO pin support for HD64465 companion chip.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/hd64465/gpio.h>
-
-#define _PORTOF(portpin) (((portpin)>>3)&0x7)
-#define _PINOF(portpin) ((portpin)&0x7)
-
-/* Register addresses parametrised on port */
-#define GPIO_CR(port) (HD64465_REG_GPACR+((port)<<1))
-#define GPIO_DR(port) (HD64465_REG_GPADR+((port)<<1))
-#define GPIO_ICR(port) (HD64465_REG_GPAICR+((port)<<1))
-#define GPIO_ISR(port) (HD64465_REG_GPAISR+((port)<<1))
-
-#define GPIO_NPORTS 5
-
-#define MODNAME "hd64465_gpio"
-
-EXPORT_SYMBOL(hd64465_gpio_configure);
-EXPORT_SYMBOL(hd64465_gpio_get_pin);
-EXPORT_SYMBOL(hd64465_gpio_get_port);
-EXPORT_SYMBOL(hd64465_gpio_register_irq);
-EXPORT_SYMBOL(hd64465_gpio_set_pin);
-EXPORT_SYMBOL(hd64465_gpio_set_port);
-EXPORT_SYMBOL(hd64465_gpio_unregister_irq);
-
-/* TODO: each port should be protected with a spinlock */
-
-
-void hd64465_gpio_configure(int portpin, int direction)
-{
- unsigned short cr;
- unsigned int shift = (_PINOF(portpin)<<1);
-
- cr = inw(GPIO_CR(_PORTOF(portpin)));
- cr &= ~(3<<shift);
- cr |= direction<<shift;
- outw(cr, GPIO_CR(_PORTOF(portpin)));
-}
-
-void hd64465_gpio_set_pin(int portpin, unsigned int value)
-{
- unsigned short d;
- unsigned short mask = 1<<(_PINOF(portpin));
-
- d = inw(GPIO_DR(_PORTOF(portpin)));
- if (value)
- d |= mask;
- else
- d &= ~mask;
- outw(d, GPIO_DR(_PORTOF(portpin)));
-}
-
-unsigned int hd64465_gpio_get_pin(int portpin)
-{
- return inw(GPIO_DR(_PORTOF(portpin))) & (1<<(_PINOF(portpin)));
-}
-
-/* TODO: for cleaner atomicity semantics, add a mask to this routine */
-
-void hd64465_gpio_set_port(int port, unsigned int value)
-{
- outw(value, GPIO_DR(port));
-}
-
-unsigned int hd64465_gpio_get_port(int port)
-{
- return inw(GPIO_DR(port));
-}
-
-
-static struct {
- void (*func)(int portpin, void *dev);
- void *dev;
-} handlers[GPIO_NPORTS * 8];
-
-static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev)
-{
- unsigned short port, pin, isr, mask, portpin;
-
- for (port=0 ; port<GPIO_NPORTS ; port++) {
- isr = inw(GPIO_ISR(port));
-
- for (pin=0 ; pin<8 ; pin++) {
- mask = 1<<pin;
- if (isr & mask) {
- portpin = (port<<3)|pin;
- if (handlers[portpin].func != 0)
- handlers[portpin].func(portpin, handlers[portpin].dev);
- else
- printk(KERN_NOTICE "unexpected GPIO interrupt, pin %c%d\n",
- port+'A', (int)pin);
- }
- }
-
- /* Write 1s back to ISR to clear it? That's what the manual says.. */
- outw(isr, GPIO_ISR(port));
- }
-
- return IRQ_HANDLED;
-}
-
-void hd64465_gpio_register_irq(int portpin, int mode,
- void (*handler)(int portpin, void *dev), void *dev)
-{
- unsigned long flags;
- unsigned short icr, mask;
-
- if (handler == 0)
- return;
-
- local_irq_save(flags);
-
- handlers[portpin].func = handler;
- handlers[portpin].dev = dev;
-
- /*
- * Configure Interrupt Control Register
- */
- icr = inw(GPIO_ICR(_PORTOF(portpin)));
- mask = (1<<_PINOF(portpin));
-
- /* unmask interrupt */
- icr &= ~mask;
-
- /* set TS bit */
- mask <<= 8;
- icr &= ~mask;
- if (mode == HD64465_GPIO_RISING)
- icr |= mask;
-
- outw(icr, GPIO_ICR(_PORTOF(portpin)));
-
- local_irq_restore(flags);
-}
-
-void hd64465_gpio_unregister_irq(int portpin)
-{
- unsigned long flags;
- unsigned short icr;
-
- local_irq_save(flags);
-
- /*
- * Configure Interrupt Control Register
- */
- icr = inw(GPIO_ICR(_PORTOF(portpin)));
- icr |= (1<<_PINOF(portpin)); /* mask interrupt */
- outw(icr, GPIO_ICR(_PORTOF(portpin)));
-
- handlers[portpin].func = 0;
- handlers[portpin].dev = 0;
-
- local_irq_restore(flags);
-}
-
-static int __init hd64465_gpio_init(void)
-{
- if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME))
- return -EBUSY;
- if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt,
- IRQF_DISABLED, MODNAME, 0))
- goto out_irqfailed;
-
- printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO);
-
- return 0;
-
-out_irqfailed:
- release_region(HD64465_REG_GPACR, 0x1000);
-
- return -EINVAL;
-}
-
-static void __exit hd64465_gpio_exit(void)
-{
- release_region(HD64465_REG_GPACR, 0x1000);
- free_irq(HD64465_IRQ_GPIO, 0);
-}
-
-module_init(hd64465_gpio_init);
-module_exit(hd64465_gpio_exit);
-
-MODULE_LICENSE("GPL");
-
diff --git a/arch/sh/cchips/hd6446x/hd64465/io.c b/arch/sh/cchips/hd6446x/hd64465/io.c
deleted file mode 100644
index 58704d066ae2..000000000000
--- a/arch/sh/cchips/hd6446x/hd64465/io.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc
- *
- * Derived from io_hd64461.c, which bore the message:
- * Copyright (C) 2000 YAEGASHI Takeshi
- *
- * Typical I/O routines for HD64465 system.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <asm/io.h>
-#include <asm/hd64465/hd64465.h>
-
-
-#define HD64465_DEBUG 0
-
-#if HD64465_DEBUG
-#define DPRINTK(args...) printk(args)
-#define DIPRINTK(n, args...) if (hd64465_io_debug>(n)) printk(args)
-#else
-#define DPRINTK(args...)
-#define DIPRINTK(n, args...)
-#endif
-
-
-
-/* This is a hack suitable only for debugging IO port problems */
-int hd64465_io_debug;
-EXPORT_SYMBOL(hd64465_io_debug);
-
-/* Low iomap maps port 0-1K to addresses in 8byte chunks */
-#define HD64465_IOMAP_LO_THRESH 0x400
-#define HD64465_IOMAP_LO_SHIFT 3
-#define HD64465_IOMAP_LO_MASK ((1<<HD64465_IOMAP_LO_SHIFT)-1)
-#define HD64465_IOMAP_LO_NMAP (HD64465_IOMAP_LO_THRESH>>HD64465_IOMAP_LO_SHIFT)
-static unsigned long hd64465_iomap_lo[HD64465_IOMAP_LO_NMAP];
-static unsigned char hd64465_iomap_lo_shift[HD64465_IOMAP_LO_NMAP];
-
-/* High iomap maps port 1K-64K to addresses in 1K chunks */
-#define HD64465_IOMAP_HI_THRESH 0x10000
-#define HD64465_IOMAP_HI_SHIFT 10
-#define HD64465_IOMAP_HI_MASK ((1<<HD64465_IOMAP_HI_SHIFT)-1)
-#define HD64465_IOMAP_HI_NMAP (HD64465_IOMAP_HI_THRESH>>HD64465_IOMAP_HI_SHIFT)
-static unsigned long hd64465_iomap_hi[HD64465_IOMAP_HI_NMAP];
-static unsigned char hd64465_iomap_hi_shift[HD64465_IOMAP_HI_NMAP];
-
-#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
-
-void hd64465_port_map(unsigned short baseport, unsigned int nports,
- unsigned long addr, unsigned char shift)
-{
- unsigned int port, endport = baseport + nports;
-
- DPRINTK("hd64465_port_map(base=0x%04hx, n=0x%04hx, addr=0x%08lx,endport=0x%04x)\n",
- baseport, nports, addr,endport);
-
- for (port = baseport ;
- port < endport && port < HD64465_IOMAP_LO_THRESH ;
- port += (1<<HD64465_IOMAP_LO_SHIFT)) {
- DPRINTK(" maplo[0x%x] = 0x%08lx\n", port, addr);
- hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = addr;
- hd64465_iomap_lo_shift[port>>HD64465_IOMAP_LO_SHIFT] = shift;
- addr += (1<<(HD64465_IOMAP_LO_SHIFT));
- }
-
- for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH);
- port < endport && port < HD64465_IOMAP_HI_THRESH ;
- port += (1<<HD64465_IOMAP_HI_SHIFT)) {
- DPRINTK(" maphi[0x%x] = 0x%08lx\n", port, addr);
- hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = addr;
- hd64465_iomap_hi_shift[port>>HD64465_IOMAP_HI_SHIFT] = shift;
- addr += (1<<(HD64465_IOMAP_HI_SHIFT));
- }
-}
-EXPORT_SYMBOL(hd64465_port_map);
-
-void hd64465_port_unmap(unsigned short baseport, unsigned int nports)
-{
- unsigned int port, endport = baseport + nports;
-
- DPRINTK("hd64465_port_unmap(base=0x%04hx, n=0x%04hx)\n",
- baseport, nports);
-
- for (port = baseport ;
- port < endport && port < HD64465_IOMAP_LO_THRESH ;
- port += (1<<HD64465_IOMAP_LO_SHIFT)) {
- hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = 0;
- }
-
- for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH);
- port < endport && port < HD64465_IOMAP_HI_THRESH ;
- port += (1<<HD64465_IOMAP_HI_SHIFT)) {
- hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = 0;
- }
-}
-EXPORT_SYMBOL(hd64465_port_unmap);
-
-unsigned long hd64465_isa_port2addr(unsigned long port)
-{
- unsigned long addr = 0;
- unsigned char shift;
-
- /* handle remapping of low IO ports */
- if (port < HD64465_IOMAP_LO_THRESH) {
- addr = hd64465_iomap_lo[port >> HD64465_IOMAP_LO_SHIFT];
- shift = hd64465_iomap_lo_shift[port >> HD64465_IOMAP_LO_SHIFT];
- if (addr != 0)
- addr += (port & HD64465_IOMAP_LO_MASK) << shift;
- else
- printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
- } else if (port < HD64465_IOMAP_HI_THRESH) {
- addr = hd64465_iomap_hi[port >> HD64465_IOMAP_HI_SHIFT];
- shift = hd64465_iomap_hi_shift[port >> HD64465_IOMAP_HI_SHIFT];
- if (addr != 0)
- addr += (port & HD64465_IOMAP_HI_MASK) << shift;
- else
- printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
- }
-
- /* HD64465 internal devices (0xb0000000) */
- else if (port < 0x20000)
- addr = CONFIG_HD64465_IOBASE + port - 0x10000;
-
- /* Whole physical address space (0xa0000000) */
- else
- addr = P2SEGADDR(port);
-
- DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr);
-
- return addr;
-}
-
-static inline void delay(void)
-{
- ctrl_inw(0xa0000000);
-}
-
-unsigned char hd64465_inb(unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
-
- DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b);
- return b;
-}
-
-unsigned char hd64465_inb_p(unsigned long port)
-{
- unsigned long v;
- unsigned long addr = PORT2ADDR(port);
-
- v = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
- delay();
- DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v);
- return v;
-}
-
-unsigned short hd64465_inw(unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr);
- DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b);
- return b;
-}
-
-unsigned int hd64465_inl(unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr);
- DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b);
- return b;
-}
-
-void hd64465_outb(unsigned char b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
-
- DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr);
- if (addr != 0)
- *(volatile unsigned char*)addr = b;
-}
-
-void hd64465_outb_p(unsigned char b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
-
- DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr);
- if (addr != 0)
- *(volatile unsigned char*)addr = b;
- delay();
-}
-
-void hd64465_outw(unsigned short b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr);
- if (addr != 0)
- *(volatile unsigned short*)addr = b;
-}
-
-void hd64465_outl(unsigned int b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr);
- if (addr != 0)
- *(volatile unsigned long*)addr = b;
-}
-
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
deleted file mode 100644
index 9b8820c36701..000000000000
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
- *
- * Setup and IRQ handling code for the HD64465 companion chip.
- * by Greg Banks <gbanks@pocketpenguins.com>
- * Copyright (c) 2000 PocketPenguins Inc
- *
- * Derived from setup_hd64461.c which bore the message:
- * Copyright (C) 2000 YAEGASHI Takeshi
- */
-
-#include <linux/sched.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/hd64465/hd64465.h>
-
-static void disable_hd64465_irq(unsigned int irq)
-{
- unsigned short nimr;
- unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
-
- pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
- nimr = inw(HD64465_REG_NIMR);
- nimr |= mask;
- outw(nimr, HD64465_REG_NIMR);
-}
-
-static void enable_hd64465_irq(unsigned int irq)
-{
- unsigned short nimr;
- unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
-
- pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
- nimr = inw(HD64465_REG_NIMR);
- nimr &= ~mask;
- outw(nimr, HD64465_REG_NIMR);
-}
-
-static void mask_and_ack_hd64465(unsigned int irq)
-{
- disable_hd64465_irq(irq);
-}
-
-static void end_hd64465_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_hd64465_irq(irq);
-}
-
-static unsigned int startup_hd64465_irq(unsigned int irq)
-{
- enable_hd64465_irq(irq);
- return 0;
-}
-
-static void shutdown_hd64465_irq(unsigned int irq)
-{
- disable_hd64465_irq(irq);
-}
-
-static struct hw_interrupt_type hd64465_irq_type = {
- .typename = "HD64465-IRQ",
- .startup = startup_hd64465_irq,
- .shutdown = shutdown_hd64465_irq,
- .enable = enable_hd64465_irq,
- .disable = disable_hd64465_irq,
- .ack = mask_and_ack_hd64465,
- .end = end_hd64465_irq,
-};
-
-static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
-{
- printk(KERN_INFO
- "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
- inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
-
- return IRQ_NONE;
-}
-
-/*
- * Support for a secondary IRQ demux step. This is necessary
- * because the HD64465 presents a very thin interface to the
- * PCMCIA bus; a lot of features (such as remapping interrupts)
- * normally done in hardware by other PCMCIA host bridges is
- * instead done in software.
- */
-static struct {
- int (*func)(int, void *);
- void *dev;
-} hd64465_demux[HD64465_IRQ_NUM];
-
-void hd64465_register_irq_demux(int irq,
- int (*demux)(int irq, void *dev), void *dev)
-{
- hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
- hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
-}
-EXPORT_SYMBOL(hd64465_register_irq_demux);
-
-void hd64465_unregister_irq_demux(int irq)
-{
- hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
-}
-EXPORT_SYMBOL(hd64465_unregister_irq_demux);
-
-int hd64465_irq_demux(int irq)
-{
- if (irq == CONFIG_HD64465_IRQ) {
- unsigned short i, bit;
- unsigned short nirr = inw(HD64465_REG_NIRR);
- unsigned short nimr = inw(HD64465_REG_NIMR);
-
- pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
- nirr &= ~nimr;
- for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
- if (nirr & bit)
- break;
-
- if (i < HD64465_IRQ_NUM) {
- irq = HD64465_IRQ_BASE + i;
- if (hd64465_demux[i].func != 0)
- irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
- }
- }
- return irq;
-}
-
-static struct irqaction irq0 = {
- .handler = hd64465_interrupt,
- .flags = IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
- .name = "HD64465",
-};
-
-static int __init setup_hd64465(void)
-{
- int i;
- unsigned short rev;
- unsigned short smscr;
-
- if (!MACH_HD64465)
- return 0;
-
- printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
- CONFIG_HD64465_IOBASE,
- CONFIG_HD64465_IRQ,
- HD64465_IRQ_BASE,
- HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
-
- if (inw(HD64465_REG_SDID) != HD64465_SDID) {
- printk(KERN_ERR "HD64465 device ID not found, check base address\n");
- }
-
- rev = inw(HD64465_REG_SRR);
- printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
-
- outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
-
- for (i = 0; i < HD64465_IRQ_NUM ; i++) {
- irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
- }
-
- setup_irq(CONFIG_HD64465_IRQ, &irq0);
-
- /* wake up the UART from STANDBY at this point */
- smscr = inw(HD64465_REG_SMSCR);
- outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
-
- /* remap IO ports for first ISA serial port to HD64465 UART */
- hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
-
- return 0;
-}
-module_init(setup_hd64465);
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index 624c47aa66d3..30cac42f25e7 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27
-# Tue Oct 21 12:57:28 2008
+# Linux kernel version: 2.6.28-rc2
+# Fri Oct 31 15:58:06 2008
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
@@ -73,7 +73,6 @@ CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_PCI_QUIRKS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
@@ -285,7 +284,7 @@ CONFIG_GUSA=y
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on"
+CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on root=/dev/nfs ip=dhcp"
#
# Bus options
@@ -718,6 +717,7 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
@@ -969,7 +969,23 @@ CONFIG_TMPFS=y
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
#
# Partition Types
@@ -1019,7 +1035,12 @@ CONFIG_CRYPTO=y
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
-# CONFIG_CRYPTO_MANAGER is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
@@ -1096,7 +1117,7 @@ CONFIG_CRYPTO=y
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_HW is not set
#
# Library routines
diff --git a/arch/sh/configs/ul2_defconfig b/arch/sh/configs/ul2_defconfig
new file mode 100644
index 000000000000..9afff67d9ff2
--- /dev/null
+++ b/arch/sh/configs/ul2_defconfig
@@ -0,0 +1,1169 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc2
+# Tue Oct 28 17:35:17 2008
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_SYS_SUPPORTS_NUMA=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SH4AL_DSP=y
+CONFIG_CPU_SHX2=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+CONFIG_CPU_SUBTYPE_SH7366=y
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x01f00000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_NUMA=y
+CONFIG_NODES_SHIFT=1
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_HUGETLB_PAGE_SIZE_64K=y
+# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
+# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_NEED_MULTIPLE_NODES=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_MIGRATION is not set
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_SH_FPU_EMU is not set
+# CONFIG_SH_DSP is not set
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_PTEA=y
+CONFIG_CPU_HAS_DSP=y
+
+#
+# Board support
+#
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+# CONFIG_PREEMPT_RCU is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=dhcp"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+CONFIG_CFG80211=y
+CONFIG_NL80211=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_MAC80211=y
+
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_RC_MINSTREL is not set
+CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
+CONFIG_MAC80211_RC_DEFAULT="pid"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+CONFIG_IEEE80211=m
+CONFIG_IEEE80211_DEBUG=y
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+CONFIG_PATA_PLATFORM=y
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_DEBUG=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_RT2X00 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_AX8817X=y
+CONFIG_USB_NET_CDCETHER=y
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=1
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_SUPERH_ON_CHIP_R8A66597 is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_SH_KGDB is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+CONFIG_CRYPTO_MICHAEL_MIC=y
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/include/asm/byteorder.h b/arch/sh/include/asm/byteorder.h
index 4c13e6117563..f5fa0653ebc6 100644
--- a/arch/sh/include/asm/byteorder.h
+++ b/arch/sh/include/asm/byteorder.h
@@ -8,7 +8,15 @@
#include <linux/compiler.h>
#include <linux/types.h>
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
+#ifdef __LITTLE_ENDIAN__
+# define __LITTLE_ENDIAN
+#else
+# define __BIG_ENDIAN
+#endif
+
+#define __SWAB_64_THRU_32__
+
+static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
{
__asm__(
#ifdef __SH5__
@@ -24,8 +32,9 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
return x;
}
+#define __arch_swab32 __arch_swab32
-static inline __attribute_const__ __u16 ___arch__swab16(__u16 x)
+static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
{
__asm__(
#ifdef __SH5__
@@ -39,32 +48,21 @@ static inline __attribute_const__ __u16 ___arch__swab16(__u16 x)
return x;
}
+#define __arch_swab16 __arch_swab16
-static inline __u64 ___arch__swab64(__u64 val)
+static inline __u64 __arch_swab64(__u64 val)
{
union {
struct { __u32 a,b; } s;
__u64 u;
} v, w;
v.u = val;
- w.s.b = ___arch__swab32(v.s.a);
- w.s.a = ___arch__swab32(v.s.b);
+ w.s.b = __arch_swab32(v.s.a);
+ w.s.a = __arch_swab32(v.s.b);
return w.u;
}
+#define __arch_swab64 __arch_swab64
-#define __arch__swab64(x) ___arch__swab64(x)
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-# define __BYTEORDER_HAS_U64__
-# define __SWAB_64_THRU_32__
-#endif
-
-#ifdef __LITTLE_ENDIAN__
-#include <linux/byteorder/little_endian.h>
-#else
-#include <linux/byteorder/big_endian.h>
-#endif
+#include <linux/byteorder.h>
#endif /* __ASM_SH_BYTEORDER_H */
diff --git a/arch/sh/include/asm/hd64465/gpio.h b/arch/sh/include/asm/hd64465/gpio.h
deleted file mode 100644
index a3cdca2713dd..000000000000
--- a/arch/sh/include/asm/hd64465/gpio.h
+++ /dev/null
@@ -1,46 +0,0 @@
-#ifndef _ASM_SH_HD64465_GPIO_
-#define _ASM_SH_HD64465_GPIO_ 1
-/*
- * $Id: gpio.h,v 1.3 2003/05/04 19:30:14 lethal Exp $
- *
- * Hitachi HD64465 companion chip: General Purpose IO pins support.
- * This layer enables other device drivers to configure GPIO
- * pins, get and set their values, and register an interrupt
- * routine for when input pins change in hardware.
- *
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- */
-#include <asm/hd64465.h>
-
-/* Macro to construct a portpin number (used in all
- * subsequent functions) from a port letter and a pin
- * number, e.g. HD64465_GPIO_PORTPIN('A', 5).
- */
-#define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin))
-
-/* Pin configuration constants for _configure() */
-#define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */
-#define HD64465_GPIO_OUT 1 /* output */
-#define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */
-#define HD64465_GPIO_IN 3 /* input */
-
-/* Configure a pin's direction */
-extern void hd64465_gpio_configure(int portpin, int direction);
-
-/* Get, set value */
-extern void hd64465_gpio_set_pin(int portpin, unsigned int value);
-extern unsigned int hd64465_gpio_get_pin(int portpin);
-extern void hd64465_gpio_set_port(int port, unsigned int value);
-extern unsigned int hd64465_gpio_get_port(int port);
-
-/* mode constants for _register_irq() */
-#define HD64465_GPIO_FALLING 0
-#define HD64465_GPIO_RISING 1
-
-/* Interrupt on external value change */
-extern void hd64465_gpio_register_irq(int portpin, int mode,
- void (*handler)(int portpin, void *dev), void *dev);
-extern void hd64465_gpio_unregister_irq(int portpin);
-
-#endif /* _ASM_SH_HD64465_GPIO_ */
diff --git a/arch/sh/include/asm/hd64465/hd64465.h b/arch/sh/include/asm/hd64465/hd64465.h
deleted file mode 100644
index cfd0e803d2a2..000000000000
--- a/arch/sh/include/asm/hd64465/hd64465.h
+++ /dev/null
@@ -1,256 +0,0 @@
-#ifndef _ASM_SH_HD64465_
-#define _ASM_SH_HD64465_ 1
-/*
- * $Id: hd64465.h,v 1.3 2003/05/04 19:30:15 lethal Exp $
- *
- * Hitachi HD64465 companion chip support
- *
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- *
- * Derived from <asm/hd64461.h> which bore the message:
- * Copyright (C) 2000 YAEGASHI Takeshi
- */
-#include <asm/io.h>
-#include <asm/irq.h>
-
-/*
- * Note that registers are defined here as virtual port numbers,
- * which have no meaning except to get translated by hd64465_isa_port2addr()
- * to an address in the range 0xb0000000-0xb3ffffff. Note that
- * this translation happens to consist of adding the lower 16 bits
- * of the virtual port number to 0xb0000000. Note also that the manual
- * shows addresses as absolute physical addresses starting at 0x10000000,
- * so e.g. the NIRR register is listed as 0x15000 here, 0x10005000 in the
- * manual, and accessed using address 0xb0005000 - Greg.
- */
-
-/* System registers */
-#define HD64465_REG_SRR 0x1000c /* System Revision Register */
-#define HD64465_REG_SDID 0x10010 /* System Device ID Reg */
-#define HD64465_SDID 0x8122 /* 64465 device ID */
-
-/* Power Management registers */
-#define HD64465_REG_SMSCR 0x10000 /* System Module Standby Control Reg */
-#define HD64465_SMSCR_PS2ST 0x4000 /* PS/2 Standby */
-#define HD64465_SMSCR_ADCST 0x1000 /* ADC Standby */
-#define HD64465_SMSCR_UARTST 0x0800 /* UART Standby */
-#define HD64465_SMSCR_SCDIST 0x0200 /* Serial Codec Standby */
-#define HD64465_SMSCR_PPST 0x0100 /* Parallel Port Standby */
-#define HD64465_SMSCR_PC0ST 0x0040 /* PCMCIA0 Standby */
-#define HD64465_SMSCR_PC1ST 0x0020 /* PCMCIA1 Standby */
-#define HD64465_SMSCR_AFEST 0x0010 /* AFE Standby */
-#define HD64465_SMSCR_TM0ST 0x0008 /* Timer0 Standby */
-#define HD64465_SMSCR_TM1ST 0x0004 /* Timer1 Standby */
-#define HD64465_SMSCR_IRDAST 0x0002 /* IRDA Standby */
-#define HD64465_SMSCR_KBCST 0x0001 /* Keyboard Controller Standby */
-
-/* Interrupt Controller registers */
-#define HD64465_REG_NIRR 0x15000 /* Interrupt Request Register */
-#define HD64465_REG_NIMR 0x15002 /* Interrupt Mask Register */
-#define HD64465_REG_NITR 0x15004 /* Interrupt Trigger Mode Register */
-
-/* Timer registers */
-#define HD64465_REG_TCVR1 0x16000 /* Timer 1 constant value register */
-#define HD64465_REG_TCVR0 0x16002 /* Timer 0 constant value register */
-#define HD64465_REG_TRVR1 0x16004 /* Timer 1 read value register */
-#define HD64465_REG_TRVR0 0x16006 /* Timer 0 read value register */
-#define HD64465_REG_TCR1 0x16008 /* Timer 1 control register */
-#define HD64465_REG_TCR0 0x1600A /* Timer 0 control register */
-#define HD64465_TCR_EADT 0x10 /* Enable ADTRIG# signal */
-#define HD64465_TCR_ETMO 0x08 /* Enable TMO signal */
-#define HD64465_TCR_PST_MASK 0x06 /* Clock Prescale */
-#define HD64465_TCR_PST_1 0x06 /* 1:1 */
-#define HD64465_TCR_PST_4 0x04 /* 1:4 */
-#define HD64465_TCR_PST_8 0x02 /* 1:8 */
-#define HD64465_TCR_PST_16 0x00 /* 1:16 */
-#define HD64465_TCR_TSTP 0x01 /* Start/Stop timer */
-#define HD64465_REG_TIRR 0x1600C /* Timer interrupt request register */
-#define HD64465_REG_TIDR 0x1600E /* Timer interrupt disable register */
-#define HD64465_REG_PWM1CS 0x16010 /* PWM 1 clock scale register */
-#define HD64465_REG_PWM1LPC 0x16012 /* PWM 1 low pulse width counter register */
-#define HD64465_REG_PWM1HPC 0x16014 /* PWM 1 high pulse width counter register */
-#define HD64465_REG_PWM0CS 0x16018 /* PWM 0 clock scale register */
-#define HD64465_REG_PWM0LPC 0x1601A /* PWM 0 low pulse width counter register */
-#define HD64465_REG_PWM0HPC 0x1601C /* PWM 0 high pulse width counter register */
-
-/* Analog/Digital Converter registers */
-#define HD64465_REG_ADDRA 0x1E000 /* A/D data register A */
-#define HD64465_REG_ADDRB 0x1E002 /* A/D data register B */
-#define HD64465_REG_ADDRC 0x1E004 /* A/D data register C */
-#define HD64465_REG_ADDRD 0x1E006 /* A/D data register D */
-#define HD64465_REG_ADCSR 0x1E008 /* A/D control/status register */
-#define HD64465_ADCSR_ADF 0x80 /* A/D End Flag */
-#define HD64465_ADCSR_ADST 0x40 /* A/D Start Flag */
-#define HD64465_ADCSR_ADIS 0x20 /* A/D Interrupt Status */
-#define HD64465_ADCSR_TRGE 0x10 /* A/D Trigger Enable */
-#define HD64465_ADCSR_ADIE 0x08 /* A/D Interrupt Enable */
-#define HD64465_ADCSR_SCAN 0x04 /* A/D Scan Mode */
-#define HD64465_ADCSR_CH_MASK 0x03 /* A/D Channel */
-#define HD64465_REG_ADCALCR 0x1E00A /* A/D calibration sample control */
-#define HD64465_REG_ADCAL 0x1E00C /* A/D calibration data register */
-
-
-/* General Purpose I/O ports registers */
-#define HD64465_REG_GPACR 0x14000 /* Port A Control Register */
-#define HD64465_REG_GPBCR 0x14002 /* Port B Control Register */
-#define HD64465_REG_GPCCR 0x14004 /* Port C Control Register */
-#define HD64465_REG_GPDCR 0x14006 /* Port D Control Register */
-#define HD64465_REG_GPECR 0x14008 /* Port E Control Register */
-#define HD64465_REG_GPADR 0x14010 /* Port A Data Register */
-#define HD64465_REG_GPBDR 0x14012 /* Port B Data Register */
-#define HD64465_REG_GPCDR 0x14014 /* Port C Data Register */
-#define HD64465_REG_GPDDR 0x14016 /* Port D Data Register */
-#define HD64465_REG_GPEDR 0x14018 /* Port E Data Register */
-#define HD64465_REG_GPAICR 0x14020 /* Port A Interrupt Control Register */
-#define HD64465_REG_GPBICR 0x14022 /* Port B Interrupt Control Register */
-#define HD64465_REG_GPCICR 0x14024 /* Port C Interrupt Control Register */
-#define HD64465_REG_GPDICR 0x14026 /* Port D Interrupt Control Register */
-#define HD64465_REG_GPEICR 0x14028 /* Port E Interrupt Control Register */
-#define HD64465_REG_GPAISR 0x14040 /* Port A Interrupt Status Register */
-#define HD64465_REG_GPBISR 0x14042 /* Port B Interrupt Status Register */
-#define HD64465_REG_GPCISR 0x14044 /* Port C Interrupt Status Register */
-#define HD64465_REG_GPDISR 0x14046 /* Port D Interrupt Status Register */
-#define HD64465_REG_GPEISR 0x14048 /* Port E Interrupt Status Register */
-
-/* PCMCIA bridge interface */
-#define HD64465_REG_PCC0ISR 0x12000 /* socket 0 interface status */
-#define HD64465_PCCISR_PREADY 0x80 /* mem card ready / io card IREQ */
-#define HD64465_PCCISR_PIREQ 0x80
-#define HD64465_PCCISR_PMWP 0x40 /* mem card write-protected */
-#define HD64465_PCCISR_PVS2 0x20 /* voltage select pin 2 */
-#define HD64465_PCCISR_PVS1 0x10 /* voltage select pin 1 */
-#define HD64465_PCCISR_PCD_MASK 0x0c /* card detect */
-#define HD64465_PCCISR_PBVD_MASK 0x03 /* battery voltage */
-#define HD64465_PCCISR_PBVD_BATGOOD 0x03 /* battery good */
-#define HD64465_PCCISR_PBVD_BATWARN 0x01 /* battery low warning */
-#define HD64465_PCCISR_PBVD_BATDEAD1 0x02 /* battery dead */
-#define HD64465_PCCISR_PBVD_BATDEAD2 0x00 /* battery dead */
-#define HD64465_REG_PCC0GCR 0x12002 /* socket 0 general control */
-#define HD64465_PCCGCR_PDRV 0x80 /* output drive */
-#define HD64465_PCCGCR_PCCR 0x40 /* PC card reset */
-#define HD64465_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */
-#define HD64465_PCCGCR_PVCC0 0x10 /* voltage control pin VCC0SEL0 */
-#define HD64465_PCCGCR_PMMOD 0x08 /* memory mode */
-#define HD64465_PCCGCR_PPA25 0x04 /* pin A25 */
-#define HD64465_PCCGCR_PPA24 0x02 /* pin A24 */
-#define HD64465_PCCGCR_PREG 0x01 /* ping PCC0REG# */
-#define HD64465_REG_PCC0CSCR 0x12004 /* socket 0 card status change */
-#define HD64465_PCCCSCR_PSCDI 0x80 /* sw card detect intr */
-#define HD64465_PCCCSCR_PSWSEL 0x40 /* power select */
-#define HD64465_PCCCSCR_PIREQ 0x20 /* IREQ intr req */
-#define HD64465_PCCCSCR_PSC 0x10 /* STSCHG (status change) pin */
-#define HD64465_PCCCSCR_PCDC 0x08 /* CD (card detect) change */
-#define HD64465_PCCCSCR_PRC 0x04 /* ready change */
-#define HD64465_PCCCSCR_PBW 0x02 /* battery warning change */
-#define HD64465_PCCCSCR_PBD 0x01 /* battery dead change */
-#define HD64465_REG_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */
-#define HD64465_PCCCSCIER_PCRE 0x80 /* change reset enable */
-#define HD64465_PCCCSCIER_PIREQE_MASK 0x60 /* IREQ enable */
-#define HD64465_PCCCSCIER_PIREQE_DISABLED 0x00 /* IREQ disabled */
-#define HD64465_PCCCSCIER_PIREQE_LEVEL 0x20 /* IREQ level-triggered */
-#define HD64465_PCCCSCIER_PIREQE_FALLING 0x40 /* IREQ falling-edge-trig */
-#define HD64465_PCCCSCIER_PIREQE_RISING 0x60 /* IREQ rising-edge-trig */
-#define HD64465_PCCCSCIER_PSCE 0x10 /* status change enable */
-#define HD64465_PCCCSCIER_PCDE 0x08 /* card detect change enable */
-#define HD64465_PCCCSCIER_PRE 0x04 /* ready change enable */
-#define HD64465_PCCCSCIER_PBWE 0x02 /* battery warn change enable */
-#define HD64465_PCCCSCIER_PBDE 0x01 /* battery dead change enable*/
-#define HD64465_REG_PCC0SCR 0x12008 /* socket 0 software control */
-#define HD64465_PCCSCR_SHDN 0x10 /* TPS2206 SHutDowN pin */
-#define HD64465_PCCSCR_SWP 0x01 /* write protect */
-#define HD64465_REG_PCCPSR 0x1200A /* serial power switch control */
-#define HD64465_REG_PCC1ISR 0x12010 /* socket 1 interface status */
-#define HD64465_REG_PCC1GCR 0x12012 /* socket 1 general control */
-#define HD64465_REG_PCC1CSCR 0x12014 /* socket 1 card status change */
-#define HD64465_REG_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */
-#define HD64465_REG_PCC1SCR 0x12018 /* socket 1 software control */
-
-
-/* PS/2 Keyboard and mouse controller -- *not* register compatible */
-#define HD64465_REG_KBCSR 0x1dc00 /* Keyboard Control/Status reg */
-#define HD64465_KBCSR_KBCIE 0x8000 /* KBCK Input Enable */
-#define HD64465_KBCSR_KBCOE 0x4000 /* KBCK Output Enable */
-#define HD64465_KBCSR_KBDOE 0x2000 /* KB DATA Output Enable */
-#define HD64465_KBCSR_KBCD 0x1000 /* KBCK Driven */
-#define HD64465_KBCSR_KBDD 0x0800 /* KB DATA Driven */
-#define HD64465_KBCSR_KBCS 0x0400 /* KBCK pin Status */
-#define HD64465_KBCSR_KBDS 0x0200 /* KB DATA pin Status */
-#define HD64465_KBCSR_KBDP 0x0100 /* KB DATA Parity bit */
-#define HD64465_KBCSR_KBD_MASK 0x00ff /* KD DATA shift reg */
-#define HD64465_REG_KBISR 0x1dc04 /* Keyboard Interrupt Status reg */
-#define HD64465_KBISR_KBRDF 0x0001 /* KB Received Data Full */
-#define HD64465_REG_MSCSR 0x1dc10 /* Mouse Control/Status reg */
-#define HD64465_REG_MSISR 0x1dc14 /* Mouse Interrupt Status reg */
-
-
-/*
- * Logical address at which the HD64465 is mapped. Note that this
- * should always be in the P2 segment (uncached and untranslated).
- */
-#ifndef CONFIG_HD64465_IOBASE
-#define CONFIG_HD64465_IOBASE 0xb0000000
-#endif
-/*
- * The HD64465 multiplexes all its modules' interrupts onto
- * this single interrupt.
- */
-#ifndef CONFIG_HD64465_IRQ
-#define CONFIG_HD64465_IRQ 5
-#endif
-
-
-#define _HD64465_IO_MASK 0xf8000000
-#define is_hd64465_addr(addr) \
- ((addr & _HD64465_IO_MASK) == (CONFIG_HD64465_IOBASE & _HD64465_IO_MASK))
-
-/*
- * A range of 16 virtual interrupts generated by
- * demuxing the HD64465 muxed interrupt.
- */
-#define HD64465_IRQ_BASE OFFCHIP_IRQ_BASE
-#define HD64465_IRQ_NUM 16
-#define HD64465_IRQ_ADC (HD64465_IRQ_BASE+0)
-#define HD64465_IRQ_USB (HD64465_IRQ_BASE+1)
-#define HD64465_IRQ_SCDI (HD64465_IRQ_BASE+2)
-#define HD64465_IRQ_PARALLEL (HD64465_IRQ_BASE+3)
-/* bit 4 is reserved */
-#define HD64465_IRQ_UART (HD64465_IRQ_BASE+5)
-#define HD64465_IRQ_IRDA (HD64465_IRQ_BASE+6)
-#define HD64465_IRQ_PS2MOUSE (HD64465_IRQ_BASE+7)
-#define HD64465_IRQ_KBC (HD64465_IRQ_BASE+8)
-#define HD64465_IRQ_TIMER1 (HD64465_IRQ_BASE+9)
-#define HD64465_IRQ_TIMER0 (HD64465_IRQ_BASE+10)
-#define HD64465_IRQ_GPIO (HD64465_IRQ_BASE+11)
-#define HD64465_IRQ_AFE (HD64465_IRQ_BASE+12)
-#define HD64465_IRQ_PCMCIA1 (HD64465_IRQ_BASE+13)
-#define HD64465_IRQ_PCMCIA0 (HD64465_IRQ_BASE+14)
-#define HD64465_IRQ_PS2KBD (HD64465_IRQ_BASE+15)
-
-/* Constants for PCMCIA mappings */
-#define HD64465_PCC_WINDOW 0x01000000
-
-#define HD64465_PCC0_BASE 0xb8000000 /* area 6 */
-#define HD64465_PCC0_ATTR (HD64465_PCC0_BASE)
-#define HD64465_PCC0_COMM (HD64465_PCC0_BASE+HD64465_PCC_WINDOW)
-#define HD64465_PCC0_IO (HD64465_PCC0_BASE+2*HD64465_PCC_WINDOW)
-
-#define HD64465_PCC1_BASE 0xb4000000 /* area 5 */
-#define HD64465_PCC1_ATTR (HD64465_PCC1_BASE)
-#define HD64465_PCC1_COMM (HD64465_PCC1_BASE+HD64465_PCC_WINDOW)
-#define HD64465_PCC1_IO (HD64465_PCC1_BASE+2*HD64465_PCC_WINDOW)
-
-/*
- * Base of USB controller interface (as memory)
- */
-#define HD64465_USB_BASE (CONFIG_HD64465_IOBASE+0xb000)
-#define HD64465_USB_LEN 0x1000
-/*
- * Base of embedded SRAM, used for USB controller.
- */
-#define HD64465_SRAM_BASE (CONFIG_HD64465_IOBASE+0x9000)
-#define HD64465_SRAM_LEN 0x1000
-
-
-
-#endif /* _ASM_SH_HD64465_ */
diff --git a/arch/sh/include/asm/hd64465/io.h b/arch/sh/include/asm/hd64465/io.h
deleted file mode 100644
index 139f1472e5bb..000000000000
--- a/arch/sh/include/asm/hd64465/io.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * include/asm-sh/hd64465/io.h
- *
- * By Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- *
- * Derived from io_hd64461.h, which bore the message:
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller".
- */
-
-#ifndef _ASM_SH_IO_HD64465_H
-#define _ASM_SH_IO_HD64465_H
-
-extern unsigned char hd64465_inb(unsigned long port);
-extern unsigned short hd64465_inw(unsigned long port);
-extern unsigned int hd64465_inl(unsigned long port);
-
-extern void hd64465_outb(unsigned char value, unsigned long port);
-extern void hd64465_outw(unsigned short value, unsigned long port);
-extern void hd64465_outl(unsigned int value, unsigned long port);
-
-extern unsigned char hd64465_inb_p(unsigned long port);
-extern void hd64465_outb_p(unsigned char value, unsigned long port);
-
-extern unsigned long hd64465_isa_port2addr(unsigned long offset);
-extern int hd64465_irq_demux(int irq);
-/* Provision for generic secondary demux step -- used by PCMCIA code */
-extern void hd64465_register_irq_demux(int irq,
- int (*demux)(int irq, void *dev), void *dev);
-extern void hd64465_unregister_irq_demux(int irq);
-/* Set this variable to 1 to see port traffic */
-extern int hd64465_io_debug;
-/* Map a range of ports to a range of kernel virtual memory.
- */
-extern void hd64465_port_map(unsigned short baseport, unsigned int nports,
- unsigned long addr, unsigned char shift);
-extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports);
-
-#endif /* _ASM_SH_IO_HD64465_H */
diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h
index e13cc948ee60..11f854dd1363 100644
--- a/arch/sh/include/asm/serial.h
+++ b/arch/sh/include/asm/serial.h
@@ -7,8 +7,6 @@
#ifndef _ASM_SERIAL_H
#define _ASM_SERIAL_H
-#include <linux/kernel.h>
-
/*
* This assumes you have a 1.8432 MHz clock for your UART.
*
@@ -18,19 +16,4 @@
*/
#define BASE_BAUD ( 1843200 / 16 )
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#ifdef CONFIG_HD64465
-#include <asm/hd64465/hd64465.h>
-
-#define SERIAL_PORT_DFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
-
-#else
-
-#define SERIAL_PORT_DFNS
-
-#endif
-
#endif /* _ASM_SERIAL_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/rtc.h b/arch/sh/include/cpu-sh4/cpu/rtc.h
index 25b1e6adfe8c..95e6fb76c24d 100644
--- a/arch/sh/include/cpu-sh4/cpu/rtc.h
+++ b/arch/sh/include/cpu-sh4/cpu/rtc.h
@@ -1,7 +1,7 @@
#ifndef __ASM_SH_CPU_SH4_RTC_H
#define __ASM_SH_CPU_SH4_RTC_H
-#ifdef CONFIG_CPU_SUBTYPE_SH7723
+#if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7723)
#define rtc_reg_size sizeof(u16)
#else
#define rtc_reg_size sizeof(u32)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 6851dba02f31..e17db39b97aa 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -36,6 +36,32 @@ static struct platform_device iic_device = {
.resource = iic_resources,
};
+static struct resource usb_host_resources[] = {
+ [0] = {
+ .name = "r8a66597_hcd",
+ .start = 0xa4d80000,
+ .end = 0xa4d800ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "r8a66597_hcd",
+ .start = 65,
+ .end = 65,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device usb_host_device = {
+ .name = "r8a66597_hcd",
+ .id = -1,
+ .dev = {
+ .dma_mask = NULL,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(usb_host_resources),
+ .resource = usb_host_resources,
+};
+
static struct uio_info vpu_platform_data = {
.name = "VPU5",
.version = "0",
@@ -142,6 +168,7 @@ static struct platform_device sci_device = {
static struct platform_device *sh7366_devices[] __initdata = {
&iic_device,
&sci_device,
+ &usb_host_device,
&vpu_device,
&veu0_device,
&veu1_device,
@@ -158,6 +185,7 @@ static int __init sh7366_devices_setup(void)
clk_always_enable("mstp022"); /* INTC */
clk_always_enable("mstp020"); /* SuperHyway */
clk_always_enable("mstp109"); /* I2C */
+ clk_always_enable("mstp211"); /* USB */
clk_always_enable("mstp207"); /* VEU-2 */
clk_always_enable("mstp202"); /* VEU-1 */
clk_always_enable("mstp201"); /* VPU */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index de1ede92176e..ef77ee1d9f53 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -1,7 +1,7 @@
/*
* SH7722 Setup
*
- * Copyright (C) 2006 - 2007 Paul Mundt
+ * Copyright (C) 2006 - 2008 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -16,6 +16,36 @@
#include <asm/clock.h>
#include <asm/mmzone.h>
+static struct resource rtc_resources[] = {
+ [0] = {
+ .start = 0xa465fec0,
+ .end = 0xa465fec0 + 0x58 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ [1] = {
+ /* Period IRQ */
+ .start = 45,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ /* Carry IRQ */
+ .start = 46,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ /* Alarm IRQ */
+ .start = 44,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device rtc_device = {
+ .name = "sh-rtc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(rtc_resources),
+ .resource = rtc_resources,
+};
+
static struct resource usbf_resources[] = {
[0] = {
.name = "m66592_udc",
@@ -150,6 +180,7 @@ static struct platform_device sci_device = {
};
static struct platform_device *sh7722_devices[] __initdata = {
+ &rtc_device,
&usbf_device,
&iic_device,
&sci_device,
@@ -202,7 +233,6 @@ enum {
IRDA, JPU, LCDC,
/* interrupt groups */
-
SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI,
};
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 1a5cf9dd82de..5b7efc4016fa 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -372,7 +372,7 @@ syscall_exit:
7: .long do_syscall_trace_enter
8: .long do_syscall_trace_leave
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
.align 2
.globl _mcount
.type _mcount,@function
@@ -414,4 +414,4 @@ skip_trace:
ftrace_stub:
rts
nop
-#endif /* CONFIG_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index d366a7443720..92ae5e6c099e 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -50,7 +50,10 @@ EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__ndelay);
EXPORT_SYMBOL(__const_udelay);
-#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
+#define DECLARE_EXPORT(name) \
+ extern void name(void);EXPORT_SYMBOL(name)
+#define MAYBE_DECLARE_EXPORT(name) \
+ extern void name(void) __weak;EXPORT_SYMBOL(name)
/* These symbols are generated by the compiler itself */
DECLARE_EXPORT(__udivsi3);
@@ -109,10 +112,8 @@ DECLARE_EXPORT(__movmemSI12_i4);
* compiler which include backported patches.
*/
DECLARE_EXPORT(__udiv_qrnnd_16);
-#if !defined(CONFIG_CPU_SH2)
-DECLARE_EXPORT(__sdivsi3_i4i);
-DECLARE_EXPORT(__udivsi3_i4i);
-#endif
+MAYBE_DECLARE_EXPORT(__sdivsi3_i4i);
+MAYBE_DECLARE_EXPORT(__udivsi3_i4i);
#endif
#else /* GCC 3.x */
DECLARE_EXPORT(__movstr_i4_even);
@@ -133,7 +134,7 @@ EXPORT_SYMBOL(flush_dcache_page);
EXPORT_SYMBOL(clear_user_page);
#endif
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
EXPORT_SYMBOL(mcount);
#endif
EXPORT_SYMBOL(csum_partial);
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 62c0c5f35120..24d86a794065 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -59,7 +59,7 @@ void __flush_purge_region(void *start, int size)
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
}
back_to_cached();
local_irq_restore(flags);
@@ -82,14 +82,14 @@ void __flush_invalidate_region(void *start, int size)
/* I-cache invalidate */
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
}
#else
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
}
#endif
back_to_cached();
diff --git a/arch/sh/oprofile/op_model_sh7750.c b/arch/sh/oprofile/op_model_sh7750.c
index 6b9a98e07004..008b3b03750a 100644
--- a/arch/sh/oprofile/op_model_sh7750.c
+++ b/arch/sh/oprofile/op_model_sh7750.c
@@ -255,10 +255,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
return -ENODEV;
ops = &sh7750_perf_counter_ops;
- ops->cpu_type = (char *)get_cpu_subtype(&current_cpu_data);
+ ops->cpu_type = "sh/sh7750";
- printk(KERN_INFO "oprofile: using SH-4 (%s) performance monitoring.\n",
- sh7750_perf_counter_ops.cpu_type);
+ printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n");
/* Clear the counters */
ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
@@ -270,4 +269,3 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
void oprofile_arch_exit(void)
{
}
-
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index d4fb11f7e2ee..d0c2928d1066 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -13,7 +13,6 @@ RTS7751R2D SH_RTS7751R2D
# List of companion chips / MFDs.
#
HD64461 HD64461
-HD64465 HD64465
#
# List of boards.
diff --git a/arch/sparc/include/asm/byteorder.h b/arch/sparc/include/asm/byteorder.h
index bcd83aa351c5..5a70f137f1f7 100644
--- a/arch/sparc/include/asm/byteorder.h
+++ b/arch/sparc/include/asm/byteorder.h
@@ -4,15 +4,14 @@
#include <asm/types.h>
#include <asm/asi.h>
-#ifdef __GNUC__
+#define __BIG_ENDIAN
#ifdef CONFIG_SPARC32
#define __SWAB_64_THRU_32__
#endif
#ifdef CONFIG_SPARC64
-
-static inline __u16 ___arch__swab16p(const __u16 *addr)
+static inline __u16 __arch_swab16p(const __u16 *addr)
{
__u16 ret;
@@ -21,8 +20,9 @@ static inline __u16 ___arch__swab16p(const __u16 *addr)
: "r" (addr), "i" (ASI_PL));
return ret;
}
+#define __arch_swab16p __arch_swab16p
-static inline __u32 ___arch__swab32p(const __u32 *addr)
+static inline __u32 __arch_swab32p(const __u32 *addr)
{
__u32 ret;
@@ -31,8 +31,9 @@ static inline __u32 ___arch__swab32p(const __u32 *addr)
: "r" (addr), "i" (ASI_PL));
return ret;
}
+#define __arch_swab32p __arch_swab32p
-static inline __u64 ___arch__swab64p(const __u64 *addr)
+static inline __u64 __arch_swab64p(const __u64 *addr)
{
__u64 ret;
@@ -41,17 +42,10 @@ static inline __u64 ___arch__swab64p(const __u64 *addr)
: "r" (addr), "i" (ASI_PL));
return ret;
}
-
-#define __arch__swab16p(x) ___arch__swab16p(x)
-#define __arch__swab32p(x) ___arch__swab32p(x)
-#define __arch__swab64p(x) ___arch__swab64p(x)
+#define __arch_swab64p __arch_swab64p
#endif /* CONFIG_SPARC64 */
-#define __BYTEORDER_HAS_U64__
-
-#endif
-
-#include <linux/byteorder/big_endian.h>
+#include <linux/byteorder.h>
#endif /* _SPARC_BYTEORDER_H */
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 62c1d94cb434..00f7383c7657 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -119,35 +119,16 @@ static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
{
struct platform_device *pdev = to_platform_device(dev);
struct m48t59_plat_data *pdata = pdev->dev.platform_data;
- void __iomem *regs = pdata->ioaddr;
- unsigned char val = readb(regs + ofs);
-
- /* the year 0 is 1968 */
- if (ofs == pdata->offset + M48T59_YEAR) {
- val += 0x68;
- if ((val & 0xf) > 9)
- val += 6;
- }
- return val;
+
+ return readb(pdata->ioaddr + ofs);
}
static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
{
struct platform_device *pdev = to_platform_device(dev);
struct m48t59_plat_data *pdata = pdev->dev.platform_data;
- void __iomem *regs = pdata->ioaddr;
-
- if (ofs == pdata->offset + M48T59_YEAR) {
- if (val < 0x68)
- val += 0x32;
- else
- val -= 0x68;
- if ((val & 0xf) > 9)
- val += 6;
- if ((val & 0xf0) > 0x9A)
- val += 0x60;
- }
- writeb(val, regs + ofs);
+
+ writeb(val, pdata->ioaddr + ofs);
}
static struct m48t59_plat_data m48t59_data = {
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 035b15af90d8..3b96e70b4670 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -11,8 +11,7 @@ config SPARC
config SPARC64
bool
default y
- select HAVE_DYNAMIC_FTRACE
- select HAVE_FTRACE
+ select HAVE_FUNCTION_TRACER
select HAVE_IDE
select HAVE_LMB
select HAVE_ARCH_KGDB
diff --git a/arch/sparc64/Kconfig.debug b/arch/sparc64/Kconfig.debug
index d6d32d178fc8..c40515c06690 100644
--- a/arch/sparc64/Kconfig.debug
+++ b/arch/sparc64/Kconfig.debug
@@ -33,7 +33,7 @@ config DEBUG_PAGEALLOC
config MCOUNT
bool
- depends on STACK_DEBUG || FTRACE
+ depends on STACK_DEBUG || FUNCTION_TRACER
default y
config FRAME_POINTER
diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile
index c0b8009ab196..b3e0b986bef8 100644
--- a/arch/sparc64/kernel/Makefile
+++ b/arch/sparc64/kernel/Makefile
@@ -5,6 +5,8 @@
EXTRA_AFLAGS := -ansi
EXTRA_CFLAGS := -Werror
+CFLAGS_REMOVE_ftrace.o = -pg
+
extra-y := head.o init_task.o vmlinux.lds
obj-y := process.o setup.o cpu.o idprom.o reboot.o \
diff --git a/arch/sparc64/kernel/ftrace.c b/arch/sparc64/kernel/ftrace.c
index 4298d0aee713..d0218e73f982 100644
--- a/arch/sparc64/kernel/ftrace.c
+++ b/arch/sparc64/kernel/ftrace.c
@@ -9,12 +9,12 @@
static const u32 ftrace_nop = 0x01000000;
-notrace unsigned char *ftrace_nop_replace(void)
+unsigned char *ftrace_nop_replace(void)
{
return (char *)&ftrace_nop;
}
-notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
+unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
{
static u32 call;
s32 off;
@@ -25,7 +25,7 @@ notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
return (unsigned char *) &call;
}
-notrace int
+int
ftrace_modify_code(unsigned long ip, unsigned char *old_code,
unsigned char *new_code)
{
@@ -59,7 +59,7 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
return faulted;
}
-notrace int ftrace_update_ftrace_func(ftrace_func_t func)
+int ftrace_update_ftrace_func(ftrace_func_t func)
{
unsigned long ip = (unsigned long)(&ftrace_call);
unsigned char old[MCOUNT_INSN_SIZE], *new;
@@ -69,24 +69,6 @@ notrace int ftrace_update_ftrace_func(ftrace_func_t func)
return ftrace_modify_code(ip, old, new);
}
-notrace int ftrace_mcount_set(unsigned long *data)
-{
- unsigned long ip = (long)(&mcount_call);
- unsigned long *addr = data;
- unsigned char old[MCOUNT_INSN_SIZE], *new;
-
- /*
- * Replace the mcount stub with a pointer to the
- * ip recorder function.
- */
- memcpy(old, &mcount_call, MCOUNT_INSN_SIZE);
- new = ftrace_call_replace(ip, *addr);
- *addr = ftrace_modify_code(ip, old, new);
-
- return 0;
-}
-
-
int __init ftrace_dyn_arch_init(void *data)
{
ftrace_mcount_set(data);
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index 80d71a5ce1e3..141da3759091 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -490,6 +490,7 @@ static struct of_device_id __initdata bq4802_match[] = {
.name = "rtc",
.compatible = "bq4802",
},
+ {},
};
static struct of_platform_driver bq4802_driver = {
@@ -503,39 +504,16 @@ static struct of_platform_driver bq4802_driver = {
static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
{
struct platform_device *pdev = to_platform_device(dev);
- struct m48t59_plat_data *pdata = pdev->dev.platform_data;
- void __iomem *regs;
- unsigned char val;
-
- regs = (void __iomem *) pdev->resource[0].start;
- val = readb(regs + ofs);
-
- /* the year 0 is 1968 */
- if (ofs == pdata->offset + M48T59_YEAR) {
- val += 0x68;
- if ((val & 0xf) > 9)
- val += 6;
- }
- return val;
+ void __iomem *regs = (void __iomem *) pdev->resource[0].start;
+
+ return readb(regs + ofs);
}
static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
{
struct platform_device *pdev = to_platform_device(dev);
- struct m48t59_plat_data *pdata = pdev->dev.platform_data;
- void __iomem *regs;
-
- regs = (void __iomem *) pdev->resource[0].start;
- if (ofs == pdata->offset + M48T59_YEAR) {
- if (val < 0x68)
- val += 0x32;
- else
- val -= 0x68;
- if ((val & 0xf) > 9)
- val += 6;
- if ((val & 0xf0) > 0x9A)
- val += 0x60;
- }
+ void __iomem *regs = (void __iomem *) pdev->resource[0].start;
+
writeb(val, regs + ofs);
}
diff --git a/arch/sparc64/lib/PeeCeeI.c b/arch/sparc64/lib/PeeCeeI.c
index 8b313f11bc8d..46053e6ddd7b 100644
--- a/arch/sparc64/lib/PeeCeeI.c
+++ b/arch/sparc64/lib/PeeCeeI.c
@@ -20,107 +20,62 @@ void outsw(unsigned long __addr, const void *src, unsigned long count)
{
void __iomem *addr = (void __iomem *) __addr;
- if (count) {
- u16 *ps = (u16 *)src;
- u32 *pi;
-
- if (((u64)src) & 0x2) {
- u16 val = le16_to_cpup(ps);
- outw(val, addr);
- ps++;
- count--;
- }
- pi = (u32 *)ps;
- while (count >= 2) {
- u32 w = le32_to_cpup(pi);
-
- pi++;
- outw(w >> 0, addr);
- outw(w >> 16, addr);
- count -= 2;
- }
- ps = (u16 *)pi;
- if (count) {
- u16 val = le16_to_cpup(ps);
- outw(val, addr);
- }
+ while (count--) {
+ __raw_writew(*(u16 *)src, addr);
+ src += sizeof(u16);
}
}
void outsl(unsigned long __addr, const void *src, unsigned long count)
{
void __iomem *addr = (void __iomem *) __addr;
+ u32 l, l2;
- if (count) {
- if ((((u64)src) & 0x3) == 0) {
- u32 *p = (u32 *)src;
- while (count--) {
- u32 val = cpu_to_le32p(p);
- outl(val, addr);
- p++;
- }
- } else {
- u8 *pb;
- u16 *ps = (u16 *)src;
- u32 l = 0, l2;
- u32 *pi;
-
- switch (((u64)src) & 0x3) {
- case 0x2:
- count -= 1;
- l = cpu_to_le16p(ps) << 16;
- ps++;
- pi = (u32 *)ps;
- while (count--) {
- l2 = cpu_to_le32p(pi);
- pi++;
- outl(((l >> 16) | (l2 << 16)), addr);
- l = l2;
- }
- ps = (u16 *)pi;
- l2 = cpu_to_le16p(ps);
- outl(((l >> 16) | (l2 << 16)), addr);
- break;
-
- case 0x1:
- count -= 1;
- pb = (u8 *)src;
- l = (*pb++ << 8);
- ps = (u16 *)pb;
- l2 = cpu_to_le16p(ps);
- ps++;
- l |= (l2 << 16);
- pi = (u32 *)ps;
- while (count--) {
- l2 = cpu_to_le32p(pi);
- pi++;
- outl(((l >> 8) | (l2 << 24)), addr);
- l = l2;
- }
- pb = (u8 *)pi;
- outl(((l >> 8) | (*pb << 24)), addr);
- break;
+ if (!count)
+ return;
- case 0x3:
- count -= 1;
- pb = (u8 *)src;
- l = (*pb++ << 24);
- pi = (u32 *)pb;
- while (count--) {
- l2 = cpu_to_le32p(pi);
- pi++;
- outl(((l >> 24) | (l2 << 8)), addr);
- l = l2;
- }
- ps = (u16 *)pi;
- l2 = cpu_to_le16p(ps);
- ps++;
- pb = (u8 *)ps;
- l2 |= (*pb << 16);
- outl(((l >> 24) | (l2 << 8)), addr);
- break;
- }
+ switch (((unsigned long)src) & 0x3) {
+ case 0x0:
+ /* src is naturally aligned */
+ while (count--) {
+ __raw_writel(*(u32 *)src, addr);
+ src += sizeof(u32);
+ }
+ break;
+ case 0x2:
+ /* 2-byte alignment */
+ while (count--) {
+ l = (*(u16 *)src) << 16;
+ l |= *(u16 *)(src + sizeof(u16));
+ __raw_writel(l, addr);
+ src += sizeof(u32);
+ }
+ break;
+ case 0x1:
+ /* Hold three bytes in l each time, grab a byte from l2 */
+ l = (*(u8 *)src) << 24;
+ l |= (*(u16 *)(src + sizeof(u8))) << 8;
+ src += sizeof(u8) + sizeof(u16);
+ while (count--) {
+ l2 = *(u32 *)src;
+ l |= (l2 >> 24);
+ __raw_writel(l, addr);
+ l = l2 << 8;
+ src += sizeof(u32);
+ }
+ break;
+ case 0x3:
+ /* Hold a byte in l each time, grab 3 bytes from l2 */
+ l = (*(u8 *)src) << 24;
+ src += sizeof(u8);
+ while (count--) {
+ l2 = *(u32 *)src;
+ l |= (l2 >> 8);
+ __raw_writel(l, addr);
+ l = l2 << 24;
+ src += sizeof(u32);
}
+ break;
}
}
diff --git a/arch/sparc64/lib/mcount.S b/arch/sparc64/lib/mcount.S
index fad90ddb3a28..7ce9c65f3592 100644
--- a/arch/sparc64/lib/mcount.S
+++ b/arch/sparc64/lib/mcount.S
@@ -93,7 +93,7 @@ mcount:
nop
1:
#endif
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
mov %o7, %o0
.globl mcount_call
@@ -119,7 +119,7 @@ mcount_call:
.size _mcount,.-_mcount
.size mcount,.-mcount
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
.globl ftrace_stub
.type ftrace_stub,#function
ftrace_stub:
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 350bee1d54dc..6f20718d3156 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -28,7 +28,7 @@ config X86
select HAVE_KRETPROBES
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
- select HAVE_FTRACE
+ select HAVE_FUNCTION_TRACER
select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
select HAVE_ARCH_KGDB if !X86_VOYAGER
select HAVE_ARCH_TRACEHOOK
@@ -231,6 +231,10 @@ config SMP
If you don't know what to do here, say N.
+config X86_HAS_BOOT_CPU_ID
+ def_bool y
+ depends on X86_VOYAGER
+
config X86_FIND_SMP_CONFIG
def_bool y
depends on X86_MPPARSE || X86_VOYAGER
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 0b7c4a3f0651..b815664fe370 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -513,19 +513,19 @@ config CPU_SUP_UMC_32
If unsure, say N.
config X86_DS
- bool "Debug Store support"
- default y
- help
- Add support for Debug Store.
- This allows the kernel to provide a memory buffer to the hardware
- to store various profiling and tracing events.
+ def_bool X86_PTRACE_BTS
+ depends on X86_DEBUGCTLMSR
config X86_PTRACE_BTS
- bool "ptrace interface to Branch Trace Store"
+ bool "Branch Trace Store"
default y
- depends on (X86_DS && X86_DEBUGCTLMSR)
+ depends on X86_DEBUGCTLMSR
help
- Add a ptrace interface to allow collecting an execution trace
- of the traced task.
- This collects control flow changes in a (cyclic) buffer and allows
- debuggers to fill in the gaps and show an execution trace of the debuggee.
+ This adds a ptrace interface to the hardware's branch trace store.
+
+ Debuggers may use it to collect an execution trace of the debugged
+ application in order to answer the question 'how did I get here?'.
+ Debuggers may trace user mode as well as kernel mode.
+
+ Say Y unless there is no application development on this machine
+ and you want to save a small amount of code size.
diff --git a/arch/x86/boot/compressed/.gitignore b/arch/x86/boot/compressed/.gitignore
index be0ed065249b..63eff3b04d01 100644
--- a/arch/x86/boot/compressed/.gitignore
+++ b/arch/x86/boot/compressed/.gitignore
@@ -1 +1,3 @@
relocs
+vmlinux.bin.all
+vmlinux.relocs
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 4a5397bfce27..7f225a4b2a26 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -255,9 +255,11 @@ static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
{
-#ifdef CONFIG_X86_64
unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
+ if (dma_mask <= DMA_24BIT_MASK)
+ gfp |= GFP_DMA;
+#ifdef CONFIG_X86_64
if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
gfp |= GFP_DMA32;
#endif
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h
index 3ffc5a7bf667..398493461913 100644
--- a/arch/x86/include/asm/es7000/wakecpu.h
+++ b/arch/x86/include/asm/es7000/wakecpu.h
@@ -50,10 +50,9 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
{
}
-#if APIC_DEBUG
- #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
-#else
- #define inquire_remote_apic(apicid) {}
-#endif
+#define inquire_remote_apic(apicid) do { \
+ if (apic_verbosity >= APIC_DEBUG) \
+ __inquire_remote_apic(apicid); \
+ } while (0)
#endif /* __ASM_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
index 47f7e65e6c1d..9e8bc29b8b17 100644
--- a/arch/x86/include/asm/ftrace.h
+++ b/arch/x86/include/asm/ftrace.h
@@ -1,7 +1,7 @@
#ifndef _ASM_X86_FTRACE_H
#define _ASM_X86_FTRACE_H
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#define MCOUNT_ADDR ((long)(mcount))
#define MCOUNT_INSN_SIZE 5 /* sizeof mcount call */
@@ -19,6 +19,6 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
}
#endif
-#endif /* CONFIG_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
#endif /* _ASM_X86_FTRACE_H */
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 5618a103f395..ac2abc88cd95 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -82,9 +82,9 @@ extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);
extern void early_ioremap_init(void);
extern void early_ioremap_clear(void);
extern void early_ioremap_reset(void);
-extern void *early_ioremap(unsigned long offset, unsigned long size);
-extern void *early_memremap(unsigned long offset, unsigned long size);
-extern void early_iounmap(void *addr, unsigned long size);
+extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);
+extern void __iomem *early_memremap(unsigned long offset, unsigned long size);
+extern void early_iounmap(void __iomem *addr, unsigned long size);
extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
diff --git a/arch/x86/include/asm/iommu.h b/arch/x86/include/asm/iommu.h
index 98e28ea8cd16..e4a552d44465 100644
--- a/arch/x86/include/asm/iommu.h
+++ b/arch/x86/include/asm/iommu.h
@@ -7,7 +7,6 @@ extern struct dma_mapping_ops nommu_dma_ops;
extern int force_iommu, no_iommu;
extern int iommu_detected;
extern int dmar_disabled;
-extern int forbid_dac;
extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 65679d006337..8346be87cfa1 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -364,6 +364,9 @@ struct kvm_arch{
struct page *ept_identity_pagetable;
bool ept_identity_pagetable_done;
+
+ unsigned long irq_sources_bitmap;
+ unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
};
struct kvm_vm_stat {
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h
index d5c0b826a4ff..9d80db91e992 100644
--- a/arch/x86/include/asm/mach-default/mach_wakecpu.h
+++ b/arch/x86/include/asm/mach-default/mach_wakecpu.h
@@ -33,10 +33,9 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
{
}
-#if APIC_DEBUG
- #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
-#else
- #define inquire_remote_apic(apicid) {}
-#endif
+#define inquire_remote_apic(apicid) do { \
+ if (apic_verbosity >= APIC_DEBUG) \
+ __inquire_remote_apic(apicid); \
+ } while (0)
#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index fb16cec702e4..52597aeadfff 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -120,13 +120,13 @@ static inline void pud_clear(pud_t *pudp)
write_cr3(pgd);
}
-#define pud_page(pud) ((struct page *) __va(pud_val(pud) & PTE_PFN_MASK))
+#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK))
/* Find an entry in the second-level page table.. */
-#define pmd_offset(pud, address) ((pmd_t *)pud_page(*(pud)) + \
+#define pmd_offset(pud, address) ((pmd_t *)pud_page_vaddr(*(pud)) + \
pmd_index(address))
#ifdef CONFIG_SMP
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 2766021aef80..d12811ce51d9 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -225,5 +225,11 @@ static inline int hard_smp_processor_id(void)
#endif /* CONFIG_X86_LOCAL_APIC */
+#ifdef CONFIG_X86_HAS_BOOT_CPU_ID
+extern unsigned char boot_cpu_id;
+#else
+#define boot_cpu_id 0
+#endif
+
#endif /* __ASSEMBLY__ */
#endif /* _ASM_X86_SMP_H */
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index c6ad93e315c8..7a5782610b2b 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -13,6 +13,7 @@
#include <linux/numa.h>
#include <linux/percpu.h>
+#include <linux/timer.h>
#include <asm/types.h>
#include <asm/percpu.h>
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index d7e5a58ee22f..e489ff9cb3e2 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -6,11 +6,12 @@ extra-y := head_$(BITS).o head$(BITS).o head.o init_task.o vmlinu
CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE)
-ifdef CONFIG_FTRACE
+ifdef CONFIG_FUNCTION_TRACER
# Do not profile debug and lowlevel utilities
CFLAGS_REMOVE_tsc.o = -pg
CFLAGS_REMOVE_rtc.o = -pg
CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
+CFLAGS_REMOVE_ftrace.o = -pg
endif
#
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 0d9c993aa93e..ef8f831af823 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -69,7 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
*/
void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
{
-#ifdef CONFIG_SMP
+#ifdef CONFIG_X86_SMP
unsigned int eax, ebx, ecx, edx, sub_index;
unsigned int ht_mask_width, core_plus_mask_width;
unsigned int core_select_mask, core_level_siblings;
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 25581dcb280e..003a65395bd5 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -549,6 +549,10 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
this_cpu->c_early_init(c);
validate_pat_support(c);
+
+#ifdef CONFIG_SMP
+ c->cpu_index = boot_cpu_id;
+#endif
}
void __init early_cpu_init(void)
@@ -1134,7 +1138,7 @@ void __cpuinit cpu_init(void)
/*
* Boot processor to setup the FP and extended state context info.
*/
- if (!smp_processor_id())
+ if (smp_processor_id() == boot_cpu_id)
init_thread_xstate();
xsave_init();
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index dd65143941a8..28b597ef9ca1 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -1149,7 +1149,7 @@ ENDPROC(xen_failsafe_callback)
#endif /* CONFIG_XEN */
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(mcount)
@@ -1204,7 +1204,7 @@ trace:
jmp ftrace_stub
END(mcount)
#endif /* CONFIG_DYNAMIC_FTRACE */
-#endif /* CONFIG_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
.section .rodata,"a"
#include "syscall_table_32.S"
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 09e7145484c5..b86f332c96a6 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -61,7 +61,7 @@
.code64
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(mcount)
retq
@@ -138,7 +138,7 @@ trace:
jmp ftrace_stub
END(mcount)
#endif /* CONFIG_DYNAMIC_FTRACE */
-#endif /* CONFIG_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
#ifndef CONFIG_PREEMPT
#define retint_kernel retint_restore_args
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index d073d981a730..50ea0ac8c9bf 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -21,8 +21,7 @@
#include <asm/nops.h>
-/* Long is fine, even if it is only 4 bytes ;-) */
-static unsigned long *ftrace_nop;
+static unsigned char ftrace_nop[MCOUNT_INSN_SIZE];
union ftrace_code_union {
char code[MCOUNT_INSN_SIZE];
@@ -33,17 +32,17 @@ union ftrace_code_union {
};
-static int notrace ftrace_calc_offset(long ip, long addr)
+static int ftrace_calc_offset(long ip, long addr)
{
return (int)(addr - ip);
}
-notrace unsigned char *ftrace_nop_replace(void)
+unsigned char *ftrace_nop_replace(void)
{
- return (char *)ftrace_nop;
+ return ftrace_nop;
}
-notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
+unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
{
static union ftrace_code_union calc;
@@ -57,7 +56,7 @@ notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
return calc.code;
}
-notrace int
+int
ftrace_modify_code(unsigned long ip, unsigned char *old_code,
unsigned char *new_code)
{
@@ -66,26 +65,31 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
/*
* Note: Due to modules and __init, code can
* disappear and change, we need to protect against faulting
- * as well as code changing.
+ * as well as code changing. We do this by using the
+ * probe_kernel_* functions.
*
* No real locking needed, this code is run through
* kstop_machine, or before SMP starts.
*/
- if (__copy_from_user_inatomic(replaced, (char __user *)ip, MCOUNT_INSN_SIZE))
- return 1;
+ /* read the text we want to modify */
+ if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
+ return -EFAULT;
+
+ /* Make sure it is what we expect it to be */
if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0)
- return 2;
+ return -EINVAL;
- WARN_ON_ONCE(__copy_to_user_inatomic((char __user *)ip, new_code,
- MCOUNT_INSN_SIZE));
+ /* replace the text with the new text */
+ if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
+ return -EPERM;
sync_core();
return 0;
}
-notrace int ftrace_update_ftrace_func(ftrace_func_t func)
+int ftrace_update_ftrace_func(ftrace_func_t func)
{
unsigned long ip = (unsigned long)(&ftrace_call);
unsigned char old[MCOUNT_INSN_SIZE], *new;
@@ -98,13 +102,6 @@ notrace int ftrace_update_ftrace_func(ftrace_func_t func)
return ret;
}
-notrace int ftrace_mcount_set(unsigned long *data)
-{
- /* mcount is initialized as a nop */
- *data = 0;
- return 0;
-}
-
int __init ftrace_dyn_arch_init(void *data)
{
extern const unsigned char ftrace_test_p6nop[];
@@ -127,9 +124,6 @@ int __init ftrace_dyn_arch_init(void *data)
* TODO: check the cpuid to determine the best nop.
*/
asm volatile (
- "jmp ftrace_test_jmp\n"
- /* This code needs to stay around */
- ".section .text, \"ax\"\n"
"ftrace_test_jmp:"
"jmp ftrace_test_p6nop\n"
"nop\n"
@@ -140,8 +134,6 @@ int __init ftrace_dyn_arch_init(void *data)
"jmp 1f\n"
"ftrace_test_nop5:"
".byte 0x66,0x66,0x66,0x66,0x90\n"
- "jmp 1f\n"
- ".previous\n"
"1:"
".section .fixup, \"ax\"\n"
"2: movl $1, %0\n"
@@ -156,15 +148,15 @@ int __init ftrace_dyn_arch_init(void *data)
switch (faulted) {
case 0:
pr_info("ftrace: converting mcount calls to 0f 1f 44 00 00\n");
- ftrace_nop = (unsigned long *)ftrace_test_p6nop;
+ memcpy(ftrace_nop, ftrace_test_p6nop, MCOUNT_INSN_SIZE);
break;
case 1:
pr_info("ftrace: converting mcount calls to 66 66 66 66 90\n");
- ftrace_nop = (unsigned long *)ftrace_test_nop5;
+ memcpy(ftrace_nop, ftrace_test_nop5, MCOUNT_INSN_SIZE);
break;
case 2:
pr_info("ftrace: converting mcount calls to jmp . + 5\n");
- ftrace_nop = (unsigned long *)ftrace_test_jmp;
+ memcpy(ftrace_nop, ftrace_test_jmp, MCOUNT_INSN_SIZE);
break;
}
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 680a06557c5e..2c7dbdb98278 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -15,7 +15,6 @@
#include <linux/ctype.h>
#include <linux/init.h>
#include <linux/sched.h>
-#include <linux/bootmem.h>
#include <linux/module.h>
#include <linux/hardirq.h>
#include <asm/smp.h>
@@ -398,16 +397,16 @@ void __init uv_system_init(void)
printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades());
bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
- uv_blade_info = alloc_bootmem_pages(bytes);
+ uv_blade_info = kmalloc(bytes, GFP_KERNEL);
get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes();
- uv_node_to_blade = alloc_bootmem_pages(bytes);
+ uv_node_to_blade = kmalloc(bytes, GFP_KERNEL);
memset(uv_node_to_blade, 255, bytes);
bytes = sizeof(uv_cpu_to_blade[0]) * num_possible_cpus();
- uv_cpu_to_blade = alloc_bootmem_pages(bytes);
+ uv_cpu_to_blade = kmalloc(bytes, GFP_KERNEL);
memset(uv_cpu_to_blade, 255, bytes);
blade = 0;
diff --git a/arch/x86/kernel/i386_ksyms_32.c b/arch/x86/kernel/i386_ksyms_32.c
index dd7ebee446af..43cec6bdda63 100644
--- a/arch/x86/kernel/i386_ksyms_32.c
+++ b/arch/x86/kernel/i386_ksyms_32.c
@@ -5,7 +5,7 @@
#include <asm/desc.h>
#include <asm/ftrace.h>
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
/* mcount is defined in assembly */
EXPORT_SYMBOL(mcount);
#endif
diff --git a/arch/x86/kernel/k8.c b/arch/x86/kernel/k8.c
index 304d8bad6559..cbc4332a77b2 100644
--- a/arch/x86/kernel/k8.c
+++ b/arch/x86/kernel/k8.c
@@ -18,7 +18,6 @@ static u32 *flush_words;
struct pci_device_id k8_nb_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
- { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
{}
};
EXPORT_SYMBOL(k8_nb_ids);
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 0732adba05ca..7a385746509a 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -162,7 +162,10 @@ void machine_kexec(struct kimage *image)
page_list[VA_PTE_0] = (unsigned long)kexec_pte0;
page_list[PA_PTE_1] = __pa(kexec_pte1);
page_list[VA_PTE_1] = (unsigned long)kexec_pte1;
- page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page) << PAGE_SHIFT);
+
+ if (image->type == KEXEC_TYPE_DEFAULT)
+ page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
+ << PAGE_SHIFT);
/* The segment registers are funny things, they have both a
* visible and an invisible part. Whenever the visible part is
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 7a1f8eeac2c7..5f8e5d75a254 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -39,7 +39,7 @@
#include <asm/microcode.h>
MODULE_DESCRIPTION("AMD Microcode Update Driver");
-MODULE_AUTHOR("Peter Oruba <peter.oruba@amd.com>");
+MODULE_AUTHOR("Peter Oruba");
MODULE_LICENSE("GPL v2");
#define UCODE_MAGIC 0x00414d44
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 936d8d55f230..82fb2809ce32 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -480,8 +480,8 @@ static int __init microcode_init(void)
printk(KERN_INFO
"Microcode Update Driver: v" MICROCODE_VERSION
- " <tigran@aivazian.fsnet.co.uk>"
- " <peter.oruba@amd.com>\n");
+ " <tigran@aivazian.fsnet.co.uk>,"
+ " Peter Oruba\n");
return 0;
}
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 1972266e8ba5..192624820217 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -9,6 +9,8 @@
#include <asm/calgary.h>
#include <asm/amd_iommu.h>
+static int forbid_dac __read_mostly;
+
struct dma_mapping_ops *dma_ops;
EXPORT_SYMBOL(dma_ops);
@@ -291,3 +293,17 @@ void pci_iommu_shutdown(void)
}
/* Must execute after PCI subsystem */
fs_initcall(pci_iommu_init);
+
+#ifdef CONFIG_PCI
+/* Many VIA bridges seem to corrupt data for DAC. Disable it here */
+
+static __devinit void via_no_dac(struct pci_dev *dev)
+{
+ if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
+ printk(KERN_INFO "PCI: VIA PCI bridge detected."
+ "Disabling DAC.\n");
+ forbid_dac = 1;
+ }
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
+#endif
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index e3f75bbcedea..a42b02b4df68 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -744,7 +744,7 @@ void __init gart_iommu_init(void)
long i;
if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) {
- printk(KERN_INFO "PCI-GART: No AMD northbridge found.\n");
+ printk(KERN_INFO "PCI-GART: No AMD GART found.\n");
return;
}
diff --git a/arch/x86/kernel/pci-swiotlb_64.c b/arch/x86/kernel/pci-swiotlb_64.c
index c4ce0332759e..3c539d111abb 100644
--- a/arch/x86/kernel/pci-swiotlb_64.c
+++ b/arch/x86/kernel/pci-swiotlb_64.c
@@ -18,9 +18,21 @@ swiotlb_map_single_phys(struct device *hwdev, phys_addr_t paddr, size_t size,
return swiotlb_map_single(hwdev, phys_to_virt(paddr), size, direction);
}
+static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
+ dma_addr_t *dma_handle, gfp_t flags)
+{
+ void *vaddr;
+
+ vaddr = dma_generic_alloc_coherent(hwdev, size, dma_handle, flags);
+ if (vaddr)
+ return vaddr;
+
+ return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags);
+}
+
struct dma_mapping_ops swiotlb_dma_ops = {
.mapping_error = swiotlb_dma_mapping_error,
- .alloc_coherent = swiotlb_alloc_coherent,
+ .alloc_coherent = x86_swiotlb_alloc_coherent,
.free_coherent = swiotlb_free_coherent,
.map_single = swiotlb_map_single_phys,
.unmap_single = swiotlb_unmap_single,
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 161bb850fc47..62348e4fd8d1 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -759,7 +759,7 @@ __cpuinit int unsynchronized_tsc(void)
if (!cpu_has_tsc || tsc_unstable)
return 1;
-#ifdef CONFIG_SMP
+#ifdef CONFIG_X86_SMP
if (apic_is_clustered_box())
return 1;
#endif
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index 7766d36983fc..a688f3bfaec2 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -78,7 +78,7 @@ static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
static void __init set_vsmp_pv_ops(void)
{
- void *address;
+ void __iomem *address;
unsigned int cap, ctl, cfg;
/* set vSMP magic bits to indicate vSMP capable kernel */
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index b545f371b5f5..695e426aa354 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -12,7 +12,7 @@
#include <asm/desc.h>
#include <asm/ftrace.h>
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
/* mcount is defined in assembly */
EXPORT_SYMBOL(mcount);
#endif
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 11c6725fb798..8772dc946823 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -545,6 +545,12 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
if (!pit)
return NULL;
+ mutex_lock(&kvm->lock);
+ pit->irq_source_id = kvm_request_irq_source_id(kvm);
+ mutex_unlock(&kvm->lock);
+ if (pit->irq_source_id < 0)
+ return NULL;
+
mutex_init(&pit->pit_state.lock);
mutex_lock(&pit->pit_state.lock);
spin_lock_init(&pit->pit_state.inject_lock);
@@ -587,6 +593,7 @@ void kvm_free_pit(struct kvm *kvm)
mutex_lock(&kvm->arch.vpit->pit_state.lock);
timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
hrtimer_cancel(timer);
+ kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
mutex_unlock(&kvm->arch.vpit->pit_state.lock);
kfree(kvm->arch.vpit);
}
@@ -595,8 +602,8 @@ void kvm_free_pit(struct kvm *kvm)
static void __inject_pit_timer_intr(struct kvm *kvm)
{
mutex_lock(&kvm->lock);
- kvm_set_irq(kvm, 0, 1);
- kvm_set_irq(kvm, 0, 0);
+ kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
+ kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
mutex_unlock(&kvm->lock);
}
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index e436d4983aa1..4178022b97aa 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -44,6 +44,7 @@ struct kvm_pit {
struct kvm_io_device speaker_dev;
struct kvm *kvm;
struct kvm_kpit_state pit_state;
+ int irq_source_id;
};
#define KVM_PIT_BASE_ADDRESS 0x40
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 99c239c5c0ac..2a5e64881d9b 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2634,6 +2634,7 @@ static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
{
kvm_x86_ops->tlb_flush(vcpu);
+ set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
return 1;
}
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 4f0677d1eae8..f1f8ff2f1fa2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1742,7 +1742,8 @@ long kvm_arch_vm_ioctl(struct file *filp,
goto out;
if (irqchip_in_kernel(kvm)) {
mutex_lock(&kvm->lock);
- kvm_set_irq(kvm, irq_event.irq, irq_event.level);
+ kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
+ irq_event.irq, irq_event.level);
mutex_unlock(&kvm->lock);
r = 0;
}
@@ -4013,6 +4014,9 @@ struct kvm *kvm_arch_create_vm(void)
INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
+ /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
+ set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
+
return kvm;
}
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 48ee4f9435f4..a5d8e1ace1cf 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -367,10 +367,9 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
* lazily after a task switch, and Linux uses that gratefully, but wouldn't a
* name like "FPUTRAP bit" be a little less cryptic?
*
- * We store cr0 (and cr3) locally, because the Host never changes it. The
- * Guest sometimes wants to read it and we'd prefer not to bother the Host
- * unnecessarily. */
-static unsigned long current_cr0, current_cr3;
+ * We store cr0 locally because the Host never changes it. The Guest sometimes
+ * wants to read it and we'd prefer not to bother the Host unnecessarily. */
+static unsigned long current_cr0;
static void lguest_write_cr0(unsigned long val)
{
lazy_hcall(LHCALL_TS, val & X86_CR0_TS, 0, 0);
@@ -399,17 +398,23 @@ static unsigned long lguest_read_cr2(void)
return lguest_data.cr2;
}
+/* See lguest_set_pte() below. */
+static bool cr3_changed = false;
+
/* cr3 is the current toplevel pagetable page: the principle is the same as
- * cr0. Keep a local copy, and tell the Host when it changes. */
+ * cr0. Keep a local copy, and tell the Host when it changes. The only
+ * difference is that our local copy is in lguest_data because the Host needs
+ * to set it upon our initial hypercall. */
static void lguest_write_cr3(unsigned long cr3)
{
+ lguest_data.pgdir = cr3;
lazy_hcall(LHCALL_NEW_PGTABLE, cr3, 0, 0);
- current_cr3 = cr3;
+ cr3_changed = true;
}
static unsigned long lguest_read_cr3(void)
{
- return current_cr3;
+ return lguest_data.pgdir;
}
/* cr4 is used to enable and disable PGE, but we don't care. */
@@ -498,13 +503,13 @@ static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
* to forget all of them. Fortunately, this is very rare.
*
* ... except in early boot when the kernel sets up the initial pagetables,
- * which makes booting astonishingly slow. So we don't even tell the Host
- * anything changed until we've done the first page table switch. */
+ * which makes booting astonishingly slow: 1.83 seconds! So we don't even tell
+ * the Host anything changed until we've done the first page table switch,
+ * which brings boot back to 0.25 seconds. */
static void lguest_set_pte(pte_t *ptep, pte_t pteval)
{
*ptep = pteval;
- /* Don't bother with hypercall before initial setup. */
- if (current_cr3)
+ if (cr3_changed)
lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
}
@@ -521,7 +526,7 @@ static void lguest_set_pte(pte_t *ptep, pte_t pteval)
static void lguest_flush_tlb_single(unsigned long addr)
{
/* Simply set it to zero: if it was not, it will fault back in. */
- lazy_hcall(LHCALL_SET_PTE, current_cr3, addr, 0);
+ lazy_hcall(LHCALL_SET_PTE, lguest_data.pgdir, addr, 0);
}
/* This is what happens after the Guest has removed a large number of entries.
@@ -581,6 +586,9 @@ static void __init lguest_init_IRQ(void)
for (i = 0; i < LGUEST_IRQS; i++) {
int vector = FIRST_EXTERNAL_VECTOR + i;
+ /* Some systems map "vectors" to interrupts weirdly. Lguest has
+ * a straightforward 1 to 1 mapping, so force that here. */
+ __get_cpu_var(vector_irq)[vector] = i;
if (vector != SYSCALL_VECTOR) {
set_intr_gate(vector, interrupt[vector]);
set_irq_chip_and_handler_name(i, &lguest_irq_controller,
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 0f6e8a6523ae..7f4c6af14351 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -90,6 +90,7 @@ static void ack_vic_irq(unsigned int irq);
static void vic_enable_cpi(void);
static void do_boot_cpu(__u8 cpuid);
static void do_quad_bootstrap(void);
+static void initialize_secondary(void);
int hard_smp_processor_id(void);
int safe_smp_processor_id(void);
@@ -344,6 +345,12 @@ static void do_quad_bootstrap(void)
}
}
+void prefill_possible_map(void)
+{
+ /* This is empty on voyager because we need a much
+ * earlier detection which is done in find_smp_config */
+}
+
/* Set up all the basic stuff: read the SMP config and make all the
* SMP information reflect only the boot cpu. All others will be
* brought on-line later. */
@@ -413,6 +420,7 @@ void __init smp_store_cpu_info(int id)
struct cpuinfo_x86 *c = &cpu_data(id);
*c = boot_cpu_data;
+ c->cpu_index = id;
identify_secondary_cpu(c);
}
@@ -650,6 +658,8 @@ void __init smp_boot_cpus(void)
smp_tune_scheduling();
*/
smp_store_cpu_info(boot_cpu_id);
+ /* setup the jump vector */
+ initial_code = (unsigned long)initialize_secondary;
printk("CPU%d: ", boot_cpu_id);
print_cpu_info(&cpu_data(boot_cpu_id));
@@ -702,7 +712,7 @@ void __init smp_boot_cpus(void)
/* Reload the secondary CPUs task structure (this function does not
* return ) */
-void __init initialize_secondary(void)
+static void __init initialize_secondary(void)
{
#if 0
// AC kernels only
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index 4ba373c5b8c8..be54176e9eb2 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -233,7 +233,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
len = (unsigned long) nr_pages << PAGE_SHIFT;
end = start + len;
if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
- start, len)))
+ (void __user *)start, len)))
goto slow_irqon;
/*
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index b8e461d49412..9db01db6e3cd 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -350,8 +350,10 @@ phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
* pagetable pages as RO. So assume someone who pre-setup
* these mappings are more intelligent.
*/
- if (pte_val(*pte))
+ if (pte_val(*pte)) {
+ pages++;
continue;
+ }
if (0)
printk(" pte=%p addr=%lx pte=%016lx\n",
@@ -418,8 +420,10 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
* not differ with respect to page frame and
* attributes.
*/
- if (page_size_mask & (1 << PG_LEVEL_2M))
+ if (page_size_mask & (1 << PG_LEVEL_2M)) {
+ pages++;
continue;
+ }
new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
}
@@ -499,8 +503,10 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
* not differ with respect to page frame and
* attributes.
*/
- if (page_size_mask & (1 << PG_LEVEL_1G))
+ if (page_size_mask & (1 << PG_LEVEL_1G)) {
+ pages++;
continue;
+ }
prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
}
@@ -665,12 +671,13 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
unsigned long last_map_addr = 0;
unsigned long page_size_mask = 0;
unsigned long start_pfn, end_pfn;
+ unsigned long pos;
struct map_range mr[NR_RANGE_MR];
int nr_range, i;
int use_pse, use_gbpages;
- printk(KERN_INFO "init_memory_mapping\n");
+ printk(KERN_INFO "init_memory_mapping: %016lx-%016lx\n", start, end);
/*
* Find space for the kernel direct mapping tables.
@@ -704,35 +711,50 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
/* head if not big page alignment ?*/
start_pfn = start >> PAGE_SHIFT;
- end_pfn = ((start + (PMD_SIZE - 1)) >> PMD_SHIFT)
+ pos = start_pfn << PAGE_SHIFT;
+ end_pfn = ((pos + (PMD_SIZE - 1)) >> PMD_SHIFT)
<< (PMD_SHIFT - PAGE_SHIFT);
- nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
+ if (start_pfn < end_pfn) {
+ nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
+ pos = end_pfn << PAGE_SHIFT;
+ }
/* big page (2M) range*/
- start_pfn = ((start + (PMD_SIZE - 1))>>PMD_SHIFT)
+ start_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
<< (PMD_SHIFT - PAGE_SHIFT);
- end_pfn = ((start + (PUD_SIZE - 1))>>PUD_SHIFT)
+ end_pfn = ((pos + (PUD_SIZE - 1))>>PUD_SHIFT)
<< (PUD_SHIFT - PAGE_SHIFT);
- if (end_pfn > ((end>>PUD_SHIFT)<<(PUD_SHIFT - PAGE_SHIFT)))
- end_pfn = ((end>>PUD_SHIFT)<<(PUD_SHIFT - PAGE_SHIFT));
- nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
- page_size_mask & (1<<PG_LEVEL_2M));
+ if (end_pfn > ((end>>PMD_SHIFT)<<(PMD_SHIFT - PAGE_SHIFT)))
+ end_pfn = ((end>>PMD_SHIFT)<<(PMD_SHIFT - PAGE_SHIFT));
+ if (start_pfn < end_pfn) {
+ nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
+ page_size_mask & (1<<PG_LEVEL_2M));
+ pos = end_pfn << PAGE_SHIFT;
+ }
/* big page (1G) range */
- start_pfn = end_pfn;
- end_pfn = (end>>PUD_SHIFT) << (PUD_SHIFT - PAGE_SHIFT);
- nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
+ start_pfn = ((pos + (PUD_SIZE - 1))>>PUD_SHIFT)
+ << (PUD_SHIFT - PAGE_SHIFT);
+ end_pfn = (end >> PUD_SHIFT) << (PUD_SHIFT - PAGE_SHIFT);
+ if (start_pfn < end_pfn) {
+ nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
page_size_mask &
((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
+ pos = end_pfn << PAGE_SHIFT;
+ }
/* tail is not big page (1G) alignment */
- start_pfn = end_pfn;
- end_pfn = (end>>PMD_SHIFT) << (PMD_SHIFT - PAGE_SHIFT);
- nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
- page_size_mask & (1<<PG_LEVEL_2M));
+ start_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
+ << (PMD_SHIFT - PAGE_SHIFT);
+ end_pfn = (end >> PMD_SHIFT) << (PMD_SHIFT - PAGE_SHIFT);
+ if (start_pfn < end_pfn) {
+ nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
+ page_size_mask & (1<<PG_LEVEL_2M));
+ pos = end_pfn << PAGE_SHIFT;
+ }
/* tail is not big page (2M) alignment */
- start_pfn = end_pfn;
+ start_pfn = pos>>PAGE_SHIFT;
end_pfn = end>>PAGE_SHIFT;
nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
@@ -831,12 +853,12 @@ int arch_add_memory(int nid, u64 start, u64 size)
unsigned long nr_pages = size >> PAGE_SHIFT;
int ret;
- last_mapped_pfn = init_memory_mapping(start, start + size-1);
+ last_mapped_pfn = init_memory_mapping(start, start + size);
if (last_mapped_pfn > max_pfn_mapped)
max_pfn_mapped = last_mapped_pfn;
ret = __add_pages(zone, start_pfn, nr_pages);
- WARN_ON(1);
+ WARN_ON_ONCE(ret);
return ret;
}
@@ -878,6 +900,7 @@ static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel,
void __init mem_init(void)
{
long codesize, reservedpages, datasize, initsize;
+ unsigned long absent_pages;
start_periodic_check_for_corruption();
@@ -893,8 +916,9 @@ void __init mem_init(void)
#else
totalram_pages = free_all_bootmem();
#endif
- reservedpages = max_pfn - totalram_pages -
- absent_pages_in_range(0, max_pfn);
+
+ absent_pages = absent_pages_in_range(0, max_pfn);
+ reservedpages = max_pfn - totalram_pages - absent_pages;
after_bootmem = 1;
codesize = (unsigned long) &_etext - (unsigned long) &_text;
@@ -911,10 +935,11 @@ void __init mem_init(void)
VSYSCALL_END - VSYSCALL_START);
printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
- "%ldk reserved, %ldk data, %ldk init)\n",
+ "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
(unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
max_pfn << (PAGE_SHIFT-10),
codesize >> 10,
+ absent_pages << (PAGE_SHIFT-10),
reservedpages << (PAGE_SHIFT-10),
datasize >> 10,
initsize >> 10);
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index ae71e11eb3e5..d4c4307ff3e0 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -387,7 +387,7 @@ static void __iomem *ioremap_default(resource_size_t phys_addr,
unsigned long size)
{
unsigned long flags;
- void *ret;
+ void __iomem *ret;
int err;
/*
@@ -399,11 +399,11 @@ static void __iomem *ioremap_default(resource_size_t phys_addr,
if (err < 0)
return NULL;
- ret = (void *) __ioremap_caller(phys_addr, size, flags,
- __builtin_return_address(0));
+ ret = __ioremap_caller(phys_addr, size, flags,
+ __builtin_return_address(0));
free_memtype(phys_addr, phys_addr + size);
- return (void __iomem *)ret;
+ return ret;
}
void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size,
@@ -622,7 +622,7 @@ static inline void __init early_clear_fixmap(enum fixed_addresses idx)
__early_set_fixmap(idx, 0, __pgprot(0));
}
-static void *prev_map[FIX_BTMAPS_SLOTS] __initdata;
+static void __iomem *prev_map[FIX_BTMAPS_SLOTS] __initdata;
static unsigned long prev_size[FIX_BTMAPS_SLOTS] __initdata;
static int __init check_early_ioremap_leak(void)
{
@@ -645,7 +645,7 @@ static int __init check_early_ioremap_leak(void)
}
late_initcall(check_early_ioremap_leak);
-static void __init *__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
+static void __init __iomem *__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
{
unsigned long offset, last_addr;
unsigned int nrpages;
@@ -713,23 +713,23 @@ static void __init *__early_ioremap(unsigned long phys_addr, unsigned long size,
if (early_ioremap_debug)
printk(KERN_CONT "%08lx + %08lx\n", offset, fix_to_virt(idx0));
- prev_map[slot] = (void *) (offset + fix_to_virt(idx0));
+ prev_map[slot] = (void __iomem *)(offset + fix_to_virt(idx0));
return prev_map[slot];
}
/* Remap an IO device */
-void __init *early_ioremap(unsigned long phys_addr, unsigned long size)
+void __init __iomem *early_ioremap(unsigned long phys_addr, unsigned long size)
{
return __early_ioremap(phys_addr, size, PAGE_KERNEL_IO);
}
/* Remap memory */
-void __init *early_memremap(unsigned long phys_addr, unsigned long size)
+void __init __iomem *early_memremap(unsigned long phys_addr, unsigned long size)
{
return __early_ioremap(phys_addr, size, PAGE_KERNEL);
}
-void __init early_iounmap(void *addr, unsigned long size)
+void __init early_iounmap(void __iomem *addr, unsigned long size)
{
unsigned long virt_addr;
unsigned long offset;
@@ -779,7 +779,7 @@ void __init early_iounmap(void *addr, unsigned long size)
--idx;
--nrpages;
}
- prev_map[slot] = 0;
+ prev_map[slot] = NULL;
}
void __this_fixmap_does_not_exist(void)
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 738fd0f24958..eb1bf000d12e 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -481,12 +481,16 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)
return 1;
}
#else
+/* This check is needed to avoid cache aliasing when PAT is enabled */
static inline int range_is_allowed(unsigned long pfn, unsigned long size)
{
u64 from = ((u64)pfn) << PAGE_SHIFT;
u64 to = from + size;
u64 cursor = from;
+ if (!pat_enabled)
+ return 1;
+
while (cursor < to) {
if (!devmem_is_allowed(pfn)) {
printk(KERN_INFO
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile
index 313947940a1a..6dcefba7836f 100644
--- a/arch/x86/xen/Makefile
+++ b/arch/x86/xen/Makefile
@@ -1,4 +1,4 @@
-ifdef CONFIG_FTRACE
+ifdef CONFIG_FUNCTION_TRACER
# Do not profile debug and lowlevel utilities
CFLAGS_REMOVE_spinlock.o = -pg
CFLAGS_REMOVE_time.o = -pg
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index d4d52f5a1cf7..aba77b2b7d18 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -246,11 +246,21 @@ xmaddr_t arbitrary_virt_to_machine(void *vaddr)
{
unsigned long address = (unsigned long)vaddr;
unsigned int level;
- pte_t *pte = lookup_address(address, &level);
- unsigned offset = address & ~PAGE_MASK;
+ pte_t *pte;
+ unsigned offset;
- BUG_ON(pte == NULL);
+ /*
+ * if the PFN is in the linear mapped vaddr range, we can just use
+ * the (quick) virt_to_machine() p2m lookup
+ */
+ if (virt_addr_valid(vaddr))
+ return virt_to_machine(vaddr);
+ /* otherwise we have to do a (slower) full page-table walk */
+
+ pte = lookup_address(address, &level);
+ BUG_ON(pte == NULL);
+ offset = address & ~PAGE_MASK;
return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
}
@@ -410,7 +420,7 @@ void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
xen_mc_batch();
- u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
+ u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
u.val = pte_val_ma(pte);
xen_extend_mmu_update(&u);