diff options
Diffstat (limited to 'drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_sync_mngr_glbl_regs.h')
| -rw-r--r-- | drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_sync_mngr_glbl_regs.h | 1203 |
1 files changed, 1203 insertions, 0 deletions
diff --git a/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_sync_mngr_glbl_regs.h b/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_sync_mngr_glbl_regs.h new file mode 100644 index 000000000000..c3c4991e6660 --- /dev/null +++ b/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_sync_mngr_glbl_regs.h @@ -0,0 +1,1203 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright 2016-2020 HabanaLabs, Ltd. + * All Rights Reserved. + * + */ + +/************************************ + ** This is an auto-generated file ** + ** DO NOT EDIT BELOW ** + ************************************/ + +#ifndef ASIC_REG_DCORE0_SYNC_MNGR_GLBL_REGS_H_ +#define ASIC_REG_DCORE0_SYNC_MNGR_GLBL_REGS_H_ + +/* + ***************************************** + * DCORE0_SYNC_MNGR_GLBL + * (Prototype: SOB_GLBL) + ***************************************** + */ + +#define mmDCORE0_SYNC_MNGR_GLBL_SM_SEI_MASK 0x411E000 + +#define mmDCORE0_SYNC_MNGR_GLBL_SM_SEI_CAUSE 0x411E004 + +#define mmDCORE0_SYNC_MNGR_GLBL_L2H_CPMR_L 0x411E008 + +#define mmDCORE0_SYNC_MNGR_GLBL_L2H_CPMR_H 0x411E00C + +#define mmDCORE0_SYNC_MNGR_GLBL_L2H_MASK_L 0x411E020 + +#define mmDCORE0_SYNC_MNGR_GLBL_L2H_MASK_H 0x411E024 + +#define mmDCORE0_SYNC_MNGR_GLBL_ASID_SEC 0x411E030 + +#define mmDCORE0_SYNC_MNGR_GLBL_ASID_PRIV_ONLY 0x411E034 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DELAY 0x411E038 + +#define mmDCORE0_SYNC_MNGR_GLBL_PI_SIZE 0x411E03C + +#define mmDCORE0_SYNC_MNGR_GLBL_SOB_ONLY 0x411E040 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INTR 0x411E044 + +#define mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV 0x411E048 + +#define mmDCORE0_SYNC_MNGR_GLBL_PI_INC_MODE_SIZE 0x411E04C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_0 0x411E050 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_1 0x411E054 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_2 0x411E058 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_3 0x411E05C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_4 0x411E060 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_5 0x411E064 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_6 0x411E068 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_7 0x411E06C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_8 0x411E070 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_9 0x411E074 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_10 0x411E078 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_11 0x411E07C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_12 0x411E080 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_13 0x411E084 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_14 0x411E088 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_15 0x411E08C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_16 0x411E090 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_17 0x411E094 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_18 0x411E098 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_19 0x411E09C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_20 0x411E0A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_21 0x411E0A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_22 0x411E0A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_23 0x411E0AC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_24 0x411E0B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_25 0x411E0B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_26 0x411E0B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_27 0x411E0BC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_28 0x411E0C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_29 0x411E0C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_30 0x411E0C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_31 0x411E0CC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_32 0x411E0D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_33 0x411E0D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_34 0x411E0D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_35 0x411E0DC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_36 0x411E0E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_37 0x411E0E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_38 0x411E0E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_39 0x411E0EC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_40 0x411E0F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_41 0x411E0F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_42 0x411E0F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_43 0x411E0FC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_44 0x411E100 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_45 0x411E104 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_46 0x411E108 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_47 0x411E10C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_48 0x411E110 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_49 0x411E114 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_50 0x411E118 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_51 0x411E11C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_52 0x411E120 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_53 0x411E124 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_54 0x411E128 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_55 0x411E12C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_56 0x411E130 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_57 0x411E134 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_58 0x411E138 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_59 0x411E13C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_60 0x411E140 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_61 0x411E144 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_62 0x411E148 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_63 0x411E14C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_0 0x411E150 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_1 0x411E154 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_2 0x411E158 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_3 0x411E15C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_4 0x411E160 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_5 0x411E164 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_6 0x411E168 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_7 0x411E16C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_8 0x411E170 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_9 0x411E174 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_10 0x411E178 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_11 0x411E17C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_12 0x411E180 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_13 0x411E184 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_14 0x411E188 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_15 0x411E18C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_16 0x411E190 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_17 0x411E194 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_18 0x411E198 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_19 0x411E19C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_20 0x411E1A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_21 0x411E1A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_22 0x411E1A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_23 0x411E1AC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_24 0x411E1B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_25 0x411E1B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_26 0x411E1B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_27 0x411E1BC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_28 0x411E1C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_29 0x411E1C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_30 0x411E1C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_31 0x411E1CC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_32 0x411E1D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_33 0x411E1D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_34 0x411E1D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_35 0x411E1DC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_36 0x411E1E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_37 0x411E1E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_38 0x411E1E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_39 0x411E1EC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_40 0x411E1F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_41 0x411E1F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_42 0x411E1F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_43 0x411E1FC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_44 0x411E200 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_45 0x411E204 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_46 0x411E208 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_47 0x411E20C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_48 0x411E210 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_49 0x411E214 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_50 0x411E218 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_51 0x411E21C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_52 0x411E220 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_53 0x411E224 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_54 0x411E228 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_55 0x411E22C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_56 0x411E230 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_57 0x411E234 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_58 0x411E238 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_59 0x411E23C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_60 0x411E240 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_61 0x411E244 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_62 0x411E248 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_63 0x411E24C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_0 0x411E250 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_1 0x411E254 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_2 0x411E258 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_3 0x411E25C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_4 0x411E260 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_5 0x411E264 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_6 0x411E268 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_7 0x411E26C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_8 0x411E270 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_9 0x411E274 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_10 0x411E278 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_11 0x411E27C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_12 0x411E280 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_13 0x411E284 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_14 0x411E288 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_15 0x411E28C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_16 0x411E290 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_17 0x411E294 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_18 0x411E298 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_19 0x411E29C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_20 0x411E2A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_21 0x411E2A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_22 0x411E2A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_23 0x411E2AC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_24 0x411E2B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_25 0x411E2B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_26 0x411E2B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_27 0x411E2BC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_28 0x411E2C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_29 0x411E2C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_30 0x411E2C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_31 0x411E2CC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_32 0x411E2D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_33 0x411E2D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_34 0x411E2D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_35 0x411E2DC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_36 0x411E2E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_37 0x411E2E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_38 0x411E2E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_39 0x411E2EC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_40 0x411E2F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_41 0x411E2F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_42 0x411E2F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_43 0x411E2FC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_44 0x411E300 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_45 0x411E304 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_46 0x411E308 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_47 0x411E30C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_48 0x411E310 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_49 0x411E314 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_50 0x411E318 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_51 0x411E31C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_52 0x411E320 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_53 0x411E324 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_54 0x411E328 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_55 0x411E32C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_56 0x411E330 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_57 0x411E334 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_58 0x411E338 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_59 0x411E33C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_60 0x411E340 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_61 0x411E344 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_62 0x411E348 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_63 0x411E34C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_0 0x411E350 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_1 0x411E354 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_2 0x411E358 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_3 0x411E35C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_4 0x411E360 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_5 0x411E364 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_6 0x411E368 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_7 0x411E36C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_8 0x411E370 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_9 0x411E374 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_10 0x411E378 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_11 0x411E37C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_12 0x411E380 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_13 0x411E384 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_14 0x411E388 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_15 0x411E38C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_16 0x411E390 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_17 0x411E394 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_18 0x411E398 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_19 0x411E39C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_20 0x411E3A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_21 0x411E3A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_22 0x411E3A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_23 0x411E3AC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_24 0x411E3B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_25 0x411E3B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_26 0x411E3B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_27 0x411E3BC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_28 0x411E3C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_29 0x411E3C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_30 0x411E3C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_31 0x411E3CC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_32 0x411E3D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_33 0x411E3D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_34 0x411E3D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_35 0x411E3DC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_36 0x411E3E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_37 0x411E3E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_38 0x411E3E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_39 0x411E3EC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_40 0x411E3F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_41 0x411E3F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_42 0x411E3F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_43 0x411E3FC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_44 0x411E400 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_45 0x411E404 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_46 0x411E408 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_47 0x411E40C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_48 0x411E410 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_49 0x411E414 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_50 0x411E418 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_51 0x411E41C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_52 0x411E420 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_53 0x411E424 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_54 0x411E428 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_55 0x411E42C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_56 0x411E430 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_57 0x411E434 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_58 0x411E438 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_59 0x411E43C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_60 0x411E440 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_61 0x411E444 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_62 0x411E448 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_PI_63 0x411E44C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_0 0x411E450 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_1 0x411E454 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_2 0x411E458 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_3 0x411E45C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_4 0x411E460 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_5 0x411E464 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_6 0x411E468 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_7 0x411E46C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_8 0x411E470 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_9 0x411E474 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_10 0x411E478 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_11 0x411E47C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_12 0x411E480 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_13 0x411E484 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_14 0x411E488 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_15 0x411E48C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_16 0x411E490 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_17 0x411E494 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_18 0x411E498 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_19 0x411E49C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_20 0x411E4A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_21 0x411E4A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_22 0x411E4A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_23 0x411E4AC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_24 0x411E4B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_25 0x411E4B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_26 0x411E4B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_27 0x411E4BC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_28 0x411E4C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_29 0x411E4C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_30 0x411E4C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_31 0x411E4CC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_32 0x411E4D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_33 0x411E4D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_34 0x411E4D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_35 0x411E4DC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_36 0x411E4E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_37 0x411E4E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_38 0x411E4E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_39 0x411E4EC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_40 0x411E4F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_41 0x411E4F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_42 0x411E4F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_43 0x411E4FC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_44 0x411E500 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_45 0x411E504 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_46 0x411E508 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_47 0x411E50C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_48 0x411E510 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_49 0x411E514 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_50 0x411E518 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_51 0x411E51C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_52 0x411E520 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_53 0x411E524 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_54 0x411E528 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_55 0x411E52C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_56 0x411E530 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_57 0x411E534 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_58 0x411E538 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_59 0x411E53C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_60 0x411E540 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_61 0x411E544 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_62 0x411E548 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_SEC_63 0x411E54C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0 0x411E550 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_1 0x411E554 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_2 0x411E558 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_3 0x411E55C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_4 0x411E560 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_5 0x411E564 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_6 0x411E568 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_7 0x411E56C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_8 0x411E570 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_9 0x411E574 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_10 0x411E578 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_11 0x411E57C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_12 0x411E580 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_13 0x411E584 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_14 0x411E588 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_15 0x411E58C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_16 0x411E590 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_17 0x411E594 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_18 0x411E598 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_19 0x411E59C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_20 0x411E5A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_21 0x411E5A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_22 0x411E5A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_23 0x411E5AC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_24 0x411E5B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_25 0x411E5B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_26 0x411E5B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_27 0x411E5BC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_28 0x411E5C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_29 0x411E5C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_30 0x411E5C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_31 0x411E5CC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_32 0x411E5D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_33 0x411E5D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_34 0x411E5D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_35 0x411E5DC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_36 0x411E5E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_37 0x411E5E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_38 0x411E5E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_39 0x411E5EC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_40 0x411E5F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_41 0x411E5F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_42 0x411E5F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_43 0x411E5FC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_44 0x411E600 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_45 0x411E604 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_46 0x411E608 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_47 0x411E60C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_48 0x411E610 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_49 0x411E614 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_50 0x411E618 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_51 0x411E61C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_52 0x411E620 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_53 0x411E624 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_54 0x411E628 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_55 0x411E62C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_56 0x411E630 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_57 0x411E634 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_58 0x411E638 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_59 0x411E63C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_60 0x411E640 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_61 0x411E644 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_62 0x411E648 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_63 0x411E64C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0 0x411E650 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_1 0x411E654 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_2 0x411E658 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_3 0x411E65C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_4 0x411E660 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_5 0x411E664 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_6 0x411E668 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_7 0x411E66C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_8 0x411E670 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_9 0x411E674 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_10 0x411E678 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_11 0x411E67C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_12 0x411E680 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_13 0x411E684 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_14 0x411E688 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_15 0x411E68C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_16 0x411E690 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_17 0x411E694 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_18 0x411E698 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_19 0x411E69C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_20 0x411E6A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_21 0x411E6A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_22 0x411E6A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_23 0x411E6AC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_24 0x411E6B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_25 0x411E6B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_26 0x411E6B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_27 0x411E6BC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_28 0x411E6C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_29 0x411E6C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_30 0x411E6C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_31 0x411E6CC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_32 0x411E6D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_33 0x411E6D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_34 0x411E6D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_35 0x411E6DC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_36 0x411E6E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_37 0x411E6E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_38 0x411E6E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_39 0x411E6EC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_40 0x411E6F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_41 0x411E6F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_42 0x411E6F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_43 0x411E6FC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_44 0x411E700 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_45 0x411E704 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_46 0x411E708 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_47 0x411E70C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_48 0x411E710 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_49 0x411E714 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_50 0x411E718 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_51 0x411E71C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_52 0x411E720 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_53 0x411E724 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_54 0x411E728 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_55 0x411E72C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_56 0x411E730 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_57 0x411E734 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_58 0x411E738 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_59 0x411E73C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_60 0x411E740 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_61 0x411E744 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_62 0x411E748 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_63 0x411E74C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0 0x411E750 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_1 0x411E754 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_2 0x411E758 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_3 0x411E75C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_4 0x411E760 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_5 0x411E764 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_6 0x411E768 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_7 0x411E76C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_8 0x411E770 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_9 0x411E774 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_10 0x411E778 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_11 0x411E77C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_12 0x411E780 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_13 0x411E784 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_14 0x411E788 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_15 0x411E78C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_16 0x411E790 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_17 0x411E794 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_18 0x411E798 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_19 0x411E79C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_20 0x411E7A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_21 0x411E7A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_22 0x411E7A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_23 0x411E7AC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_24 0x411E7B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_25 0x411E7B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_26 0x411E7B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_27 0x411E7BC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_28 0x411E7C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_29 0x411E7C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_30 0x411E7C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_31 0x411E7CC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_32 0x411E7D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_33 0x411E7D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_34 0x411E7D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_35 0x411E7DC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_36 0x411E7E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_37 0x411E7E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_38 0x411E7E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_39 0x411E7EC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_40 0x411E7F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_41 0x411E7F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_42 0x411E7F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_43 0x411E7FC + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_44 0x411E800 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_45 0x411E804 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_46 0x411E808 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_47 0x411E80C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_48 0x411E810 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_49 0x411E814 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_50 0x411E818 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_51 0x411E81C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_52 0x411E820 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_53 0x411E824 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_54 0x411E828 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_55 0x411E82C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_56 0x411E830 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_57 0x411E834 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_58 0x411E838 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_59 0x411E83C + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_60 0x411E840 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_61 0x411E844 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_62 0x411E848 + +#define mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_63 0x411E84C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_0 0x411E850 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_1 0x411E854 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_2 0x411E858 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_3 0x411E85C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_4 0x411E860 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_5 0x411E864 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_6 0x411E868 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_7 0x411E86C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_8 0x411E870 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_9 0x411E874 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_10 0x411E878 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_11 0x411E87C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_12 0x411E880 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_13 0x411E884 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_14 0x411E888 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_15 0x411E88C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_16 0x411E890 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_17 0x411E894 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_18 0x411E898 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_19 0x411E89C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_20 0x411E8A0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_21 0x411E8A4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_22 0x411E8A8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_23 0x411E8AC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_24 0x411E8B0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_25 0x411E8B4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_26 0x411E8B8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_27 0x411E8BC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_28 0x411E8C0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_29 0x411E8C4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_30 0x411E8C8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_31 0x411E8CC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_32 0x411E8D0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_33 0x411E8D4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_34 0x411E8D8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_35 0x411E8DC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_36 0x411E8E0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_37 0x411E8E4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_38 0x411E8E8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_39 0x411E8EC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_40 0x411E8F0 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_41 0x411E8F4 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_42 0x411E8F8 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_43 0x411E8FC + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_44 0x411E900 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_45 0x411E904 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_46 0x411E908 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_47 0x411E90C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_48 0x411E910 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_49 0x411E914 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_50 0x411E918 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_51 0x411E91C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_52 0x411E920 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_53 0x411E924 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_54 0x411E928 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_55 0x411E92C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_56 0x411E930 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_57 0x411E934 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_58 0x411E938 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_59 0x411E93C + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_60 0x411E940 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_61 0x411E944 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_62 0x411E948 + +#define mmDCORE0_SYNC_MNGR_GLBL_CQ_INC_MODE_63 0x411E94C + +#endif /* ASIC_REG_DCORE0_SYNC_MNGR_GLBL_REGS_H_ */ |