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path: root/drivers/accel/habanalabs/include/gaudi2/asic_reg/rot0_desc_regs.h
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Diffstat (limited to 'drivers/accel/habanalabs/include/gaudi2/asic_reg/rot0_desc_regs.h')
-rw-r--r--drivers/accel/habanalabs/include/gaudi2/asic_reg/rot0_desc_regs.h155
1 files changed, 155 insertions, 0 deletions
diff --git a/drivers/accel/habanalabs/include/gaudi2/asic_reg/rot0_desc_regs.h b/drivers/accel/habanalabs/include/gaudi2/asic_reg/rot0_desc_regs.h
new file mode 100644
index 000000000000..79320320ebcb
--- /dev/null
+++ b/drivers/accel/habanalabs/include/gaudi2/asic_reg/rot0_desc_regs.h
@@ -0,0 +1,155 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2020 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+/************************************
+ ** This is an auto-generated file **
+ ** DO NOT EDIT BELOW **
+ ************************************/
+
+#ifndef ASIC_REG_ROT0_DESC_REGS_H_
+#define ASIC_REG_ROT0_DESC_REGS_H_
+
+/*
+ *****************************************
+ * ROT0_DESC
+ * (Prototype: ROT_DESC)
+ *****************************************
+ */
+
+#define mmROT0_DESC_CONTEXT_ID 0x4E0B100
+
+#define mmROT0_DESC_IN_IMG_START_ADDR_L 0x4E0B104
+
+#define mmROT0_DESC_IN_IMG_START_ADDR_H 0x4E0B108
+
+#define mmROT0_DESC_OUT_IMG_START_ADDR_L 0x4E0B10C
+
+#define mmROT0_DESC_OUT_IMG_START_ADDR_H 0x4E0B110
+
+#define mmROT0_DESC_CFG 0x4E0B114
+
+#define mmROT0_DESC_IM_READ_SLOPE 0x4E0B118
+
+#define mmROT0_DESC_SIN_D 0x4E0B11C
+
+#define mmROT0_DESC_COS_D 0x4E0B120
+
+#define mmROT0_DESC_IN_IMG 0x4E0B124
+
+#define mmROT0_DESC_IN_STRIDE 0x4E0B128
+
+#define mmROT0_DESC_IN_STRIPE 0x4E0B12C
+
+#define mmROT0_DESC_IN_CENTER 0x4E0B130
+
+#define mmROT0_DESC_OUT_IMG 0x4E0B134
+
+#define mmROT0_DESC_OUT_STRIDE 0x4E0B138
+
+#define mmROT0_DESC_OUT_STRIPE 0x4E0B13C
+
+#define mmROT0_DESC_OUT_CENTER 0x4E0B140
+
+#define mmROT0_DESC_BACKGROUND 0x4E0B144
+
+#define mmROT0_DESC_CPL_MSG_EN 0x4E0B148
+
+#define mmROT0_DESC_IDLE_STATE 0x4E0B14C
+
+#define mmROT0_DESC_CPL_MSG_ADDR 0x4E0B150
+
+#define mmROT0_DESC_CPL_MSG_DATA 0x4E0B154
+
+#define mmROT0_DESC_CPL_MSG_AWUSER 0x4E0B158
+
+#define mmROT0_DESC_X_I_START_OFFSET 0x4E0B15C
+
+#define mmROT0_DESC_X_I_START_OFFSET_FLIP 0x4E0B160
+
+#define mmROT0_DESC_X_I_FIRST 0x4E0B164
+
+#define mmROT0_DESC_Y_I_FIRST 0x4E0B168
+
+#define mmROT0_DESC_Y_I 0x4E0B16C
+
+#define mmROT0_DESC_OUT_STRIPE_SIZE 0x4E0B170
+
+#define mmROT0_DESC_RSB_CFG_0 0x4E0B174
+
+#define mmROT0_DESC_RSB_PAD_VAL 0x4E0B178
+
+#define mmROT0_DESC_HBW_ARUSER_HI 0x4E0B17C
+
+#define mmROT0_DESC_HBW_ARUSER_LO 0x4E0B180
+
+#define mmROT0_DESC_HBW_AWUSER_HI 0x4E0B184
+
+#define mmROT0_DESC_HBW_AWUSER_LO 0x4E0B188
+
+#define mmROT0_DESC_OWM_CFG 0x4E0B18C
+
+#define mmROT0_DESC_CTRL_CFG 0x4E0B190
+
+#define mmROT0_DESC_PIXEL_PAD 0x4E0B194
+
+#define mmROT0_DESC_PREC_SHIFT 0x4E0B198
+
+#define mmROT0_DESC_MAX_VAL 0x4E0B19C
+
+#define mmROT0_DESC_A0_M11 0x4E0B1A0
+
+#define mmROT0_DESC_A1_M12 0x4E0B1A4
+
+#define mmROT0_DESC_A2 0x4E0B1A8
+
+#define mmROT0_DESC_B0_M21 0x4E0B1AC
+
+#define mmROT0_DESC_B1_M22 0x4E0B1B0
+
+#define mmROT0_DESC_B2 0x4E0B1B4
+
+#define mmROT0_DESC_C0 0x4E0B1B8
+
+#define mmROT0_DESC_C1 0x4E0B1BC
+
+#define mmROT0_DESC_C2 0x4E0B1C0
+
+#define mmROT0_DESC_D0 0x4E0B1C4
+
+#define mmROT0_DESC_D1 0x4E0B1C8
+
+#define mmROT0_DESC_D2 0x4E0B1CC
+
+#define mmROT0_DESC_INV_PROC_SIZE_M_1 0x4E0B1D0
+
+#define mmROT0_DESC_MESH_IMG_START_ADDR_L 0x4E0B1D4
+
+#define mmROT0_DESC_MESH_IMG_START_ADDR_H 0x4E0B1D8
+
+#define mmROT0_DESC_MESH_IMG 0x4E0B1DC
+
+#define mmROT0_DESC_MESH_STRIDE 0x4E0B1E0
+
+#define mmROT0_DESC_MESH_STRIPE 0x4E0B1E4
+
+#define mmROT0_DESC_MESH_CTRL 0x4E0B1E8
+
+#define mmROT0_DESC_MESH_GH 0x4E0B1EC
+
+#define mmROT0_DESC_MESH_GV 0x4E0B1F0
+
+#define mmROT0_DESC_MRSB_CFG_0 0x4E0B1F4
+
+#define mmROT0_DESC_MRSB_PAD_VAL 0x4E0B1F8
+
+#define mmROT0_DESC_BUF_CFG 0x4E0B1FC
+
+#define mmROT0_DESC_CID_OFFSET 0x4E0B200
+
+#define mmROT0_DESC_PUSH_DESC 0x4E0B204
+
+#endif /* ASIC_REG_ROT0_DESC_REGS_H_ */