diff options
Diffstat (limited to 'drivers/clk/mediatek/clk-mt8192.c')
| -rw-r--r-- | drivers/clk/mediatek/clk-mt8192.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/clk/mediatek/clk-mt8192.c b/drivers/clk/mediatek/clk-mt8192.c index aa11291463f7..462ec4465b50 100644 --- a/drivers/clk/mediatek/clk-mt8192.c +++ b/drivers/clk/mediatek/clk-mt8192.c @@ -549,15 +549,15 @@ static const struct mtk_mux top_mtk_muxes[] = { /* CLK_CFG_0 */ MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x010, 0x014, 0x018, 0, 3, 7, 0x004, 0, - CLK_IS_CRITICAL), + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SPM_SEL, "spm_sel", spm_parents, 0x010, 0x014, 0x018, 8, 2, 15, 0x004, 1, - CLK_IS_CRITICAL), + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x010, 0x014, 0x018, 16, 3, 23, 0x004, 2), MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_BUS_AXIMEM_SEL, "bus_aximem_sel", bus_aximem_parents, 0x010, 0x014, 0x018, 24, 3, 31, 0x004, 3, - CLK_IS_CRITICAL), + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), /* CLK_CFG_1 */ MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_SEL, "disp_sel", disp_parents, 0x020, 0x024, 0x028, 0, 4, 7, 0x004, 4), @@ -601,15 +601,16 @@ static const struct mtk_mux top_mtk_muxes[] = { uart_parents, 0x070, 0x074, 0x078, 8, 1, 15, 0x004, 25), MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x070, 0x074, 0x078, 16, 2, 23, 0x004, 26), - MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", - msdc50_0_h_parents, 0x070, 0x074, 0x078, 24, 2, 31, 0x004, 27), + MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", + msdc50_0_h_parents, 0x070, 0x074, 0x078, 24, 2, + 31, 0x004, 27, 0), /* CLK_CFG_7 */ - MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", - msdc50_0_parents, 0x080, 0x084, 0x088, 0, 3, 7, 0x004, 28), - MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", - msdc30_parents, 0x080, 0x084, 0x088, 8, 3, 15, 0x004, 29), - MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", - msdc30_parents, 0x080, 0x084, 0x088, 16, 3, 23, 0x004, 30), + MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", + msdc50_0_parents, 0x080, 0x084, 0x088, 0, 3, 7, 0x004, 28, 0), + MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", + msdc30_parents, 0x080, 0x084, 0x088, 8, 3, 15, 0x004, 29, 0), + MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", + msdc30_parents, 0x080, 0x084, 0x088, 16, 3, 23, 0x004, 30, 0), MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, 0x080, 0x084, 0x088, 24, 2, 31, 0x008, 0), /* CLK_CFG_8 */ @@ -1027,7 +1028,7 @@ static struct platform_driver clk_mt8192_drv = { .of_match_table = of_match_clk_mt8192, }, .probe = mtk_clk_simple_probe, - .remove = mtk_clk_simple_remove, + .remove_new = mtk_clk_simple_remove, }; module_platform_driver(clk_mt8192_drv); MODULE_LICENSE("GPL"); |