diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/core_types.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/core_types.h | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h index c7fd702a4a87..329395ee7461 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h @@ -101,7 +101,11 @@ struct resource_funcs { struct dc *dc, struct dc_state *context, bool fast_validate); - + void (*calculate_wm)( + struct dc *dc, struct dc_state *context, + display_e2e_pipe_params_st *pipes, + int pipe_cnt, + int vlevel); int (*populate_dml_pipes)( struct dc *dc, struct dc_state *context, @@ -147,7 +151,23 @@ struct resource_funcs { void (*update_bw_bounding_box)( struct dc *dc, struct clk_bw_params *bw_params); +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + bool (*acquire_post_bldn_3dlut)( + struct resource_context *res_ctx, + const struct resource_pool *pool, + int mpcc_id, + struct dc_3dlut **lut, + struct dc_transfer_func **shaper); + bool (*release_post_bldn_3dlut)( + struct resource_context *res_ctx, + const struct resource_pool *pool, + struct dc_3dlut **lut, + struct dc_transfer_func **shaper); +#endif + enum dc_status (*add_dsc_to_stream_resource)( + struct dc *dc, struct dc_state *state, + struct dc_stream_state *stream); }; struct audio_support{ @@ -189,6 +209,10 @@ struct resource_pool { unsigned int underlay_pipe_index; unsigned int stream_enc_count; +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + struct dc_3dlut *mpc_lut[MAX_PIPES]; + struct dc_transfer_func *mpc_shaper[MAX_PIPES]; +#endif struct { unsigned int xtalin_clock_inKhz; unsigned int dccg_ref_clock_inKhz; @@ -217,6 +241,10 @@ struct resource_pool { struct dmcu *dmcu; struct dmub_psr *psr; +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + struct abm *multiple_abms[MAX_PIPES]; +#endif + const struct resource_funcs *funcs; const struct resource_caps *res_cap; @@ -312,6 +340,9 @@ struct resource_context { uint8_t clock_source_ref_count[MAX_CLOCK_SOURCES]; uint8_t dp_clock_source_ref_count; bool is_dsc_acquired[MAX_PIPES]; +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) + bool is_mpc_3dlut_acquired[MAX_PIPES]; +#endif }; struct dce_bw_output { |