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path: root/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h
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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h83
1 files changed, 83 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h
index f30ab4916242..3407e5da5534 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h
@@ -72,6 +72,67 @@ enum wbscl_coef_filter_type_sel {
};
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+enum dwb_boundary_mode {
+ DWBSCL_BOUNDARY_MODE_EDGE = 0,
+ DWBSCL_BOUNDARY_MODE_BLACK = 1
+};
+#endif
+
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+enum dwb_output_csc_mode {
+ DWB_OUTPUT_CSC_DISABLE = 0,
+ DWB_OUTPUT_CSC_COEF_A = 1,
+ DWB_OUTPUT_CSC_COEF_B = 2
+};
+
+enum dwb_ogam_lut_mode {
+ DWB_OGAM_MODE_BYPASS,
+ DWB_OGAM_RAMA_LUT,
+ DWB_OGAM_RAMB_LUT
+};
+
+enum dwb_color_volume {
+ DWB_SRGB_BT709 = 0, //SDR
+ DWB_PQ = 1, //HDR
+ DWB_HLG = 2, //HDR
+};
+
+enum dwb_color_space {
+ DWB_SRGB = 0, //SDR
+ DWB_BT709 = 1, //SDR
+ DWB_BT2020 = 2, //HDR
+};
+
+struct dwb_efc_hdr_metadata {
+ /*display chromaticities and white point in units of 0.00001 */
+ unsigned int chromaticity_green_x;
+ unsigned int chromaticity_green_y;
+ unsigned int chromaticity_blue_x;
+ unsigned int chromaticity_blue_y;
+ unsigned int chromaticity_red_x;
+ unsigned int chromaticity_red_y;
+ unsigned int chromaticity_white_point_x;
+ unsigned int chromaticity_white_point_y;
+
+ /*in units of candelas per square meter */
+ unsigned int min_luminance;
+ unsigned int max_luminance;
+
+ /*in units of nits */
+ unsigned int maximum_content_light_level;
+ unsigned int maximum_frame_average_light_level;
+};
+
+struct dwb_efc_display_settings {
+ unsigned int inputColorVolume;
+ unsigned int inputColorSpace;
+ unsigned int inputBitDepthMinus8;
+ struct dwb_efc_hdr_metadata hdr_metadata;
+ unsigned int dwbOutputBlack; // 0 - Normal, 1 - Output Black
+};
+
+#endif
struct dwb_warmup_params {
bool warmup_en; /* false: normal mode, true: enable pattern generator */
bool warmup_mode; /* false: 420, true: 444 */
@@ -148,6 +209,28 @@ struct dwbc_funcs {
struct dwb_warmup_params *warmup_params);
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+
+ void (*dwb_program_output_csc)(
+ struct dwbc *dwbc,
+ enum dc_color_space color_space,
+ enum dwb_output_csc_mode mode);
+
+ bool (*dwb_ogam_set_output_transfer_func)(
+ struct dwbc *dwbc,
+ const struct dc_transfer_func *in_transfer_func_dwb_ogam);
+
+ void (*get_privacy_mask)(
+ struct dwbc *dwbc, uint32_t *mask_id);
+
+ void (*set_privacy_mask)(
+ struct dwbc *dwbc, uint32_t mask_id);
+
+ //TODO: merge with output_transfer_func?
+ bool (*dwb_ogam_set_input_transfer_func)(
+ struct dwbc *dwbc,
+ const struct dc_transfer_func *in_transfer_func_dwb_ogam);
+#endif
bool (*get_dwb_status)(
struct dwbc *dwbc);
void (*dwb_set_scaler)(