diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_aux.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_aux.c | 41 |
1 files changed, 17 insertions, 24 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c index 664bebdecea7..5a176bfb10a2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c @@ -6,6 +6,7 @@ #include "i915_drv.h" #include "i915_reg.h" #include "i915_trace.h" +#include "intel_de.h" #include "intel_display_types.h" #include "intel_dp_aux.h" #include "intel_pps.h" @@ -40,20 +41,16 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp) i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); const unsigned int timeout_ms = 10; u32 status; - bool done; - -#define C (((status = intel_uncore_read_notrace(&i915->uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) - done = wait_event_timeout(i915->display.gmbus.wait_queue, C, - msecs_to_jiffies_timeout(timeout_ms)); + int ret; - /* just trace the final value */ - trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true); + ret = __intel_de_wait_for_register(i915, ch_ctl, + DP_AUX_CH_CTL_SEND_BUSY, 0, + 2, timeout_ms, &status); - if (!done) + if (ret == -ETIMEDOUT) drm_err(&i915->drm, "%s: did not complete or timeout within %ums (status 0x%08x)\n", intel_dp->aux.name, timeout_ms, status); -#undef C return status; } @@ -191,7 +188,6 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - struct intel_uncore *uncore = &i915->uncore; enum phy phy = intel_port_to_phy(i915, dig_port->base.port); bool is_tc_port = intel_phy_is_tc(i915, phy); i915_reg_t ch_ctl, ch_data[5]; @@ -235,7 +231,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, /* Try to wait for any previous AUX channel activity */ for (try = 0; try < 3; try++) { - status = intel_uncore_read_notrace(uncore, ch_ctl); + status = intel_de_read_notrace(i915, ch_ctl); if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0) break; msleep(1); @@ -244,7 +240,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true); if (try == 3) { - const u32 status = intel_uncore_read(uncore, ch_ctl); + const u32 status = intel_de_read(i915, ch_ctl); if (status != intel_dp->aux_busy_last_status) { drm_WARN(&i915->drm, 1, @@ -274,23 +270,20 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp, for (try = 0; try < 5; try++) { /* Load the send data into the aux channel data registers */ for (i = 0; i < send_bytes; i += 4) - intel_uncore_write(uncore, - ch_data[i >> 2], - intel_dp_aux_pack(send + i, - send_bytes - i)); + intel_de_write(i915, ch_data[i >> 2], + intel_dp_aux_pack(send + i, + send_bytes - i)); /* Send the command and wait for it to complete */ - intel_uncore_write(uncore, ch_ctl, send_ctl); + intel_de_write(i915, ch_ctl, send_ctl); status = intel_dp_aux_wait_done(intel_dp); /* Clear done status and any errors */ - intel_uncore_write(uncore, - ch_ctl, - status | - DP_AUX_CH_CTL_DONE | - DP_AUX_CH_CTL_TIME_OUT_ERROR | - DP_AUX_CH_CTL_RECEIVE_ERROR); + intel_de_write(i915, ch_ctl, + status | DP_AUX_CH_CTL_DONE | + DP_AUX_CH_CTL_TIME_OUT_ERROR | + DP_AUX_CH_CTL_RECEIVE_ERROR); /* * DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2 @@ -361,7 +354,7 @@ done: recv_bytes = recv_size; for (i = 0; i < recv_bytes; i += 4) - intel_dp_aux_unpack(intel_uncore_read(uncore, ch_data[i >> 2]), + intel_dp_aux_unpack(intel_de_read(i915, ch_data[i >> 2]), recv + i, recv_bytes - i); ret = recv_bytes; |