diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb_regs.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb_regs.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb_regs.h b/drivers/gpu/drm/i915/display/intel_dsb_regs.h index 210e2665441d..cb6e0e5624a6 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb_regs.h +++ b/drivers/gpu/drm/i915/display/intel_dsb_regs.h @@ -45,18 +45,18 @@ #define DSB_TLBTRANS_SM_STATE_MASK REG_GENMASK(21, 20) #define DSB_SAFE_WINDOW REG_BIT(19) #define DSB_POINTERS_SM_STATE_MASK REG_GENMASK(18, 17) -#define DSB_BUSY_ON_DELAYED_VBLANK REG_BIT(16) +#define DSB_BUSY_DURING_DELAYED_VBLANK REG_BIT(16) #define DSB_MMIO_ARB_SM_STATE_MASK REG_GENMASK(15, 13) #define DSB_MMIO_INST_SM_STATE_MASK REG_GENMASK(11, 7) #define DSB_RESET_SM_STATE_MASK REG_GENMASK(5, 4) #define DSB_RUN_SM_STATE_MASK REG_GENMASK(2, 0) #define DSB_INTERRUPT(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x28) -#define DSB_ATS_FAULT_INT_EN REG_BIT(20) +#define DSB_ATS_FAULT_INT_EN REG_BIT(20) /* mtl+ */ #define DSB_GTT_FAULT_INT_EN REG_BIT(19) #define DSB_RSPTIMEOUT_INT_EN REG_BIT(18) #define DSB_POLL_ERR_INT_EN REG_BIT(17) #define DSB_PROG_INT_EN REG_BIT(16) -#define DSB_ATS_FAULT_INT_STATUS REG_BIT(4) +#define DSB_ATS_FAULT_INT_STATUS REG_BIT(4) /* mtl+ */ #define DSB_GTT_FAULT_INT_STATUS REG_BIT(3) #define DSB_RSPTIMEOUT_INT_STATUS REG_BIT(2) #define DSB_POLL_ERR_INT_STATUS REG_BIT(1) |