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path: root/drivers/gpu/drm/i915/display/intel_sprite.c
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Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_sprite.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_sprite.c65
1 files changed, 39 insertions, 26 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 2357a1301f48..2d71294aaceb 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -53,6 +53,7 @@
int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct drm_rect *src = &plane_state->uapi.src;
u32 src_x, src_y, src_w, src_h, hsub, vsub;
@@ -94,14 +95,14 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
hsub = vsub = max(hsub, vsub);
if (src_x % hsub || src_w % hsub) {
- DRM_DEBUG_KMS("src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n",
- src_x, src_w, hsub, yesno(rotated));
+ drm_dbg_kms(&i915->drm, "src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n",
+ src_x, src_w, hsub, yesno(rotated));
return -EINVAL;
}
if (src_y % vsub || src_h % vsub) {
- DRM_DEBUG_KMS("src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n",
- src_y, src_h, vsub, yesno(rotated));
+ drm_dbg_kms(&i915->drm, "src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n",
+ src_y, src_h, vsub, yesno(rotated));
return -EINVAL;
}
@@ -313,7 +314,7 @@ static u32 vlv_sprite_ctl_crtc(const struct intel_crtc_state *crtc_state)
u32 sprctl = 0;
if (crtc_state->gamma_enable)
- sprctl |= SP_GAMMA_ENABLE;
+ sprctl |= SP_PIPE_GAMMA_ENABLE;
return sprctl;
}
@@ -436,9 +437,9 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
plane_state->view.color_plane[0].mapping_stride);
intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
- (crtc_y << 16) | crtc_x);
+ SP_POS_Y(crtc_y) | SP_POS_X(crtc_x));
intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
- ((crtc_h - 1) << 16) | (crtc_w - 1));
+ SP_HEIGHT(crtc_h - 1) | SP_WIDTH(crtc_w - 1));
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
@@ -479,7 +480,8 @@ vlv_sprite_update_arm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SPCONSTALPHA(pipe, plane_id), 0);
intel_de_write_fw(dev_priv, SPLINOFF(pipe, plane_id), linear_offset);
- intel_de_write_fw(dev_priv, SPTILEOFF(pipe, plane_id), (y << 16) | x);
+ intel_de_write_fw(dev_priv, SPTILEOFF(pipe, plane_id),
+ SP_OFFSET_Y(y) | SP_OFFSET_X(x));
/*
* The control register self-arms if the plane was previously
@@ -700,7 +702,7 @@ static u32 ivb_sprite_ctl_crtc(const struct intel_crtc_state *crtc_state)
u32 sprctl = 0;
if (crtc_state->gamma_enable)
- sprctl |= SPRITE_GAMMA_ENABLE;
+ sprctl |= SPRITE_PIPE_GAMMA_ENABLE;
if (crtc_state->csc_enable)
sprctl |= SPRITE_PIPE_CSC_ENABLE;
@@ -770,7 +772,7 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
}
if (!ivb_need_sprite_gamma(plane_state))
- sprctl |= SPRITE_INT_GAMMA_DISABLE;
+ sprctl |= SPRITE_PLANE_GAMMA_DISABLE;
if (plane_state->hw.color_encoding == DRM_COLOR_YCBCR_BT709)
sprctl |= SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709;
@@ -863,14 +865,18 @@ ivb_sprite_update_noarm(struct intel_plane *plane,
unsigned long irqflags;
if (crtc_w != src_w || crtc_h != src_h)
- sprscale = SPRITE_SCALE_ENABLE | ((src_w - 1) << 16) | (src_h - 1);
+ sprscale = SPRITE_SCALE_ENABLE |
+ SPRITE_SRC_WIDTH(src_w - 1) |
+ SPRITE_SRC_HEIGHT(src_h - 1);
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
plane_state->view.color_plane[0].mapping_stride);
- intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
- intel_de_write_fw(dev_priv, SPRSIZE(pipe), ((crtc_h - 1) << 16) | (crtc_w - 1));
+ intel_de_write_fw(dev_priv, SPRPOS(pipe),
+ SPRITE_POS_Y(crtc_y) | SPRITE_POS_X(crtc_x));
+ intel_de_write_fw(dev_priv, SPRSIZE(pipe),
+ SPRITE_HEIGHT(crtc_h - 1) | SPRITE_WIDTH(crtc_w - 1));
if (IS_IVYBRIDGE(dev_priv))
intel_de_write_fw(dev_priv, SPRSCALE(pipe), sprscale);
@@ -907,10 +913,12 @@ ivb_sprite_update_arm(struct intel_plane *plane,
/* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
* register */
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
- intel_de_write_fw(dev_priv, SPROFFSET(pipe), (y << 16) | x);
+ intel_de_write_fw(dev_priv, SPROFFSET(pipe),
+ SPRITE_OFFSET_Y(y) | SPRITE_OFFSET_X(x));
} else {
intel_de_write_fw(dev_priv, SPRLINOFF(pipe), linear_offset);
- intel_de_write_fw(dev_priv, SPRTILEOFF(pipe), (y << 16) | x);
+ intel_de_write_fw(dev_priv, SPRTILEOFF(pipe),
+ SPRITE_OFFSET_Y(y) | SPRITE_OFFSET_X(x));
}
/*
@@ -1047,7 +1055,7 @@ static u32 g4x_sprite_ctl_crtc(const struct intel_crtc_state *crtc_state)
u32 dvscntr = 0;
if (crtc_state->gamma_enable)
- dvscntr |= DVS_GAMMA_ENABLE;
+ dvscntr |= DVS_PIPE_GAMMA_ENABLE;
if (crtc_state->csc_enable)
dvscntr |= DVS_PIPE_CSC_ENABLE;
@@ -1199,14 +1207,18 @@ g4x_sprite_update_noarm(struct intel_plane *plane,
unsigned long irqflags;
if (crtc_w != src_w || crtc_h != src_h)
- dvsscale = DVS_SCALE_ENABLE | ((src_w - 1) << 16) | (src_h - 1);
+ dvsscale = DVS_SCALE_ENABLE |
+ DVS_SRC_WIDTH(src_w - 1) |
+ DVS_SRC_HEIGHT(src_h - 1);
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
plane_state->view.color_plane[0].mapping_stride);
- intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
- intel_de_write_fw(dev_priv, DVSSIZE(pipe), ((crtc_h - 1) << 16) | (crtc_w - 1));
+ intel_de_write_fw(dev_priv, DVSPOS(pipe),
+ DVS_POS_Y(crtc_y) | DVS_POS_X(crtc_x));
+ intel_de_write_fw(dev_priv, DVSSIZE(pipe),
+ DVS_HEIGHT(crtc_h - 1) | DVS_WIDTH(crtc_w - 1));
intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
@@ -1321,6 +1333,7 @@ static int
g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
const struct drm_rect *src = &plane_state->uapi.src;
const struct drm_rect *dst = &plane_state->uapi.dst;
@@ -1346,7 +1359,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
if (src_h & 1) {
- DRM_DEBUG_KMS("Source height must be even with interlaced modes\n");
+ drm_dbg_kms(&i915->drm, "Source height must be even with interlaced modes\n");
return -EINVAL;
}
min_height = 6;
@@ -1358,20 +1371,20 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
if (src_w < min_width || src_h < min_height ||
src_w > 2048 || src_h > 2048) {
- DRM_DEBUG_KMS("Source dimensions (%dx%d) exceed hardware limits (%dx%d - %dx%d)\n",
- src_w, src_h, min_width, min_height, 2048, 2048);
+ drm_dbg_kms(&i915->drm, "Source dimensions (%dx%d) exceed hardware limits (%dx%d - %dx%d)\n",
+ src_w, src_h, min_width, min_height, 2048, 2048);
return -EINVAL;
}
if (width_bytes > 4096) {
- DRM_DEBUG_KMS("Fetch width (%d) exceeds hardware max with scaling (%u)\n",
- width_bytes, 4096);
+ drm_dbg_kms(&i915->drm, "Fetch width (%d) exceeds hardware max with scaling (%u)\n",
+ width_bytes, 4096);
return -EINVAL;
}
if (stride > 4096) {
- DRM_DEBUG_KMS("Stride (%u) exceeds hardware max with scaling (%u)\n",
- stride, 4096);
+ drm_dbg_kms(&i915->drm, "Stride (%u) exceeds hardware max with scaling (%u)\n",
+ stride, 4096);
return -EINVAL;
}
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-19 18:43:26 +0300