diff options
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_dpi.c')
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_dpi.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 4317595a15d1..948a53f1f4b3 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -14,6 +14,7 @@ #include <linux/of_graph.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> +#include <linux/soc/mediatek/mtk-mmsys.h> #include <linux/types.h> #include <video/videomode.h> @@ -29,6 +30,7 @@ #include "mtk_disp_drv.h" #include "mtk_dpi_regs.h" #include "mtk_drm_ddp_comp.h" +#include "mtk_drm_drv.h" enum mtk_dpi_out_bit_num { MTK_DPI_OUT_BIT_NUM_8BITS, @@ -66,6 +68,7 @@ struct mtk_dpi { struct drm_connector *connector; void __iomem *regs; struct device *dev; + struct device *mmsys_dev; struct clk *engine_clk; struct clk *pixel_clk; struct clk *tvd_clk; @@ -134,6 +137,7 @@ struct mtk_dpi_yc_limit { * @yuv422_en_bit: Enable bit of yuv422. * @csc_enable_bit: Enable bit of CSC. * @pixels_per_iter: Quantity of transferred pixels per iteration. + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS. */ struct mtk_dpi_conf { unsigned int (*cal_factor)(int clock); @@ -152,6 +156,7 @@ struct mtk_dpi_conf { u32 yuv422_en_bit; u32 csc_enable_bit; u32 pixels_per_iter; + bool edge_cfg_in_mmsys; }; static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) @@ -448,8 +453,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi *dpi) mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE ? EDGE_SEL : 0, EDGE_SEL); + if (dpi->conf->edge_cfg_in_mmsys) + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_DDR_CON); } else { mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0); + if (dpi->conf->edge_cfg_in_mmsys) + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_SDR_CON); } } @@ -777,8 +786,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) { struct mtk_dpi *dpi = dev_get_drvdata(dev); struct drm_device *drm_dev = data; + struct mtk_drm_private *priv = drm_dev->dev_private; int ret; + dpi->mmsys_dev = priv->mmsys_dev; ret = drm_simple_encoder_init(drm_dev, &dpi->encoder, DRM_MODE_ENCODER_TMDS); if (ret) { @@ -929,6 +940,24 @@ static const struct mtk_dpi_conf mt8183_conf = { .csc_enable_bit = CSC_ENABLE, }; +static const struct mtk_dpi_conf mt8186_conf = { + .cal_factor = mt8183_calculate_factor, + .reg_h_fre_con = 0xe0, + .max_clock_khz = 150000, + .output_fmts = mt8183_output_fmts, + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), + .edge_cfg_in_mmsys = true, + .pixels_per_iter = 1, + .is_ck_de_pol = true, + .swap_input_support = true, + .support_direct_pin = true, + .dimension_mask = HPW_MASK, + .hvsize_mask = HSIZE_MASK, + .channel_swap_shift = CH_SWAP, + .yuv422_en_bit = YUV422_EN, + .csc_enable_bit = CSC_ENABLE, +}; + static const struct mtk_dpi_conf mt8188_dpintf_conf = { .cal_factor = mt8195_dpintf_calculate_factor, .max_clock_khz = 600000, @@ -1093,6 +1122,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf, }, + { .compatible = "mediatek,mt8186-dpi", + .data = &mt8186_conf, + }, { .compatible = "mediatek,mt8188-dp-intf", .data = &mt8188_dpintf_conf, }, |