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path: root/drivers/gpu/drm/msm/adreno/adreno_gpu.c
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Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_gpu.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c70
1 files changed, 43 insertions, 27 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 5db06b590943..e23641a5ec84 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -895,7 +895,7 @@ static int adreno_get_legacy_pwrlevels(struct device *dev)
return 0;
}
-static int adreno_get_pwrlevels(struct device *dev,
+static void adreno_get_pwrlevels(struct device *dev,
struct msm_gpu *gpu)
{
unsigned long freq = ULONG_MAX;
@@ -930,24 +930,6 @@ static int adreno_get_pwrlevels(struct device *dev,
}
DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate);
-
- /* Check for an interconnect path for the bus */
- gpu->icc_path = of_icc_get(dev, "gfx-mem");
- if (!gpu->icc_path) {
- /*
- * Keep compatbility with device trees that don't have an
- * interconnect-names property.
- */
- gpu->icc_path = of_icc_get(dev, NULL);
- }
- if (IS_ERR(gpu->icc_path))
- gpu->icc_path = NULL;
-
- gpu->ocmem_icc_path = of_icc_get(dev, "ocmem");
- if (IS_ERR(gpu->ocmem_icc_path))
- gpu->ocmem_icc_path = NULL;
-
- return 0;
}
int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu,
@@ -993,9 +975,11 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
struct adreno_gpu *adreno_gpu,
const struct adreno_gpu_funcs *funcs, int nr_rings)
{
- struct adreno_platform_config *config = pdev->dev.platform_data;
+ struct device *dev = &pdev->dev;
+ struct adreno_platform_config *config = dev->platform_data;
struct msm_gpu_config adreno_gpu_config = { 0 };
struct msm_gpu *gpu = &adreno_gpu->base;
+ int ret;
adreno_gpu->funcs = funcs;
adreno_gpu->info = adreno_info(config->rev);
@@ -1007,27 +991,59 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
adreno_gpu_config.nr_rings = nr_rings;
- adreno_get_pwrlevels(&pdev->dev, gpu);
+ adreno_get_pwrlevels(dev, gpu);
- pm_runtime_set_autosuspend_delay(&pdev->dev,
+ pm_runtime_set_autosuspend_delay(dev,
adreno_gpu->info->inactive_period);
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_enable(dev);
- return msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
+ ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
adreno_gpu->info->name, &adreno_gpu_config);
+ if (ret)
+ return ret;
+
+ /*
+ * The legacy case, before "interconnect-names", only has a
+ * single interconnect path which is equivalent to "gfx-mem"
+ */
+ if (!of_find_property(dev->of_node, "interconnect-names", NULL)) {
+ gpu->icc_path = of_icc_get(dev, NULL);
+ } else {
+ gpu->icc_path = of_icc_get(dev, "gfx-mem");
+ gpu->ocmem_icc_path = of_icc_get(dev, "ocmem");
+ }
+
+ if (IS_ERR(gpu->icc_path)) {
+ ret = PTR_ERR(gpu->icc_path);
+ gpu->icc_path = NULL;
+ return ret;
+ }
+
+ if (IS_ERR(gpu->ocmem_icc_path)) {
+ ret = PTR_ERR(gpu->ocmem_icc_path);
+ gpu->ocmem_icc_path = NULL;
+ /* allow -ENODATA, ocmem icc is optional */
+ if (ret != -ENODATA)
+ return ret;
+ }
+
+ return 0;
}
void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
{
struct msm_gpu *gpu = &adreno_gpu->base;
+ struct msm_drm_private *priv = gpu->dev->dev_private;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++)
release_firmware(adreno_gpu->fw[i]);
- icc_put(gpu->icc_path);
- icc_put(gpu->ocmem_icc_path);
+ pm_runtime_disable(&priv->gpu_pdev->dev);
msm_gpu_cleanup(&adreno_gpu->base);
+
+ icc_put(gpu->icc_path);
+ icc_put(gpu->ocmem_icc_path);
}