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path: root/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
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Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c43
1 files changed, 12 insertions, 31 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index f5120ea91ede..d1c3bd8379ea 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -30,24 +30,6 @@
#define LM_MISR_SIGNATURE 0x314
-static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->mixer_count; i++) {
- if (mixer == m->mixer[i].id) {
- b->blk_addr = addr + m->mixer[i].base;
- b->log_mask = DPU_DBG_MASK_LM;
- return &m->mixer[i];
- }
- }
-
- return ERR_PTR(-ENOMEM);
-}
-
/**
* _stage_offset(): returns the relative offset of the blend registers
* for the stage to be setup
@@ -160,8 +142,7 @@ static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer *ctx,
DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
}
-static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
- struct dpu_hw_lm_ops *ops,
+static void _setup_mixer_ops(struct dpu_hw_lm_ops *ops,
unsigned long features)
{
ops->setup_mixer_out = dpu_hw_lm_setup_out;
@@ -175,27 +156,27 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
ops->collect_misr = dpu_hw_lm_collect_misr;
}
-struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_mixer *c;
- const struct dpu_lm_cfg *cfg;
+
+ if (cfg->pingpong == PINGPONG_NONE) {
+ DPU_DEBUG("skip mixer %d without pingpong\n", cfg->id);
+ return NULL;
+ }
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _lm_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_LM;
/* Assign ops */
- c->idx = idx;
+ c->idx = cfg->id;
c->cap = cfg;
- _setup_mixer_ops(m, &c->ops, c->cap->features);
+ _setup_mixer_ops(&c->ops, c->cap->features);
return c;
}