diff options
Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_validate.c')
-rw-r--r-- | drivers/gpu/drm/vc4/vc4_validate.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c index 2feba55bcef7..d5dc6b51ec69 100644 --- a/drivers/gpu/drm/vc4/vc4_validate.c +++ b/drivers/gpu/drm/vc4/vc4_validate.c @@ -102,11 +102,11 @@ size_is_lt(uint32_t width, uint32_t height, int cpp) height <= 4 * utile_height(cpp)); } -struct drm_gem_cma_object * +struct drm_gem_dma_object * vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex) { struct vc4_dev *vc4 = exec->dev; - struct drm_gem_cma_object *obj; + struct drm_gem_dma_object *obj; struct vc4_bo *bo; if (WARN_ON_ONCE(vc4->is_vc5)) @@ -129,7 +129,7 @@ vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex) return obj; } -static struct drm_gem_cma_object * +static struct drm_gem_dma_object * vc4_use_handle(struct vc4_exec_info *exec, uint32_t gem_handles_packet_index) { return vc4_use_bo(exec, exec->bo_index[gem_handles_packet_index]); @@ -160,7 +160,7 @@ gl_shader_rec_size(uint32_t pointer_bits) } bool -vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, +vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_dma_object *fbo, uint32_t offset, uint8_t tiling_format, uint32_t width, uint32_t height, uint8_t cpp) { @@ -263,7 +263,7 @@ validate_increment_semaphore(VALIDATE_ARGS) static int validate_indexed_prim_list(VALIDATE_ARGS) { - struct drm_gem_cma_object *ib; + struct drm_gem_dma_object *ib; uint32_t length = *(uint32_t *)(untrusted + 1); uint32_t offset = *(uint32_t *)(untrusted + 5); uint32_t max_index = *(uint32_t *)(untrusted + 9); @@ -575,7 +575,7 @@ reloc_tex(struct vc4_exec_info *exec, struct vc4_texture_sample_info *sample, uint32_t texture_handle_index, bool is_cs) { - struct drm_gem_cma_object *tex; + struct drm_gem_dma_object *tex; uint32_t p0 = *(uint32_t *)(uniform_data_u + sample->p_offset[0]); uint32_t p1 = *(uint32_t *)(uniform_data_u + sample->p_offset[1]); uint32_t p2 = (sample->p_offset[2] != ~0 ? @@ -765,7 +765,7 @@ validate_gl_shader_rec(struct drm_device *dev, 28, /* cs */ }; uint32_t shader_reloc_count = ARRAY_SIZE(shader_reloc_offsets); - struct drm_gem_cma_object *bo[ARRAY_SIZE(shader_reloc_offsets) + 8]; + struct drm_gem_dma_object *bo[ARRAY_SIZE(shader_reloc_offsets) + 8]; uint32_t nr_attributes, nr_relocs, packet_size; int i; @@ -896,7 +896,7 @@ validate_gl_shader_rec(struct drm_device *dev, } for (i = 0; i < nr_attributes; i++) { - struct drm_gem_cma_object *vbo = + struct drm_gem_dma_object *vbo = bo[ARRAY_SIZE(shader_reloc_offsets) + i]; uint32_t o = 36 + i * 8; uint32_t offset = *(uint32_t *)(pkt_u + o + 0); |