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-rw-r--r--drivers/i3c/master/dw-i3c-master.c19
-rw-r--r--drivers/i3c/master/dw-i3c-master.h10
2 files changed, 29 insertions, 0 deletions
diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index 05f896d6e2cb..9332ae5f6419 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -1155,6 +1155,7 @@ static void dw_i3c_master_set_sir_enabled(struct dw_i3c_master *master,
} else {
reg |= DEV_ADDR_TABLE_SIR_REJECT;
}
+ master->platform_ops->set_dat_ibi(master, dev, enable, &reg);
writel(reg, master->regs + dat_entry);
reg = readl(master->regs + IBI_SIR_REQ_REJECT);
@@ -1247,6 +1248,17 @@ static void dw_i3c_master_handle_ibi_sir(struct dw_i3c_master *master,
addr = IBI_QUEUE_IBI_ADDR(status);
len = IBI_QUEUE_STATUS_DATA_LEN(status);
+ /*
+ * We be tempted to check the error status in bit 30; however, due
+ * to the PEC errata workaround on some platform implementations (see
+ * ast2600_i3c_set_dat_ibi()), those will almost always have a PEC
+ * error on IBI payload data, as well as losing the last byte of
+ * payload.
+ *
+ * If we implement error status checking on that bit, we may need
+ * a new platform op to validate it.
+ */
+
spin_lock_irqsave(&master->devs_lock, flags);
idx = dw_i3c_master_get_addr_pos(master, addr);
if (idx < 0) {
@@ -1387,8 +1399,15 @@ static int dw_i3c_platform_init_nop(struct dw_i3c_master *i3c)
return 0;
}
+static void dw_i3c_platform_set_dat_ibi_nop(struct dw_i3c_master *i3c,
+ struct i3c_dev_desc *dev,
+ bool enable, u32 *dat)
+{
+}
+
static const struct dw_i3c_platform_ops dw_i3c_platform_ops_default = {
.init = dw_i3c_platform_init_nop,
+ .set_dat_ibi = dw_i3c_platform_set_dat_ibi_nop,
};
int dw_i3c_common_probe(struct dw_i3c_master *master,
diff --git a/drivers/i3c/master/dw-i3c-master.h b/drivers/i3c/master/dw-i3c-master.h
index a5425fa6b7d4..ab862c5d15fe 100644
--- a/drivers/i3c/master/dw-i3c-master.h
+++ b/drivers/i3c/master/dw-i3c-master.h
@@ -66,6 +66,16 @@ struct dw_i3c_platform_ops {
* perform actual device enabling with the i3c core ready.
*/
int (*init)(struct dw_i3c_master *i3c);
+
+ /*
+ * Initialise a DAT entry to enable/disable IBIs. Allows the platform
+ * to perform any device workarounds on the DAT entry before
+ * inserting into the hardware table.
+ *
+ * Called with the DAT lock held; must not sleep.
+ */
+ void (*set_dat_ibi)(struct dw_i3c_master *i3c,
+ struct i3c_dev_desc *dev, bool enable, u32 *reg);
};
extern int dw_i3c_common_probe(struct dw_i3c_master *master,