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path: root/drivers/media/pci/cx18/cx18-firmware.c
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Diffstat (limited to 'drivers/media/pci/cx18/cx18-firmware.c')
-rw-r--r--drivers/media/pci/cx18/cx18-firmware.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/pci/cx18/cx18-firmware.c b/drivers/media/pci/cx18/cx18-firmware.c
index 876b96c11290..fdac310d7477 100644
--- a/drivers/media/pci/cx18/cx18-firmware.c
+++ b/drivers/media/pci/cx18/cx18-firmware.c
@@ -244,7 +244,7 @@ void cx18_init_power(struct cx18 *cx, int lowpwr)
* an error of less than 0.13 ppm which is way, way better than any off
* the shelf crystal will have for accuracy anyway.
*
- * Below I aim to run the PLLs' VCOs near 400 MHz to minimze errors.
+ * Below I aim to run the PLLs' VCOs near 400 MHz to minimize errors.
*
* Many thanks to Jeff Campbell and Mike Bradley for their extensive
* investigation, experimentation, testing, and suggested solutions of