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path: root/drivers/media/platform/qcom/camss/camss-vfe-4-7.c
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Diffstat (limited to 'drivers/media/platform/qcom/camss/camss-vfe-4-7.c')
-rw-r--r--drivers/media/platform/qcom/camss/camss-vfe-4-7.c277
1 files changed, 116 insertions, 161 deletions
diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c
index b5704a2f119b..a59635217758 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe-4-7.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe-4-7.c
@@ -8,11 +8,15 @@
* Copyright (C) 2015-2018 Linaro Ltd.
*/
+#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/iopoll.h>
+#include "camss.h"
#include "camss-vfe.h"
+#include "camss-vfe-gen1.h"
+
#define VFE_0_HW_VERSION 0x000
@@ -257,7 +261,7 @@ static void vfe_hw_version_read(struct vfe_device *vfe, struct device *dev)
dev_err(dev, "VFE HW Version = 0x%08x\n", hw_version);
}
-static u16 vfe47_get_ub_size(u8 vfe_id)
+static u16 vfe_get_ub_size(u8 vfe_id)
{
if (vfe_id == 0)
return MSM_VFE_VFE0_UB_SIZE_RDI;
@@ -295,6 +299,8 @@ static void vfe_global_reset(struct vfe_device *vfe)
VFE_0_GLOBAL_RESET_CMD_CORE;
writel_relaxed(BIT(31), vfe->base + VFE_0_IRQ_MASK_0);
+
+ /* Enforce barrier between IRQ mask setup and global reset */
wmb();
writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD);
}
@@ -310,7 +316,7 @@ static void vfe_halt_clear(struct vfe_device *vfe)
writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD);
}
-static void vfe47_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)
+static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)
{
if (enable)
vfe_reg_set(vfe, VFE_0_BUS_IMAGE_MASTER_n_WR_CFG(wm),
@@ -459,8 +465,12 @@ static void vfe_wm_set_ub_cfg(struct vfe_device *vfe, u8 wm,
static void vfe_bus_reload_wm(struct vfe_device *vfe, u8 wm)
{
+ /* Enforce barrier between any outstanding register write */
wmb();
+
writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD);
+
+ /* Use barrier to make sure bus reload is issued before anything else */
wmb();
}
@@ -674,8 +684,12 @@ static void vfe_set_rdi_cid(struct vfe_device *vfe, enum vfe_line_id id, u8 cid)
static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)
{
vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id);
+
+ /* Enforce barrier between line update and commit */
wmb();
writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE);
+
+ /* Make sure register update is issued before further reg writes */
wmb();
}
@@ -779,20 +793,6 @@ static void vfe_set_demux_cfg(struct vfe_device *vfe, struct vfe_line *line)
writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG);
}
-static inline u8 vfe_calc_interp_reso(u16 input, u16 output)
-{
- if (input / output >= 16)
- return 0;
-
- if (input / output >= 8)
- return 1;
-
- if (input / output >= 4)
- return 2;
-
- return 3;
-}
-
static void vfe_set_scale_cfg(struct vfe_device *vfe, struct vfe_line *line)
{
u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat;
@@ -894,7 +894,7 @@ static void vfe_set_clamp_cfg(struct vfe_device *vfe)
writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG);
}
-static void vfe47_set_qos(struct vfe_device *vfe)
+static void vfe_set_qos(struct vfe_device *vfe)
{
u32 val = VFE_0_BUS_BDG_QOS_CFG_0_CFG;
u32 val7 = VFE_0_BUS_BDG_QOS_CFG_7_CFG;
@@ -909,7 +909,7 @@ static void vfe47_set_qos(struct vfe_device *vfe)
writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);
}
-static void vfe47_set_ds(struct vfe_device *vfe)
+static void vfe_set_ds(struct vfe_device *vfe)
{
u32 val = VFE_0_BUS_BDG_DS_CFG_0_CFG;
u32 val16 = VFE_0_BUS_BDG_DS_CFG_16_CFG;
@@ -993,6 +993,8 @@ static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable)
cmd = VFE_0_CAMIF_CMD_CLEAR_CAMIF_STATUS | VFE_0_CAMIF_CMD_NO_CHANGE;
writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD);
+
+ /* Make sure camif command is issued written before it is changed again */
wmb();
if (enable)
@@ -1035,27 +1037,10 @@ static int vfe_camif_wait_for_stop(struct vfe_device *vfe, struct device *dev)
return ret;
}
-static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1)
-{
- *value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);
- *value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);
- writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);
- writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);
-
- wmb();
- writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);
-}
-
-static void vfe_violation_read(struct vfe_device *vfe)
-{
- u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);
-
- pr_err_ratelimited("VFE: violation = 0x%08x\n", violation);
-}
/*
- * vfe_isr - ISPIF module interrupt handler
+ * vfe_isr - VFE module interrupt handler
* @irq: Interrupt line
* @dev: VFE device
*
@@ -1069,8 +1054,8 @@ static irqreturn_t vfe_isr(int irq, void *dev)
vfe->ops->isr_read(vfe, &value0, &value1);
- trace_printk("VFE: status0 = 0x%08x, status1 = 0x%08x\n",
- value0, value1);
+ dev_dbg(vfe->camss->dev, "VFE: status0 = 0x%08x, status1 = 0x%08x\n",
+ value0, value1);
if (value0 & VFE_0_IRQ_STATUS_0_RESET_ACK)
vfe->isr_ops.reset_ack(vfe);
@@ -1081,7 +1066,7 @@ static irqreturn_t vfe_isr(int irq, void *dev)
if (value1 & VFE_0_IRQ_STATUS_1_BUS_BDG_HALT_ACK)
vfe->isr_ops.halt_ack(vfe);
- for (i = VFE_LINE_RDI0; i <= VFE_LINE_PIX; i++)
+ for (i = VFE_LINE_RDI0; i < vfe->line_num; i++)
if (value0 & VFE_0_IRQ_STATUS_0_line_n_REG_UPDATE(i))
vfe->isr_ops.reg_update(vfe, i);
@@ -1107,150 +1092,120 @@ static irqreturn_t vfe_isr(int irq, void *dev)
return IRQ_HANDLED;
}
-const struct vfe_hw_ops vfe_ops_4_7 = {
- .hw_version_read = vfe_hw_version_read,
- .get_ub_size = vfe47_get_ub_size,
- .global_reset = vfe_global_reset,
- .halt_request = vfe_halt_request,
- .halt_clear = vfe_halt_clear,
- .wm_enable = vfe47_wm_enable,
- .wm_frame_based = vfe_wm_frame_based,
- .wm_line_based = vfe_wm_line_based,
- .wm_set_framedrop_period = vfe_wm_set_framedrop_period,
- .wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern,
- .wm_set_ub_cfg = vfe_wm_set_ub_cfg,
- .bus_reload_wm = vfe_bus_reload_wm,
- .wm_set_ping_addr = vfe_wm_set_ping_addr,
- .wm_set_pong_addr = vfe_wm_set_pong_addr,
- .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,
- .bus_enable_wr_if = vfe_bus_enable_wr_if,
- .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,
- .wm_set_subsample = vfe_wm_set_subsample,
- .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,
- .set_xbar_cfg = vfe_set_xbar_cfg,
- .set_realign_cfg = vfe_set_realign_cfg,
- .set_rdi_cid = vfe_set_rdi_cid,
- .reg_update = vfe_reg_update,
- .reg_update_clear = vfe_reg_update_clear,
- .enable_irq_wm_line = vfe_enable_irq_wm_line,
- .enable_irq_pix_line = vfe_enable_irq_pix_line,
- .enable_irq_common = vfe_enable_irq_common,
- .set_demux_cfg = vfe_set_demux_cfg,
- .set_scale_cfg = vfe_set_scale_cfg,
- .set_crop_cfg = vfe_set_crop_cfg,
- .set_clamp_cfg = vfe_set_clamp_cfg,
- .set_qos = vfe47_set_qos,
- .set_ds = vfe47_set_ds,
- .set_cgc_override = vfe_set_cgc_override,
- .set_camif_cfg = vfe_set_camif_cfg,
- .set_camif_cmd = vfe_set_camif_cmd,
- .set_module_cfg = vfe_set_module_cfg,
- .camif_wait_for_stop = vfe_camif_wait_for_stop,
- .isr_read = vfe_isr_read,
- .violation_read = vfe_violation_read,
- .isr = vfe_isr,
-};
-
-static u16 vfe48_get_ub_size(u8 vfe_id)
+static void vfe_isr_read(struct vfe_device *vfe, u32 *value0, u32 *value1)
{
- /* On VFE4.8 the ub-size is the same on both instances */
- return MSM_VFE_VFE0_UB_SIZE_RDI;
+ *value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0);
+ *value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1);
+
+ writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0);
+ writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1);
+
+ /* Enforce barrier between local & global IRQ clear */
+ wmb();
+ writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD);
}
-static void vfe48_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable)
+/*
+ * vfe_pm_domain_off - Disable power domains specific to this VFE.
+ * @vfe: VFE Device
+ */
+static void vfe_pm_domain_off(struct vfe_device *vfe)
{
- if (enable)
- writel_relaxed(2 << VFE48_0_BUS_IMAGE_MASTER_n_SHIFT(wm),
- vfe->base + VFE48_0_BUS_IMAGE_MASTER_CMD);
- else
- writel_relaxed(1 << VFE48_0_BUS_IMAGE_MASTER_n_SHIFT(wm),
- vfe->base + VFE48_0_BUS_IMAGE_MASTER_CMD);
+ struct camss *camss;
- /* The WM must be enabled before sending other commands */
- wmb();
+ if (!vfe)
+ return;
+
+ camss = vfe->camss;
+
+ device_link_del(camss->genpd_link[vfe->id]);
}
-static void vfe48_set_qos(struct vfe_device *vfe)
+/*
+ * vfe_pm_domain_on - Enable power domains specific to this VFE.
+ * @vfe: VFE Device
+ */
+static int vfe_pm_domain_on(struct vfe_device *vfe)
{
- u32 val = VFE48_0_BUS_BDG_QOS_CFG_0_CFG;
- u32 val3 = VFE48_0_BUS_BDG_QOS_CFG_3_CFG;
- u32 val4 = VFE48_0_BUS_BDG_QOS_CFG_4_CFG;
- u32 val7 = VFE48_0_BUS_BDG_QOS_CFG_7_CFG;
+ struct camss *camss = vfe->camss;
+ enum vfe_line_id id = vfe->id;
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2);
- writel_relaxed(val3, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3);
- writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4);
- writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5);
- writel_relaxed(val4, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6);
- writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7);
+ camss->genpd_link[id] = device_link_add(camss->dev, camss->genpd[id], DL_FLAG_STATELESS |
+ DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
+
+ if (!camss->genpd_link[id]) {
+ dev_err(vfe->camss->dev, "Failed to add VFE#%d to power domain\n", id);
+ return -EINVAL;
+ }
+
+ return 0;
}
-static void vfe48_set_ds(struct vfe_device *vfe)
+static void vfe_violation_read(struct vfe_device *vfe)
{
- u32 val = VFE48_0_BUS_BDG_DS_CFG_0_CFG;
- u32 val16 = VFE48_0_BUS_BDG_DS_CFG_16_CFG;
+ u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_0);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_1);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_2);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_3);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_4);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_5);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_6);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_7);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_8);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_9);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_10);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_11);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_12);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_13);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_14);
- writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_DS_CFG_15);
- writel_relaxed(val16, vfe->base + VFE_0_BUS_BDG_DS_CFG_16);
+ pr_err_ratelimited("VFE: violation = 0x%08x\n", violation);
}
-const struct vfe_hw_ops vfe_ops_4_8 = {
- .hw_version_read = vfe_hw_version_read,
- .get_ub_size = vfe48_get_ub_size,
- .global_reset = vfe_global_reset,
- .halt_request = vfe_halt_request,
+static const struct vfe_hw_ops_gen1 vfe_ops_gen1_4_7 = {
+ .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,
+ .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,
+ .bus_enable_wr_if = vfe_bus_enable_wr_if,
+ .bus_reload_wm = vfe_bus_reload_wm,
+ .camif_wait_for_stop = vfe_camif_wait_for_stop,
+ .enable_irq_common = vfe_enable_irq_common,
+ .enable_irq_pix_line = vfe_enable_irq_pix_line,
+ .enable_irq_wm_line = vfe_enable_irq_wm_line,
+ .get_ub_size = vfe_get_ub_size,
.halt_clear = vfe_halt_clear,
- .wm_enable = vfe48_wm_enable,
+ .halt_request = vfe_halt_request,
+ .set_camif_cfg = vfe_set_camif_cfg,
+ .set_camif_cmd = vfe_set_camif_cmd,
+ .set_cgc_override = vfe_set_cgc_override,
+ .set_clamp_cfg = vfe_set_clamp_cfg,
+ .set_crop_cfg = vfe_set_crop_cfg,
+ .set_demux_cfg = vfe_set_demux_cfg,
+ .set_ds = vfe_set_ds,
+ .set_module_cfg = vfe_set_module_cfg,
+ .set_qos = vfe_set_qos,
+ .set_rdi_cid = vfe_set_rdi_cid,
+ .set_realign_cfg = vfe_set_realign_cfg,
+ .set_scale_cfg = vfe_set_scale_cfg,
+ .set_xbar_cfg = vfe_set_xbar_cfg,
+ .wm_enable = vfe_wm_enable,
.wm_frame_based = vfe_wm_frame_based,
+ .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,
.wm_line_based = vfe_wm_line_based,
- .wm_set_framedrop_period = vfe_wm_set_framedrop_period,
.wm_set_framedrop_pattern = vfe_wm_set_framedrop_pattern,
- .wm_set_ub_cfg = vfe_wm_set_ub_cfg,
- .bus_reload_wm = vfe_bus_reload_wm,
+ .wm_set_framedrop_period = vfe_wm_set_framedrop_period,
.wm_set_ping_addr = vfe_wm_set_ping_addr,
.wm_set_pong_addr = vfe_wm_set_pong_addr,
- .wm_get_ping_pong_status = vfe_wm_get_ping_pong_status,
- .bus_enable_wr_if = vfe_bus_enable_wr_if,
- .bus_connect_wm_to_rdi = vfe_bus_connect_wm_to_rdi,
.wm_set_subsample = vfe_wm_set_subsample,
- .bus_disconnect_wm_from_rdi = vfe_bus_disconnect_wm_from_rdi,
- .set_xbar_cfg = vfe_set_xbar_cfg,
- .set_realign_cfg = vfe_set_realign_cfg,
- .set_rdi_cid = vfe_set_rdi_cid,
- .reg_update = vfe_reg_update,
- .reg_update_clear = vfe_reg_update_clear,
- .enable_irq_wm_line = vfe_enable_irq_wm_line,
- .enable_irq_pix_line = vfe_enable_irq_pix_line,
- .enable_irq_common = vfe_enable_irq_common,
- .set_demux_cfg = vfe_set_demux_cfg,
- .set_scale_cfg = vfe_set_scale_cfg,
- .set_crop_cfg = vfe_set_crop_cfg,
- .set_clamp_cfg = vfe_set_clamp_cfg,
- .set_qos = vfe48_set_qos,
- .set_ds = vfe48_set_ds,
- .set_cgc_override = vfe_set_cgc_override,
- .set_camif_cfg = vfe_set_camif_cfg,
- .set_camif_cmd = vfe_set_camif_cmd,
- .set_module_cfg = vfe_set_module_cfg,
- .camif_wait_for_stop = vfe_camif_wait_for_stop,
+ .wm_set_ub_cfg = vfe_wm_set_ub_cfg,
+};
+
+static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)
+{
+ vfe->isr_ops = vfe_isr_ops_gen1;
+ vfe->ops_gen1 = &vfe_ops_gen1_4_7;
+ vfe->video_ops = vfe_video_ops_gen1;
+
+ vfe->line_num = VFE_LINE_NUM_GEN1;
+}
+
+const struct vfe_hw_ops vfe_ops_4_7 = {
+ .global_reset = vfe_global_reset,
+ .hw_version_read = vfe_hw_version_read,
.isr_read = vfe_isr_read,
- .violation_read = vfe_violation_read,
.isr = vfe_isr,
+ .pm_domain_off = vfe_pm_domain_off,
+ .pm_domain_on = vfe_pm_domain_on,
+ .reg_update_clear = vfe_reg_update_clear,
+ .reg_update = vfe_reg_update,
+ .subdev_init = vfe_subdev_init,
+ .vfe_disable = vfe_gen1_disable,
+ .vfe_enable = vfe_gen1_enable,
+ .vfe_halt = vfe_gen1_halt,
+ .violation_read = vfe_violation_read,
};