diff options
Diffstat (limited to 'drivers/media/platform/renesas/vsp1/vsp1_rpf.c')
| -rw-r--r-- | drivers/media/platform/renesas/vsp1/vsp1_rpf.c | 64 |
1 files changed, 58 insertions, 6 deletions
diff --git a/drivers/media/platform/renesas/vsp1/vsp1_rpf.c b/drivers/media/platform/renesas/vsp1/vsp1_rpf.c index 75083cb234fe..3b17f5fa4067 100644 --- a/drivers/media/platform/renesas/vsp1/vsp1_rpf.c +++ b/drivers/media/platform/renesas/vsp1/vsp1_rpf.c @@ -109,6 +109,58 @@ static void rpf_configure_stream(struct vsp1_entity *entity, vsp1_rpf_write(rpf, dlb, VI6_RPF_INFMT, infmt); vsp1_rpf_write(rpf, dlb, VI6_RPF_DSWAP, fmtinfo->swap); + if (entity->vsp1->info->gen == 4) { + u32 ext_infmt0; + u32 ext_infmt1; + u32 ext_infmt2; + + switch (fmtinfo->fourcc) { + case V4L2_PIX_FMT_RGBX1010102: + ext_infmt0 = VI6_RPF_EXT_INFMT0_BYPP_M1_RGB10; + ext_infmt1 = VI6_RPF_EXT_INFMT1_PACK_CPOS(0, 10, 20, 0); + ext_infmt2 = VI6_RPF_EXT_INFMT2_PACK_CLEN(10, 10, 10, 0); + break; + + case V4L2_PIX_FMT_RGBA1010102: + ext_infmt0 = VI6_RPF_EXT_INFMT0_BYPP_M1_RGB10; + ext_infmt1 = VI6_RPF_EXT_INFMT1_PACK_CPOS(0, 10, 20, 30); + ext_infmt2 = VI6_RPF_EXT_INFMT2_PACK_CLEN(10, 10, 10, 2); + break; + + case V4L2_PIX_FMT_ARGB2101010: + ext_infmt0 = VI6_RPF_EXT_INFMT0_BYPP_M1_RGB10; + ext_infmt1 = VI6_RPF_EXT_INFMT1_PACK_CPOS(2, 12, 22, 0); + ext_infmt2 = VI6_RPF_EXT_INFMT2_PACK_CLEN(10, 10, 10, 2); + break; + + case V4L2_PIX_FMT_Y210: + ext_infmt0 = VI6_RPF_EXT_INFMT0_F2B | + VI6_RPF_EXT_INFMT0_IPBD_Y_10 | + VI6_RPF_EXT_INFMT0_IPBD_C_10; + ext_infmt1 = 0x0; + ext_infmt2 = 0x0; + break; + + case V4L2_PIX_FMT_Y212: + ext_infmt0 = VI6_RPF_EXT_INFMT0_F2B | + VI6_RPF_EXT_INFMT0_IPBD_Y_12 | + VI6_RPF_EXT_INFMT0_IPBD_C_12; + ext_infmt1 = 0x0; + ext_infmt2 = 0x0; + break; + + default: + ext_infmt0 = 0; + ext_infmt1 = 0; + ext_infmt2 = 0; + break; + } + + vsp1_rpf_write(rpf, dlb, VI6_RPF_EXT_INFMT0, ext_infmt0); + vsp1_rpf_write(rpf, dlb, VI6_RPF_EXT_INFMT1, ext_infmt1); + vsp1_rpf_write(rpf, dlb, VI6_RPF_EXT_INFMT2, ext_infmt2); + } + /* Output location. */ if (pipe->brx) { const struct v4l2_rect *compose; @@ -133,18 +185,18 @@ static void rpf_configure_stream(struct vsp1_entity *entity, * a fixed alpha value set through the V4L2_CID_ALPHA_COMPONENT control * otherwise. * - * The Gen3 RPF has extended alpha capability and can both multiply the + * The Gen3+ RPF has extended alpha capability and can both multiply the * alpha channel by a fixed global alpha value, and multiply the pixel * components to convert the input to premultiplied alpha. * * As alpha premultiplication is available in the BRx for both Gen2 and - * Gen3 we handle it there and use the Gen3 alpha multiplier for global + * Gen3+ we handle it there and use the Gen3 alpha multiplier for global * alpha multiplication only. This however prevents conversion to * premultiplied alpha if no BRx is present in the pipeline. If that use * case turns out to be useful we will revisit the implementation (for * Gen3 only). * - * We enable alpha multiplication on Gen3 using the fixed alpha value + * We enable alpha multiplication on Gen3+ using the fixed alpha value * set through the V4L2_CID_ALPHA_COMPONENT control when the input * contains an alpha channel. On Gen2 the global alpha is ignored in * that case. @@ -155,7 +207,7 @@ static void rpf_configure_stream(struct vsp1_entity *entity, (fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED : VI6_RPF_ALPH_SEL_ASEL_FIXED)); - if (entity->vsp1->info->gen == 3) { + if (entity->vsp1->info->gen >= 3) { u32 mult; if (fmtinfo->alpha) { @@ -301,10 +353,10 @@ static void rpf_configure_partition(struct vsp1_entity *entity, } /* - * On Gen3 hardware the SPUVS bit has no effect on 3-planar + * On Gen3+ hardware the SPUVS bit has no effect on 3-planar * formats. Swap the U and V planes manually in that case. */ - if (vsp1->info->gen == 3 && format->num_planes == 3 && + if (vsp1->info->gen >= 3 && format->num_planes == 3 && fmtinfo->swap_uv) swap(mem.addr[1], mem.addr[2]); |