diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath11k/pci.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath11k/pci.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c index 7b33731a50ee..79e2cbe82638 100644 --- a/drivers/net/wireless/ath/ath11k/pci.c +++ b/drivers/net/wireless/ath/ath11k/pci.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause-Clear /* * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. - * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/module.h> @@ -203,10 +203,10 @@ static void ath11k_pci_clear_dbg_registers(struct ath11k_base *ab) /* read cookie */ val = ath11k_pcic_read32(ab, PCIE_Q6_COOKIE_ADDR); - ath11k_dbg(ab, ATH11K_DBG_PCI, "cookie:0x%x\n", val); + ath11k_dbg(ab, ATH11K_DBG_PCI, "pcie_q6_cookie_addr 0x%x\n", val); val = ath11k_pcic_read32(ab, WLAON_WARM_SW_ENTRY); - ath11k_dbg(ab, ATH11K_DBG_PCI, "WLAON_WARM_SW_ENTRY 0x%x\n", val); + ath11k_dbg(ab, ATH11K_DBG_PCI, "wlaon_warm_sw_entry 0x%x\n", val); /* TODO: exact time to sleep is uncertain */ mdelay(10); @@ -218,13 +218,13 @@ static void ath11k_pci_clear_dbg_registers(struct ath11k_base *ab) mdelay(10); val = ath11k_pcic_read32(ab, WLAON_WARM_SW_ENTRY); - ath11k_dbg(ab, ATH11K_DBG_PCI, "WLAON_WARM_SW_ENTRY 0x%x\n", val); + ath11k_dbg(ab, ATH11K_DBG_PCI, "wlaon_warm_sw_entry 0x%x\n", val); /* A read clear register. clear the register to prevent * Q6 from entering wrong code path. */ val = ath11k_pcic_read32(ab, WLAON_SOC_RESET_CAUSE_REG); - ath11k_dbg(ab, ATH11K_DBG_PCI, "soc reset cause:%d\n", val); + ath11k_dbg(ab, ATH11K_DBG_PCI, "soc reset cause %d\n", val); } static int ath11k_pci_set_link_reg(struct ath11k_base *ab, @@ -312,14 +312,14 @@ static void ath11k_pci_enable_ltssm(struct ath11k_base *ab) val = ath11k_pcic_read32(ab, PCIE_PCIE_PARF_LTSSM); } - ath11k_dbg(ab, ATH11K_DBG_PCI, "pci ltssm 0x%x\n", val); + ath11k_dbg(ab, ATH11K_DBG_PCI, "ltssm 0x%x\n", val); val = ath11k_pcic_read32(ab, GCC_GCC_PCIE_HOT_RST); val |= GCC_GCC_PCIE_HOT_RST_VAL; ath11k_pcic_write32(ab, GCC_GCC_PCIE_HOT_RST, val); val = ath11k_pcic_read32(ab, GCC_GCC_PCIE_HOT_RST); - ath11k_dbg(ab, ATH11K_DBG_PCI, "pci pcie_hot_rst 0x%x\n", val); + ath11k_dbg(ab, ATH11K_DBG_PCI, "pcie_hot_rst 0x%x\n", val); mdelay(5); } @@ -433,7 +433,7 @@ static int ath11k_pci_alloc_msi(struct ath11k_pci *ab_pci) } clear_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags); ab->pci.msi.config = &msi_config_one_msi; - ath11k_dbg(ab, ATH11K_DBG_PCI, "request MSI one vector\n"); + ath11k_dbg(ab, ATH11K_DBG_PCI, "request one msi vector\n"); } ath11k_info(ab, "MSI vectors: %d\n", num_vectors); @@ -487,7 +487,7 @@ static int ath11k_pci_config_msi_data(struct ath11k_pci *ab_pci) ab_pci->ab->pci.msi.ep_base_data = msi_desc->msg.data; - ath11k_dbg(ab_pci->ab, ATH11K_DBG_PCI, "pci after request_irq msi_ep_base_data %d\n", + ath11k_dbg(ab_pci->ab, ATH11K_DBG_PCI, "after request_irq msi_ep_base_data %d\n", ab_pci->ab->pci.msi.ep_base_data); return 0; @@ -545,7 +545,7 @@ static int ath11k_pci_claim(struct ath11k_pci *ab_pci, struct pci_dev *pdev) ab->mem_ce = ab->mem; - ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot pci_mem 0x%pK\n", ab->mem); + ath11k_dbg(ab, ATH11K_DBG_BOOT, "pci_mem 0x%p\n", ab->mem); return 0; release_region: @@ -575,7 +575,7 @@ static void ath11k_pci_aspm_disable(struct ath11k_pci *ab_pci) pcie_capability_read_word(ab_pci->pdev, PCI_EXP_LNKCTL, &ab_pci->link_ctl); - ath11k_dbg(ab, ATH11K_DBG_PCI, "pci link_ctl 0x%04x L0s %d L1 %d\n", + ath11k_dbg(ab, ATH11K_DBG_PCI, "link_ctl 0x%04x L0s %d L1 %d\n", ab_pci->link_ctl, u16_get_bits(ab_pci->link_ctl, PCI_EXP_LNKCTL_ASPM_L0S), u16_get_bits(ab_pci->link_ctl, PCI_EXP_LNKCTL_ASPM_L1)); @@ -709,7 +709,7 @@ static void ath11k_pci_read_hw_version(struct ath11k_base *ab, u32 *major, u32 * *minor = FIELD_GET(TCSR_SOC_HW_VERSION_MINOR_MASK, soc_hw_version); - ath11k_dbg(ab, ATH11K_DBG_PCI, "pci tcsr_soc_hw_version major %d minor %d\n", + ath11k_dbg(ab, ATH11K_DBG_PCI, "tcsr_soc_hw_version major %d minor %d\n", *major, *minor); } @@ -745,6 +745,7 @@ static int ath11k_pci_probe(struct pci_dev *pdev, ab_pci->ab = ab; ab_pci->pdev = pdev; ab->hif.ops = &ath11k_pci_hif_ops; + ab->fw_mode = ATH11K_FIRMWARE_MODE_NORMAL; pci_set_drvdata(pdev, ab); spin_lock_init(&ab_pci->window_lock); |