diff options
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89/reg.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/reg.h | 39 |
1 files changed, 36 insertions, 3 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 7a9ae6cd86e5..197fbb40922c 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -4727,6 +4727,11 @@ #define B_P0_RSTB_WATCH_DOG BIT(0) #define B_P1_RSTB_WATCH_DOG BIT(1) #define B_UPD_P0_EN BIT(31) +#define R_SPOOF_CG 0x00B4 +#define B_SPOOF_CG_EN BIT(17) +#define R_DFS_FFT_CG 0x00B8 +#define B_DFS_CG_EN BIT(1) +#define B_DFS_FFT_EN BIT(0) #define R_ANAPAR_PW15 0x030C #define B_ANAPAR_PW15 GENMASK(31, 24) #define B_ANAPAR_PW15_H GENMASK(27, 24) @@ -4789,6 +4794,8 @@ #define R_PHY_STS_BITMAP_HT 0x076C #define R_PHY_STS_BITMAP_VHT 0x0770 #define R_PHY_STS_BITMAP_HE 0x0774 +#define R_EDCCA_RPTREG_SEL_BE 0x078C +#define B_EDCCA_RPTREG_SEL_BE_MSK GENMASK(22, 20) #define R_PMAC_GNT 0x0980 #define B_PMAC_GNT_TXEN BIT(0) #define B_PMAC_GNT_RXEN BIT(16) @@ -4848,12 +4855,18 @@ #define B_IOQ_IQK_DPK_EN BIT(1) #define R_GNT_BT_WGT_EN 0x0C6C #define B_GNT_BT_WGT_EN BIT(21) +#define R_TX_COLLISION_T2R_ST 0x0C70 +#define B_TX_COLLISION_T2R_ST_M GENMASK(25, 20) +#define R_TXGATING 0x0C74 +#define B_TXGATING_EN BIT(4) #define R_PD_ARBITER_OFF 0x0C80 #define B_PD_ARBITER_OFF BIT(31) #define R_SNDCCA_A1 0x0C9C #define B_SNDCCA_A1_EN GENMASK(19, 12) #define R_SNDCCA_A2 0x0CA0 #define B_SNDCCA_A2_VAL GENMASK(19, 12) +#define R_TX_COLLISION_T2R_ST_BE 0x0CC8 +#define B_TX_COLLISION_T2R_ST_BE_M GENMASK(13, 8) #define R_RXHT_MCS_LIMIT 0x0D18 #define B_RXHT_MCS_LIMIT GENMASK(9, 8) #define R_RXVHT_MCS_LIMIT 0x0D18 @@ -4872,6 +4885,10 @@ #define R_BRK_ASYNC_RST_EN_1 0x0DC0 #define R_BRK_ASYNC_RST_EN_2 0x0DC4 #define R_BRK_ASYNC_RST_EN_3 0x0DC8 +#define R_CTLTOP 0x1008 +#define B_CTLTOP_ON BIT(23) +#define B_CTLTOP_VAL GENMASK(15, 12) +#define R_EDCCA_RPT_SEL_BE 0x10CC #define R_S0_HW_SI_DIS 0x1200 #define B_S0_HW_SI_DIS_W_R_TRIG GENMASK(30, 28) #define R_P0_RXCK 0x12A0 @@ -4903,6 +4920,14 @@ #define R_CFO_COMP_SEG0_H 0x1388 #define R_CFO_COMP_SEG0_CTRL 0x138C #define R_DBG32_D 0x1730 +#define R_EDCCA_RPT_A 0x1738 +#define R_EDCCA_RPT_B 0x173c +#define B_EDCCA_RPT_B_FB BIT(7) +#define B_EDCCA_RPT_B_P20 BIT(6) +#define B_EDCCA_RPT_B_S20 BIT(5) +#define B_EDCCA_RPT_B_S40 BIT(4) +#define B_EDCCA_RPT_B_S80 BIT(3) +#define B_EDCCA_RPT_B_PATH_MASK GENMASK(2, 1) #define R_SWSI_V1 0x174C #define B_SWSI_W_BUSY_V1 BIT(24) #define B_SWSI_R_BUSY_V1 BIT(25) @@ -4964,6 +4989,8 @@ #define R_S0_ADDCK 0x1E00 #define B_S0_ADDCK_I GENMASK(9, 0) #define B_S0_ADDCK_Q GENMASK(19, 10) +#define R_EDCCA_RPT_SEL 0x20CC +#define B_EDCCA_RPT_SEL_MSK GENMASK(2, 0) #define R_ADC_FIFO 0x20fc #define B_ADC_FIFO_RST GENMASK(31, 24) #define B_ADC_FIFO_RXK GENMASK(31, 16) @@ -5010,6 +5037,8 @@ #define B_DBCC_80P80_SEL_EVM_RPT2_EN BIT(0) #define R_P1_EN_SOUND_WO_NDP 0x2D7C #define B_P1_EN_SOUND_WO_NDP BIT(1) +#define R_EDCCA_RPT_A_BE 0x2E38 +#define R_EDCCA_RPT_B_BE 0x2E3C #define R_S1_HW_SI_DIS 0x3200 #define B_S1_HW_SI_DIS_W_R_TRIG GENMASK(30, 28) #define R_P1_RXCK 0x32A0 @@ -5218,9 +5247,9 @@ #define R_SEG0R_PD_V2 0x6A74 #define R_SEG0R_EDCCA_LVL 0x4840 #define R_SEG0R_EDCCA_LVL_V1 0x4884 -#define B_SEG0R_PPDU_LVL_MSK GENMASK(31, 24) -#define B_SEG0R_EDCCA_LVL_P_MSK GENMASK(15, 8) -#define B_SEG0R_EDCCA_LVL_A_MSK GENMASK(7, 0) +#define B_EDCCA_LVL_MSK3 GENMASK(31, 24) +#define B_EDCCA_LVL_MSK1 GENMASK(15, 8) +#define B_EDCCA_LVL_MSK0 GENMASK(7, 0) #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30) #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK BIT(29) #define B_SEG0R_PD_LOWER_BOUND_MSK GENMASK(10, 6) @@ -5476,6 +5505,10 @@ #define B_DCFO_WEIGHT_MSK_V1 GENMASK(31, 28) #define R_DCFO_OPT_V1 0x6260 #define B_DCFO_OPT_EN_V1 BIT(17) +#define R_SEG0R_EDCCA_LVL_BE 0x69EC +#define R_SEG0R_PPDU_LVL_BE 0x69F0 +#define R_SEGSND 0x6A14 +#define B_SEGSND_EN BIT(31) #define R_RPL_BIAS_COMP1 0x6DF0 #define B_RPL_BIAS_COMP1_MASK GENMASK(7, 0) #define R_P1_TSSI_ALIM1 0x7630 |