diff options
Diffstat (limited to 'drivers/pinctrl/samsung/pinctrl-exynos.c')
-rw-r--r-- | drivers/pinctrl/samsung/pinctrl-exynos.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index b9ea09fabf84..0cd7f33cdf25 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -58,13 +58,13 @@ static void exynos_irq_mask(struct irq_data *irqd) unsigned long mask; unsigned long flags; - spin_lock_irqsave(&bank->slock, flags); + raw_spin_lock_irqsave(&bank->slock, flags); mask = readl(bank->eint_base + reg_mask); mask |= 1 << irqd->hwirq; writel(mask, bank->eint_base + reg_mask); - spin_unlock_irqrestore(&bank->slock, flags); + raw_spin_unlock_irqrestore(&bank->slock, flags); } static void exynos_irq_ack(struct irq_data *irqd) @@ -97,13 +97,13 @@ static void exynos_irq_unmask(struct irq_data *irqd) if (irqd_get_trigger_type(irqd) & IRQ_TYPE_LEVEL_MASK) exynos_irq_ack(irqd); - spin_lock_irqsave(&bank->slock, flags); + raw_spin_lock_irqsave(&bank->slock, flags); mask = readl(bank->eint_base + reg_mask); mask &= ~(1 << irqd->hwirq); writel(mask, bank->eint_base + reg_mask); - spin_unlock_irqrestore(&bank->slock, flags); + raw_spin_unlock_irqrestore(&bank->slock, flags); } static int exynos_irq_set_type(struct irq_data *irqd, unsigned int type) @@ -169,14 +169,14 @@ static int exynos_irq_request_resources(struct irq_data *irqd) shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; - spin_lock_irqsave(&bank->slock, flags); + raw_spin_lock_irqsave(&bank->slock, flags); con = readl(bank->pctl_base + reg_con); con &= ~(mask << shift); con |= EXYNOS_PIN_FUNC_EINT << shift; writel(con, bank->pctl_base + reg_con); - spin_unlock_irqrestore(&bank->slock, flags); + raw_spin_unlock_irqrestore(&bank->slock, flags); return 0; } @@ -192,14 +192,14 @@ static void exynos_irq_release_resources(struct irq_data *irqd) shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; - spin_lock_irqsave(&bank->slock, flags); + raw_spin_lock_irqsave(&bank->slock, flags); con = readl(bank->pctl_base + reg_con); con &= ~(mask << shift); con |= EXYNOS_PIN_FUNC_INPUT << shift; writel(con, bank->pctl_base + reg_con); - spin_unlock_irqrestore(&bank->slock, flags); + raw_spin_unlock_irqrestore(&bank->slock, flags); gpiochip_unlock_as_irq(&bank->gpio_chip, irqd->hwirq); } |