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-rw-r--r--include/linux/mfd/altera-sysmgr.h29
-rw-r--r--include/linux/mfd/max77620.h5
-rw-r--r--include/linux/mfd/max77650.h59
-rw-r--r--include/linux/mfd/ti-lmu-register.h44
-rw-r--r--include/linux/mfd/ti-lmu.h1
5 files changed, 91 insertions, 47 deletions
diff --git a/include/linux/mfd/altera-sysmgr.h b/include/linux/mfd/altera-sysmgr.h
new file mode 100644
index 000000000000..b1ef11a83872
--- /dev/null
+++ b/include/linux/mfd/altera-sysmgr.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018-2019 Intel Corporation
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2012 Linaro Ltd.
+ */
+
+#ifndef __LINUX_MFD_ALTERA_SYSMGR_H__
+#define __LINUX_MFD_ALTERA_SYSMGR_H__
+
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/firmware/intel/stratix10-smc.h>
+
+struct device_node;
+
+#ifdef CONFIG_MFD_ALTERA_SYSMGR
+struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
+ const char *property);
+#else
+static inline struct regmap *
+altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
+ const char *property)
+{
+ return ERR_PTR(-ENOTSUPP);
+}
+#endif
+
+#endif /* __LINUX_MFD_ALTERA_SYSMGR_H__ */
diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
index ad2a9a852aea..82407fe85ca2 100644
--- a/include/linux/mfd/max77620.h
+++ b/include/linux/mfd/max77620.h
@@ -136,8 +136,8 @@
#define MAX77620_FPS_PERIOD_MIN_US 40
#define MAX20024_FPS_PERIOD_MIN_US 20
-#define MAX77620_FPS_PERIOD_MAX_US 2560
-#define MAX20024_FPS_PERIOD_MAX_US 5120
+#define MAX20024_FPS_PERIOD_MAX_US 2560
+#define MAX77620_FPS_PERIOD_MAX_US 5120
#define MAX77620_REG_FPS_GPIO1 0x54
#define MAX77620_REG_FPS_GPIO2 0x55
@@ -324,6 +324,7 @@ enum max77620_fps_src {
enum max77620_chip_id {
MAX77620,
MAX20024,
+ MAX77663,
};
struct max77620_chip {
diff --git a/include/linux/mfd/max77650.h b/include/linux/mfd/max77650.h
new file mode 100644
index 000000000000..c809e211a8cd
--- /dev/null
+++ b/include/linux/mfd/max77650.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 BayLibre SAS
+ * Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
+ *
+ * Common definitions for MAXIM 77650/77651 charger/power-supply.
+ */
+
+#ifndef MAX77650_H
+#define MAX77650_H
+
+#include <linux/bits.h>
+
+#define MAX77650_REG_INT_GLBL 0x00
+#define MAX77650_REG_INT_CHG 0x01
+#define MAX77650_REG_STAT_CHG_A 0x02
+#define MAX77650_REG_STAT_CHG_B 0x03
+#define MAX77650_REG_ERCFLAG 0x04
+#define MAX77650_REG_STAT_GLBL 0x05
+#define MAX77650_REG_INTM_GLBL 0x06
+#define MAX77650_REG_INTM_CHG 0x07
+#define MAX77650_REG_CNFG_GLBL 0x10
+#define MAX77650_REG_CID 0x11
+#define MAX77650_REG_CNFG_GPIO 0x12
+#define MAX77650_REG_CNFG_CHG_A 0x18
+#define MAX77650_REG_CNFG_CHG_B 0x19
+#define MAX77650_REG_CNFG_CHG_C 0x1a
+#define MAX77650_REG_CNFG_CHG_D 0x1b
+#define MAX77650_REG_CNFG_CHG_E 0x1c
+#define MAX77650_REG_CNFG_CHG_F 0x1d
+#define MAX77650_REG_CNFG_CHG_G 0x1e
+#define MAX77650_REG_CNFG_CHG_H 0x1f
+#define MAX77650_REG_CNFG_CHG_I 0x20
+#define MAX77650_REG_CNFG_SBB_TOP 0x28
+#define MAX77650_REG_CNFG_SBB0_A 0x29
+#define MAX77650_REG_CNFG_SBB0_B 0x2a
+#define MAX77650_REG_CNFG_SBB1_A 0x2b
+#define MAX77650_REG_CNFG_SBB1_B 0x2c
+#define MAX77650_REG_CNFG_SBB2_A 0x2d
+#define MAX77650_REG_CNFG_SBB2_B 0x2e
+#define MAX77650_REG_CNFG_LDO_A 0x38
+#define MAX77650_REG_CNFG_LDO_B 0x39
+#define MAX77650_REG_CNFG_LED0_A 0x40
+#define MAX77650_REG_CNFG_LED1_A 0x41
+#define MAX77650_REG_CNFG_LED2_A 0x42
+#define MAX77650_REG_CNFG_LED0_B 0x43
+#define MAX77650_REG_CNFG_LED1_B 0x44
+#define MAX77650_REG_CNFG_LED2_B 0x45
+#define MAX77650_REG_CNFG_LED_TOP 0x46
+
+#define MAX77650_CID_MASK GENMASK(3, 0)
+#define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK)
+
+#define MAX77650_CID_77650A 0x03
+#define MAX77650_CID_77650C 0x0a
+#define MAX77650_CID_77651A 0x06
+#define MAX77650_CID_77651B 0x08
+
+#endif /* MAX77650_H */
diff --git a/include/linux/mfd/ti-lmu-register.h b/include/linux/mfd/ti-lmu-register.h
index 2125c7c02818..f09510561a55 100644
--- a/include/linux/mfd/ti-lmu-register.h
+++ b/include/linux/mfd/ti-lmu-register.h
@@ -15,50 +15,6 @@
#include <linux/bitops.h>
-/* LM3532 */
-#define LM3532_REG_OUTPUT_CFG 0x10
-#define LM3532_ILED1_CFG_MASK 0x03
-#define LM3532_ILED2_CFG_MASK 0x0C
-#define LM3532_ILED3_CFG_MASK 0x30
-#define LM3532_ILED1_CFG_SHIFT 0
-#define LM3532_ILED2_CFG_SHIFT 2
-#define LM3532_ILED3_CFG_SHIFT 4
-
-#define LM3532_REG_RAMPUP 0x12
-#define LM3532_REG_RAMPDN LM3532_REG_RAMPUP
-#define LM3532_RAMPUP_MASK 0x07
-#define LM3532_RAMPUP_SHIFT 0
-#define LM3532_RAMPDN_MASK 0x38
-#define LM3532_RAMPDN_SHIFT 3
-
-#define LM3532_REG_ENABLE 0x1D
-
-#define LM3532_REG_PWM_A_CFG 0x13
-#define LM3532_PWM_A_MASK 0x05 /* zone 0 */
-#define LM3532_PWM_ZONE_0 BIT(2)
-
-#define LM3532_REG_PWM_B_CFG 0x14
-#define LM3532_PWM_B_MASK 0x09 /* zone 1 */
-#define LM3532_PWM_ZONE_1 BIT(3)
-
-#define LM3532_REG_PWM_C_CFG 0x15
-#define LM3532_PWM_C_MASK 0x11 /* zone 2 */
-#define LM3532_PWM_ZONE_2 BIT(4)
-
-#define LM3532_REG_ZONE_CFG_A 0x16
-#define LM3532_REG_ZONE_CFG_B 0x18
-#define LM3532_REG_ZONE_CFG_C 0x1A
-#define LM3532_ZONE_MASK (BIT(2) | BIT(3) | BIT(4))
-#define LM3532_ZONE_0 0
-#define LM3532_ZONE_1 BIT(2)
-#define LM3532_ZONE_2 BIT(3)
-
-#define LM3532_REG_BRT_A 0x70 /* zone 0 */
-#define LM3532_REG_BRT_B 0x76 /* zone 1 */
-#define LM3532_REG_BRT_C 0x7C /* zone 2 */
-
-#define LM3532_MAX_REG 0x7E
-
/* LM3631 */
#define LM3631_REG_DEVCTRL 0x00
#define LM3631_LCD_EN_MASK BIT(1)
diff --git a/include/linux/mfd/ti-lmu.h b/include/linux/mfd/ti-lmu.h
index 1ef51ed36be5..7762c1bce55d 100644
--- a/include/linux/mfd/ti-lmu.h
+++ b/include/linux/mfd/ti-lmu.h
@@ -22,7 +22,6 @@
#define LMU_EVENT_MONITOR_DONE 0x01
enum ti_lmu_id {
- LM3532,
LM3631,
LM3632,
LM3633,