diff options
Diffstat (limited to 'sound/soc/fsl/fsl_asrc.c')
| -rw-r--r-- | sound/soc/fsl/fsl_asrc.c | 368 |
1 files changed, 197 insertions, 171 deletions
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 0dcebc24c312..95f6a9617b0b 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -21,10 +21,10 @@ #define IDEAL_RATIO_DECIMAL_DEPTH 26 #define pair_err(fmt, ...) \ - dev_err(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) + dev_err(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) #define pair_dbg(fmt, ...) \ - dev_dbg(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) + dev_dbg(&asrc->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__) /* Corresponding to process_option */ static unsigned int supported_asrc_rate[] = { @@ -154,18 +154,18 @@ static void fsl_asrc_sel_proc(int inrate, int outrate, * within range [ANCA, ANCA+ANCB-1], depends on the channels of pair A * while pair A and pair C are comparatively independent. */ -int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) +static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) { enum asrc_pair_index index = ASRC_INVALID_PAIR; - struct fsl_asrc *asrc_priv = pair->asrc_priv; - struct device *dev = &asrc_priv->pdev->dev; + struct fsl_asrc *asrc = pair->asrc; + struct device *dev = &asrc->pdev->dev; unsigned long lock_flags; int i, ret = 0; - spin_lock_irqsave(&asrc_priv->lock, lock_flags); + spin_lock_irqsave(&asrc->lock, lock_flags); for (i = ASRC_PAIR_A; i < ASRC_PAIR_MAX_NUM; i++) { - if (asrc_priv->pair[i] != NULL) + if (asrc->pair[i] != NULL) continue; index = i; @@ -177,17 +177,17 @@ int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) if (index == ASRC_INVALID_PAIR) { dev_err(dev, "all pairs are busy now\n"); ret = -EBUSY; - } else if (asrc_priv->channel_avail < channels) { + } else if (asrc->channel_avail < channels) { dev_err(dev, "can't afford required channels: %d\n", channels); ret = -EINVAL; } else { - asrc_priv->channel_avail -= channels; - asrc_priv->pair[index] = pair; + asrc->channel_avail -= channels; + asrc->pair[index] = pair; pair->channels = channels; pair->index = index; } - spin_unlock_irqrestore(&asrc_priv->lock, lock_flags); + spin_unlock_irqrestore(&asrc->lock, lock_flags); return ret; } @@ -195,25 +195,25 @@ int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair) /** * Release ASRC pair * - * It clears the resource from asrc_priv and releases the occupied channels. + * It clears the resource from asrc and releases the occupied channels. */ -void fsl_asrc_release_pair(struct fsl_asrc_pair *pair) +static void fsl_asrc_release_pair(struct fsl_asrc_pair *pair) { - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc *asrc = pair->asrc; enum asrc_pair_index index = pair->index; unsigned long lock_flags; /* Make sure the pair is disabled */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEi_MASK(index), 0); - spin_lock_irqsave(&asrc_priv->lock, lock_flags); + spin_lock_irqsave(&asrc->lock, lock_flags); - asrc_priv->channel_avail += pair->channels; - asrc_priv->pair[index] = NULL; + asrc->channel_avail += pair->channels; + asrc->pair[index] = NULL; pair->error = 0; - spin_unlock_irqrestore(&asrc_priv->lock, lock_flags); + spin_unlock_irqrestore(&asrc->lock, lock_flags); } /** @@ -221,10 +221,10 @@ void fsl_asrc_release_pair(struct fsl_asrc_pair *pair) */ static void fsl_asrc_set_watermarks(struct fsl_asrc_pair *pair, u32 in, u32 out) { - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc *asrc = pair->asrc; enum asrc_pair_index index = pair->index; - regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index), + regmap_update_bits(asrc->regmap, REG_ASRMCR(index), ASRMCRi_EXTTHRSHi_MASK | ASRMCRi_INFIFO_THRESHOLD_MASK | ASRMCRi_OUTFIFO_THRESHOLD_MASK, @@ -257,7 +257,7 @@ static u32 fsl_asrc_cal_asrck_divisor(struct fsl_asrc_pair *pair, u32 div) static int fsl_asrc_set_ideal_ratio(struct fsl_asrc_pair *pair, int inrate, int outrate) { - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc *asrc = pair->asrc; enum asrc_pair_index index = pair->index; unsigned long ratio; int i; @@ -286,8 +286,8 @@ static int fsl_asrc_set_ideal_ratio(struct fsl_asrc_pair *pair, break; } - regmap_write(asrc_priv->regmap, REG_ASRIDRL(index), ratio); - regmap_write(asrc_priv->regmap, REG_ASRIDRH(index), ratio >> 24); + regmap_write(asrc->regmap, REG_ASRIDRL(index), ratio); + regmap_write(asrc->regmap, REG_ASRIDRH(index), ratio >> 24); return 0; } @@ -308,8 +308,10 @@ static int fsl_asrc_set_ideal_ratio(struct fsl_asrc_pair *pair, */ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) { - struct asrc_config *config = pair->config; - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc_pair_priv *pair_priv = pair->private; + struct asrc_config *config = pair_priv->config; + struct fsl_asrc *asrc = pair->asrc; + struct fsl_asrc_priv *asrc_priv = asrc->private; enum asrc_pair_index index = pair->index; enum asrc_word_width input_word_width; enum asrc_word_width output_word_width; @@ -441,18 +443,18 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) channels /= 2; /* Update channels for current pair */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCNCR, + regmap_update_bits(asrc->regmap, REG_ASRCNCR, ASRCNCR_ANCi_MASK(index, asrc_priv->soc->channel_bits), ASRCNCR_ANCi(index, channels, asrc_priv->soc->channel_bits)); /* Default setting: Automatic selection for processing mode */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_ATSi_MASK(index), ASRCTR_ATS(index)); - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_USRi_MASK(index), 0); /* Set the input and output clock sources */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCSR, + regmap_update_bits(asrc->regmap, REG_ASRCSR, ASRCSR_AICSi_MASK(index) | ASRCSR_AOCSi_MASK(index), ASRCSR_AICS(index, clk_index[IN]) | ASRCSR_AOCS(index, clk_index[OUT])); @@ -462,19 +464,19 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) outdiv = fsl_asrc_cal_asrck_divisor(pair, div[OUT]); /* Suppose indiv and outdiv includes prescaler, so add its MASK too */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCDR(index), + regmap_update_bits(asrc->regmap, REG_ASRCDR(index), ASRCDRi_AOCPi_MASK(index) | ASRCDRi_AICPi_MASK(index) | ASRCDRi_AOCDi_MASK(index) | ASRCDRi_AICDi_MASK(index), ASRCDRi_AOCP(index, outdiv) | ASRCDRi_AICP(index, indiv)); /* Implement word_width configurations */ - regmap_update_bits(asrc_priv->regmap, REG_ASRMCR1(index), + regmap_update_bits(asrc->regmap, REG_ASRMCR1(index), ASRMCR1i_OW16_MASK | ASRMCR1i_IWD_MASK, ASRMCR1i_OW16(output_word_width) | ASRMCR1i_IWD(input_word_width)); /* Enable BUFFER STALL */ - regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index), + regmap_update_bits(asrc->regmap, REG_ASRMCR(index), ASRMCRi_BUFSTALLi_MASK, ASRMCRi_BUFSTALLi); /* Set default thresholds for input and output FIFO */ @@ -486,18 +488,18 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) return 0; /* Clear ASTSx bit to use Ideal Ratio mode */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_ATSi_MASK(index), 0); /* Enable Ideal Ratio mode */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_IDRi_MASK(index) | ASRCTR_USRi_MASK(index), ASRCTR_IDR(index) | ASRCTR_USR(index)); fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc); /* Apply configurations for pre- and post-processing */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, + regmap_update_bits(asrc->regmap, REG_ASRCFG, ASRCFG_PREMODi_MASK(index) | ASRCFG_POSTMODi_MASK(index), ASRCFG_PREMOD(index, pre_proc) | ASRCFG_POSTMOD(index, post_proc)); @@ -512,28 +514,28 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair, bool use_ideal_rate) */ static void fsl_asrc_start_pair(struct fsl_asrc_pair *pair) { - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc *asrc = pair->asrc; enum asrc_pair_index index = pair->index; int reg, retry = 10, i; /* Enable the current pair */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEi_MASK(index), ASRCTR_ASRCE(index)); /* Wait for status of initialization */ do { udelay(5); - regmap_read(asrc_priv->regmap, REG_ASRCFG, ®); + regmap_read(asrc->regmap, REG_ASRCFG, ®); reg &= ASRCFG_INIRQi_MASK(index); } while (!reg && --retry); /* Make the input fifo to ASRC STALL level */ - regmap_read(asrc_priv->regmap, REG_ASRCNCR, ®); + regmap_read(asrc->regmap, REG_ASRCNCR, ®); for (i = 0; i < pair->channels * 4; i++) - regmap_write(asrc_priv->regmap, REG_ASRDI(index), 0); + regmap_write(asrc->regmap, REG_ASRDI(index), 0); /* Enable overload interrupt */ - regmap_write(asrc_priv->regmap, REG_ASRIER, ASRIER_AOLIE); + regmap_write(asrc->regmap, REG_ASRIER, ASRIER_AOLIE); } /** @@ -541,33 +543,34 @@ static void fsl_asrc_start_pair(struct fsl_asrc_pair *pair) */ static void fsl_asrc_stop_pair(struct fsl_asrc_pair *pair) { - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc *asrc = pair->asrc; enum asrc_pair_index index = pair->index; /* Stop the current pair */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, + regmap_update_bits(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEi_MASK(index), 0); } /** * Get DMA channel according to the pair and direction. */ -struct dma_chan *fsl_asrc_get_dma_channel(struct fsl_asrc_pair *pair, bool dir) +static struct dma_chan *fsl_asrc_get_dma_channel(struct fsl_asrc_pair *pair, + bool dir) { - struct fsl_asrc *asrc_priv = pair->asrc_priv; + struct fsl_asrc *asrc = pair->asrc; enum asrc_pair_index index = pair->index; char name[4]; sprintf(name, "%cx%c", dir == IN ? 'r' : 't', index + 'a'); - return dma_request_slave_channel(&asrc_priv->pdev->dev, name); + return dma_request_slave_channel(&asrc->pdev->dev, name); } -EXPORT_SYMBOL_GPL(fsl_asrc_get_dma_channel); static int fsl_asrc_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai); + struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai); + struct fsl_asrc_priv *asrc_priv = asrc->private; /* Odd channel number is not valid for older ASRC (channel_bits==3) */ if (asrc_priv->soc->channel_bits == 3) @@ -583,13 +586,13 @@ static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { - struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai); + struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai); struct snd_pcm_runtime *runtime = substream->runtime; struct fsl_asrc_pair *pair = runtime->private_data; + struct fsl_asrc_pair_priv *pair_priv = pair->private; unsigned int channels = params_channels(params); unsigned int rate = params_rate(params); struct asrc_config config; - snd_pcm_format_t format; int ret; ret = fsl_asrc_request_pair(channels, pair); @@ -598,12 +601,7 @@ static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, return ret; } - pair->config = &config; - - if (asrc_priv->asrc_width == 16) - format = SNDRV_PCM_FORMAT_S16_LE; - else - format = SNDRV_PCM_FORMAT_S24_LE; + pair_priv->config = &config; config.pair = pair->index; config.channel_num = channels; @@ -612,13 +610,13 @@ static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { config.input_format = params_format(params); - config.output_format = format; + config.output_format = asrc->asrc_format; config.input_sample_rate = rate; - config.output_sample_rate = asrc_priv->asrc_rate; + config.output_sample_rate = asrc->asrc_rate; } else { - config.input_format = format; + config.input_format = asrc->asrc_format; config.output_format = params_format(params); - config.input_sample_rate = asrc_priv->asrc_rate; + config.input_sample_rate = asrc->asrc_rate; config.output_sample_rate = rate; } @@ -676,10 +674,10 @@ static const struct snd_soc_dai_ops fsl_asrc_dai_ops = { static int fsl_asrc_dai_probe(struct snd_soc_dai *dai) { - struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai); + struct fsl_asrc *asrc = snd_soc_dai_get_drvdata(dai); - snd_soc_dai_init_dma_data(dai, &asrc_priv->dma_params_tx, - &asrc_priv->dma_params_rx); + snd_soc_dai_init_dma_data(dai, &asrc->dma_params_tx, + &asrc->dma_params_rx); return 0; } @@ -858,30 +856,35 @@ static const struct regmap_config fsl_asrc_regmap_config = { /** * Initialize ASRC registers with a default configurations */ -static int fsl_asrc_init(struct fsl_asrc *asrc_priv) +static int fsl_asrc_init(struct fsl_asrc *asrc) { + unsigned long ipg_rate; + /* Halt ASRC internal FP when input FIFO needs data for pair A, B, C */ - regmap_write(asrc_priv->regmap, REG_ASRCTR, ASRCTR_ASRCEN); + regmap_write(asrc->regmap, REG_ASRCTR, ASRCTR_ASRCEN); /* Disable interrupt by default */ - regmap_write(asrc_priv->regmap, REG_ASRIER, 0x0); + regmap_write(asrc->regmap, REG_ASRIER, 0x0); /* Apply recommended settings for parameters from Reference Manual */ - regmap_write(asrc_priv->regmap, REG_ASRPM1, 0x7fffff); - regmap_write(asrc_priv->regmap, REG_ASRPM2, 0x255555); - regmap_write(asrc_priv->regmap, REG_ASRPM3, 0xff7280); - regmap_write(asrc_priv->regmap, REG_ASRPM4, 0xff7280); - regmap_write(asrc_priv->regmap, REG_ASRPM5, 0xff7280); + regmap_write(asrc->regmap, REG_ASRPM1, 0x7fffff); + regmap_write(asrc->regmap, REG_ASRPM2, 0x255555); + regmap_write(asrc->regmap, REG_ASRPM3, 0xff7280); + regmap_write(asrc->regmap, REG_ASRPM4, 0xff7280); + regmap_write(asrc->regmap, REG_ASRPM5, 0xff7280); /* Base address for task queue FIFO. Set to 0x7C */ - regmap_update_bits(asrc_priv->regmap, REG_ASRTFR1, + regmap_update_bits(asrc->regmap, REG_ASRTFR1, ASRTFR1_TF_BASE_MASK, ASRTFR1_TF_BASE(0xfc)); - /* Set the processing clock for 76KHz to 133M */ - regmap_write(asrc_priv->regmap, REG_ASR76K, 0x06D6); - - /* Set the processing clock for 56KHz to 133M */ - return regmap_write(asrc_priv->regmap, REG_ASR56K, 0x0947); + /* + * Set the period of the 76KHz and 56KHz sampling clocks based on + * the ASRC processing clock. + * On iMX6, ipg_clk = 133MHz, REG_ASR76K = 0x06D6, REG_ASR56K = 0x0947 + */ + ipg_rate = clk_get_rate(asrc->ipg_clk); + regmap_write(asrc->regmap, REG_ASR76K, ipg_rate / 76000); + return regmap_write(asrc->regmap, REG_ASR56K, ipg_rate / 56000); } /** @@ -889,15 +892,15 @@ static int fsl_asrc_init(struct fsl_asrc *asrc_priv) */ static irqreturn_t fsl_asrc_isr(int irq, void *dev_id) { - struct fsl_asrc *asrc_priv = (struct fsl_asrc *)dev_id; - struct device *dev = &asrc_priv->pdev->dev; + struct fsl_asrc *asrc = (struct fsl_asrc *)dev_id; + struct device *dev = &asrc->pdev->dev; enum asrc_pair_index index; u32 status; - regmap_read(asrc_priv->regmap, REG_ASRSTR, &status); + regmap_read(asrc->regmap, REG_ASRSTR, &status); /* Clean overload error */ - regmap_write(asrc_priv->regmap, REG_ASRSTR, ASRSTR_AOLE); + regmap_write(asrc->regmap, REG_ASRSTR, ASRSTR_AOLE); /* * We here use dev_dbg() for all exceptions because ASRC itself does @@ -905,31 +908,31 @@ static irqreturn_t fsl_asrc_isr(int irq, void *dev_id) * interrupt would result a ridged conversion. */ for (index = ASRC_PAIR_A; index < ASRC_PAIR_MAX_NUM; index++) { - if (!asrc_priv->pair[index]) + if (!asrc->pair[index]) continue; if (status & ASRSTR_ATQOL) { - asrc_priv->pair[index]->error |= ASRC_TASK_Q_OVERLOAD; + asrc->pair[index]->error |= ASRC_TASK_Q_OVERLOAD; dev_dbg(dev, "ASRC Task Queue FIFO overload\n"); } if (status & ASRSTR_AOOL(index)) { - asrc_priv->pair[index]->error |= ASRC_OUTPUT_TASK_OVERLOAD; + asrc->pair[index]->error |= ASRC_OUTPUT_TASK_OVERLOAD; pair_dbg("Output Task Overload\n"); } if (status & ASRSTR_AIOL(index)) { - asrc_priv->pair[index]->error |= ASRC_INPUT_TASK_OVERLOAD; + asrc->pair[index]->error |= ASRC_INPUT_TASK_OVERLOAD; pair_dbg("Input Task Overload\n"); } if (status & ASRSTR_AODO(index)) { - asrc_priv->pair[index]->error |= ASRC_OUTPUT_BUFFER_OVERFLOW; + asrc->pair[index]->error |= ASRC_OUTPUT_BUFFER_OVERFLOW; pair_dbg("Output Data Buffer has overflowed\n"); } if (status & ASRSTR_AIDU(index)) { - asrc_priv->pair[index]->error |= ASRC_INPUT_BUFFER_UNDERRUN; + asrc->pair[index]->error |= ASRC_INPUT_BUFFER_UNDERRUN; pair_dbg("Input Data Buffer has underflowed\n"); } } @@ -937,21 +940,33 @@ static irqreturn_t fsl_asrc_isr(int irq, void *dev_id) return IRQ_HANDLED; } +static int fsl_asrc_get_fifo_addr(u8 dir, enum asrc_pair_index index) +{ + return REG_ASRDx(dir, index); +} + static int fsl_asrc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct fsl_asrc *asrc_priv; + struct fsl_asrc_priv *asrc_priv; + struct fsl_asrc *asrc; struct resource *res; void __iomem *regs; int irq, ret, i; u32 map_idx; char tmp[16]; + u32 width; + + asrc = devm_kzalloc(&pdev->dev, sizeof(*asrc), GFP_KERNEL); + if (!asrc) + return -ENOMEM; asrc_priv = devm_kzalloc(&pdev->dev, sizeof(*asrc_priv), GFP_KERNEL); if (!asrc_priv) return -ENOMEM; - asrc_priv->pdev = pdev; + asrc->pdev = pdev; + asrc->private = asrc_priv; /* Get the addresses and IRQ */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -959,13 +974,13 @@ static int fsl_asrc_probe(struct platform_device *pdev) if (IS_ERR(regs)) return PTR_ERR(regs); - asrc_priv->paddr = res->start; + asrc->paddr = res->start; - asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs, - &fsl_asrc_regmap_config); - if (IS_ERR(asrc_priv->regmap)) { + asrc->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs, + &fsl_asrc_regmap_config); + if (IS_ERR(asrc->regmap)) { dev_err(&pdev->dev, "failed to init regmap\n"); - return PTR_ERR(asrc_priv->regmap); + return PTR_ERR(asrc->regmap); } irq = platform_get_irq(pdev, 0); @@ -973,26 +988,26 @@ static int fsl_asrc_probe(struct platform_device *pdev) return irq; ret = devm_request_irq(&pdev->dev, irq, fsl_asrc_isr, 0, - dev_name(&pdev->dev), asrc_priv); + dev_name(&pdev->dev), asrc); if (ret) { dev_err(&pdev->dev, "failed to claim irq %u: %d\n", irq, ret); return ret; } - asrc_priv->mem_clk = devm_clk_get(&pdev->dev, "mem"); - if (IS_ERR(asrc_priv->mem_clk)) { + asrc->mem_clk = devm_clk_get(&pdev->dev, "mem"); + if (IS_ERR(asrc->mem_clk)) { dev_err(&pdev->dev, "failed to get mem clock\n"); - return PTR_ERR(asrc_priv->mem_clk); + return PTR_ERR(asrc->mem_clk); } - asrc_priv->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); - if (IS_ERR(asrc_priv->ipg_clk)) { + asrc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); + if (IS_ERR(asrc->ipg_clk)) { dev_err(&pdev->dev, "failed to get ipg clock\n"); - return PTR_ERR(asrc_priv->ipg_clk); + return PTR_ERR(asrc->ipg_clk); } - asrc_priv->spba_clk = devm_clk_get(&pdev->dev, "spba"); - if (IS_ERR(asrc_priv->spba_clk)) + asrc->spba_clk = devm_clk_get(&pdev->dev, "spba"); + if (IS_ERR(asrc->spba_clk)) dev_warn(&pdev->dev, "failed to get spba clock\n"); for (i = 0; i < ASRC_CLK_MAX_NUM; i++) { @@ -1010,6 +1025,13 @@ static int fsl_asrc_probe(struct platform_device *pdev) return -ENODEV; } + asrc->use_edma = asrc_priv->soc->use_edma; + asrc->get_dma_channel = fsl_asrc_get_dma_channel; + asrc->request_pair = fsl_asrc_request_pair; + asrc->release_pair = fsl_asrc_release_pair; + asrc->get_fifo_addr = fsl_asrc_get_fifo_addr; + asrc->pair_priv_size = sizeof(struct fsl_asrc_pair_priv); + if (of_device_is_compatible(np, "fsl,imx35-asrc")) { asrc_priv->clk_map[IN] = input_clk_map_imx35; asrc_priv->clk_map[OUT] = output_clk_map_imx35; @@ -1037,36 +1059,53 @@ static int fsl_asrc_probe(struct platform_device *pdev) } } - ret = fsl_asrc_init(asrc_priv); + ret = fsl_asrc_init(asrc); if (ret) { dev_err(&pdev->dev, "failed to init asrc %d\n", ret); return ret; } - asrc_priv->channel_avail = 10; + asrc->channel_avail = 10; ret = of_property_read_u32(np, "fsl,asrc-rate", - &asrc_priv->asrc_rate); + &asrc->asrc_rate); if (ret) { dev_err(&pdev->dev, "failed to get output rate\n"); return ret; } - ret = of_property_read_u32(np, "fsl,asrc-width", - &asrc_priv->asrc_width); + ret = of_property_read_u32(np, "fsl,asrc-format", &asrc->asrc_format); if (ret) { - dev_err(&pdev->dev, "failed to get output width\n"); - return ret; + ret = of_property_read_u32(np, "fsl,asrc-width", &width); + if (ret) { + dev_err(&pdev->dev, "failed to decide output format\n"); + return ret; + } + + switch (width) { + case 16: + asrc->asrc_format = SNDRV_PCM_FORMAT_S16_LE; + break; + case 24: + asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE; + break; + default: + dev_warn(&pdev->dev, + "unsupported width, use default S24_LE\n"); + asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE; + break; + } } - if (asrc_priv->asrc_width != 16 && asrc_priv->asrc_width != 24) { - dev_warn(&pdev->dev, "unsupported width, switching to 24bit\n"); - asrc_priv->asrc_width = 24; + if (!(FSL_ASRC_FORMATS & (1ULL << asrc->asrc_format))) { + dev_warn(&pdev->dev, "unsupported width, use default S24_LE\n"); + asrc->asrc_format = SNDRV_PCM_FORMAT_S24_LE; } - platform_set_drvdata(pdev, asrc_priv); + platform_set_drvdata(pdev, asrc); pm_runtime_enable(&pdev->dev); - spin_lock_init(&asrc_priv->lock); + spin_lock_init(&asrc->lock); + regcache_cache_only(asrc->regmap, true); ret = devm_snd_soc_register_component(&pdev->dev, &fsl_asrc_component, &fsl_asrc_dai, 1); @@ -1081,17 +1120,19 @@ static int fsl_asrc_probe(struct platform_device *pdev) #ifdef CONFIG_PM static int fsl_asrc_runtime_resume(struct device *dev) { - struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); + struct fsl_asrc *asrc = dev_get_drvdata(dev); + struct fsl_asrc_priv *asrc_priv = asrc->private; int i, ret; + u32 asrctr; - ret = clk_prepare_enable(asrc_priv->mem_clk); + ret = clk_prepare_enable(asrc->mem_clk); if (ret) return ret; - ret = clk_prepare_enable(asrc_priv->ipg_clk); + ret = clk_prepare_enable(asrc->ipg_clk); if (ret) goto disable_mem_clk; - if (!IS_ERR(asrc_priv->spba_clk)) { - ret = clk_prepare_enable(asrc_priv->spba_clk); + if (!IS_ERR(asrc->spba_clk)) { + ret = clk_prepare_enable(asrc->spba_clk); if (ret) goto disable_ipg_clk; } @@ -1101,79 +1142,64 @@ static int fsl_asrc_runtime_resume(struct device *dev) goto disable_asrck_clk; } + /* Stop all pairs provisionally */ + regmap_read(asrc->regmap, REG_ASRCTR, &asrctr); + regmap_update_bits(asrc->regmap, REG_ASRCTR, + ASRCTR_ASRCEi_ALL_MASK, 0); + + /* Restore all registers */ + regcache_cache_only(asrc->regmap, false); + regcache_mark_dirty(asrc->regmap); + regcache_sync(asrc->regmap); + + regmap_update_bits(asrc->regmap, REG_ASRCFG, + ASRCFG_NDPRi_ALL_MASK | ASRCFG_POSTMODi_ALL_MASK | + ASRCFG_PREMODi_ALL_MASK, asrc_priv->regcache_cfg); + + /* Restart enabled pairs */ + regmap_update_bits(asrc->regmap, REG_ASRCTR, + ASRCTR_ASRCEi_ALL_MASK, asrctr); + return 0; disable_asrck_clk: for (i--; i >= 0; i--) clk_disable_unprepare(asrc_priv->asrck_clk[i]); - if (!IS_ERR(asrc_priv->spba_clk)) - clk_disable_unprepare(asrc_priv->spba_clk); + if (!IS_ERR(asrc->spba_clk)) + clk_disable_unprepare(asrc->spba_clk); disable_ipg_clk: - clk_disable_unprepare(asrc_priv->ipg_clk); + clk_disable_unprepare(asrc->ipg_clk); disable_mem_clk: - clk_disable_unprepare(asrc_priv->mem_clk); + clk_disable_unprepare(asrc->mem_clk); return ret; } static int fsl_asrc_runtime_suspend(struct device *dev) { - struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); + struct fsl_asrc *asrc = dev_get_drvdata(dev); + struct fsl_asrc_priv *asrc_priv = asrc->private; int i; - for (i = 0; i < ASRC_CLK_MAX_NUM; i++) - clk_disable_unprepare(asrc_priv->asrck_clk[i]); - if (!IS_ERR(asrc_priv->spba_clk)) - clk_disable_unprepare(asrc_priv->spba_clk); - clk_disable_unprepare(asrc_priv->ipg_clk); - clk_disable_unprepare(asrc_priv->mem_clk); - - return 0; -} -#endif /* CONFIG_PM */ - -#ifdef CONFIG_PM_SLEEP -static int fsl_asrc_suspend(struct device *dev) -{ - struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); - - regmap_read(asrc_priv->regmap, REG_ASRCFG, + regmap_read(asrc->regmap, REG_ASRCFG, &asrc_priv->regcache_cfg); - regcache_cache_only(asrc_priv->regmap, true); - regcache_mark_dirty(asrc_priv->regmap); - - return 0; -} - -static int fsl_asrc_resume(struct device *dev) -{ - struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); - u32 asrctr; - - /* Stop all pairs provisionally */ - regmap_read(asrc_priv->regmap, REG_ASRCTR, &asrctr); - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, - ASRCTR_ASRCEi_ALL_MASK, 0); - - /* Restore all registers */ - regcache_cache_only(asrc_priv->regmap, false); - regcache_sync(asrc_priv->regmap); + regcache_cache_only(asrc->regmap, true); - regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, - ASRCFG_NDPRi_ALL_MASK | ASRCFG_POSTMODi_ALL_MASK | - ASRCFG_PREMODi_ALL_MASK, asrc_priv->regcache_cfg); - - /* Restart enabled pairs */ - regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, - ASRCTR_ASRCEi_ALL_MASK, asrctr); + for (i = 0; i < ASRC_CLK_MAX_NUM; i++) + clk_disable_unprepare(asrc_priv->asrck_clk[i]); + if (!IS_ERR(asrc->spba_clk)) + clk_disable_unprepare(asrc->spba_clk); + clk_disable_unprepare(asrc->ipg_clk); + clk_disable_unprepare(asrc->mem_clk); return 0; } -#endif /* CONFIG_PM_SLEEP */ +#endif /* CONFIG_PM */ static const struct dev_pm_ops fsl_asrc_pm = { SET_RUNTIME_PM_OPS(fsl_asrc_runtime_suspend, fsl_asrc_runtime_resume, NULL) - SET_SYSTEM_SLEEP_PM_OPS(fsl_asrc_suspend, fsl_asrc_resume) + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) }; static const struct fsl_asrc_soc_data fsl_asrc_imx35_data = { |