diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json | 6568 |
1 files changed, 2946 insertions, 3622 deletions
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json index 495ceee21071..fd253e3276df 100644 --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-other.json @@ -1,5141 +1,4465 @@ [ { - "BriefDescription": "UPI Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "CHA Clockticks", "EventCode": "0x01", - "EventName": "UNC_UPI_CLOCKTICKS", + "EventName": "UNC_CHA_CLOCKTICKS", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Number of CHA clock cycles while the event is enabled", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : All Data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_CHA_CMS_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x000000000f", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "Unit": "CHA" }, { - "BriefDescription": "IRP Clockticks", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x01", - "EventName": "UNC_I_CLOCKTICKS", + "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "IRP" + "PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory state, and therefore did not send a snoop because the Directory indicated it was not needed.", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "M2P Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x01", - "EventName": "UNC_M2P_CLOCKTICKS", + "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed", + "EventCode": "0x53", + "EventName": "UNC_CHA_DIR_LOOKUP.SNP", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M2PCIe" + "PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory state, and sent one or more snoops, because the Directory indicated it was needed.", + "UMask": "0x1", + "Unit": "CHA" }, { - "BriefDescription": "IIO Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x01", - "EventName": "UNC_IIO_CLOCKTICKS", + "BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.HA", "PerPkg": "1", - "PortMask": "0x0000", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts only multi-socket cacheline Directory state updates memory writes issued from the HA pipe. This does not include memory write requests which are for I (Invalid) or E (Exclusive) cachelines.", + "UMask": "0x1", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made by IIO Part0 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", + "BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe", + "EventCode": "0x54", + "EventName": "UNC_CHA_DIR_UPDATE.TOR", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts only multi-socket cacheline Directory state updates due to memory writes issued from the TOR pipe which are the result of remote transaction hitting the SF/LLC and returning data Core2Core. This does not include memory write requests which are for I (Invalid) or E (Exclusive) cachelines.", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made by IIO Part1 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", + "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CHAFilter0[24:21,17] bits correspond to [FMESI] state. Read transactions", + "UMask": "0x1bc1ff", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made by IIO Part2 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", + "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Requests from a Remote Socket", + "EventCode": "0x34", + "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CHAFilter0[24:21,17] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.", + "UMask": "0x1c19ff", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made by IIO Part3 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", + "BriefDescription": "All LLC lines in E state that are victimized on a fill", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", + "BriefDescription": "All LLC lines in M state that are victimized on a fill", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x1", + "Unit": "CHA" }, { - "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", + "BriefDescription": "All LLC lines in S state that are victimized on a fill", + "EventCode": "0x37", + "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of lines that were victimized on a fill. This can be filtered by the state that the line was in.", + "UMask": "0x4", + "Unit": "CHA" }, { - "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", + "BriefDescription": "OSB Snoop Broadcast : Local InvItoE", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.LOCAL_INVITOE", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "OSB Snoop Broadcast : Local InvItoE : Count of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to be broadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x1", + "Unit": "CHA" }, { - "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", + "BriefDescription": "OSB Snoop Broadcast : Local Rd", + "EventCode": "0x55", + "EventName": "UNC_CHA_OSB.LOCAL_READ", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "OSB Snoop Broadcast : Local Rd : Count of OSB snoop broadcasts. Counts by 1 per request causing OSB snoops to be broadcast. Does not count all the snoops generated by OSB.", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", + "BriefDescription": "Requests for exclusive ownership of a cache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the total number of requests coming from a unit on this socket for exclusive ownership of a cache line without receiving data (INVITOE) to the CHA.", + "UMask": "0x30", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", + "BriefDescription": "Local requests for exclusive ownership of a cache line without receiving data", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the total number of requests coming from a unit on this socket for exclusive ownership of a cache line without receiving data (INVITOE) to the CHA.", + "UMask": "0x10", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", + "BriefDescription": "Read requests made into the CHA", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts read requests made into this CHA. Reads include all read opcodes (including RFO: the Read for Ownership issued before a write) .", + "UMask": "0x3", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", + "BriefDescription": "Read requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts read requests coming from a unit on this socket made into this CHA. Reads include all read opcodes (including RFO: the Read for Ownership issued before a write).", + "UMask": "0x1", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", + "BriefDescription": "Read requests from a remote socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts read requests coming from a remote socket made into the CHA. Reads include all read opcodes (including RFO: the Read for Ownership issued before a write).", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", + "BriefDescription": "Write requests made into the CHA", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts write requests made into the CHA, including streaming, evictions, HitM (Reads from another core to a Modified cacheline), etc.", + "UMask": "0xc", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", + "BriefDescription": "Write Requests from a unit on this socket", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts write requests coming from a unit on this socket made into this CHA, including streaming, evictions, HitM (Reads from another core to a Modified cacheline), etc.", + "UMask": "0x4", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", + "BriefDescription": "Read and Write Requests; Writes Remote", + "EventCode": "0x50", + "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the total number of read requests made into the Home Agent. Reads include all read opcodes (including RFO). Writes include all writes (streaming, evictions, HitM, etc).", + "UMask": "0x8", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : All", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ALL", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : All : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0xc001ffff", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : DDR Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.DDR", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : DDR Access : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : SF/LLC Evictions", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.EVICT", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : SF/LLC Evictions : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : TOR allocation occurred as a result of SF/LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Just Hits", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.HIT", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Just Hits : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; All from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.; All locally initiated requests from IA Cores", + "UMask": "0xc001ff01", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts;CLFlush from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.; CLFlush events that are initiated from the Core", + "UMask": "0xc8c7ff01", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts;CLFlushOpt from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.; CLFlushOpt events that are initiated from the Core", + "UMask": "0xc8d7ff01", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; CRd from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts; Code read from local IA that misses in the snoop filter", + "UMask": "0xc80fff01", + "Unit": "CHA" }, { - "BriefDescription": "M2M Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x01", - "EventName": "UNC_M2M_CLOCKTICKS", + "BriefDescription": "TOR Inserts; CRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Inserts; Code read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" }, { - "BriefDescription": "M3UPI Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x01", - "EventName": "UNC_M3UPI_CLOCKTICKS", + "BriefDescription": "TOR Inserts; DRd from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M3UPI" + "PublicDescription": "TOR Inserts; Data read from local IA that misses in the snoop filter", + "UMask": "0xc817ff01", + "Unit": "CHA" }, { - "BriefDescription": "Read requests from a unit on this socket", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_LOCAL", + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores due to a page walk : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837ff01", "Unit": "CHA" }, { - "BriefDescription": "Read requests from a remote socket", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS_REMOTE", + "BriefDescription": "TOR Inserts; DRd Opt from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Inserts; Data read opt from local IA that misses in the snoop filter", + "UMask": "0xc827ff01", "Unit": "CHA" }, { - "BriefDescription": "Write Requests from a unit on this socket", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL", + "BriefDescription": "TOR Inserts; DRd Opt Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Inserts; Data read opt prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8a7ff01", "Unit": "CHA" }, { - "BriefDescription": "Read and Write Requests; Writes Remote", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE", + "BriefDescription": "TOR Inserts; DRd Pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Inserts; Data read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc897ff01", "Unit": "CHA" }, { - "BriefDescription": "Requests for exclusive ownership of a cache line without receiving data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE", + "BriefDescription": "TOR Inserts; Hits from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", "PerPkg": "1", - "UMask": "0x0000000030", - "UMaskExt": "0x00000000", + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0xc001fd01", "Unit": "CHA" }, { - "BriefDescription": "CHA Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x01", - "EventName": "UNC_CHA_CLOCKTICKS", + "BriefDescription": "TOR Inserts; CRd hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", "PerPkg": "1", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Inserts; Code read from local IA that hits in the snoop filter", + "UMask": "0xc80ffd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for CRd misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; CRd Pref hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", "PerPkg": "1", - "UMask": "0x00c80ffe01", - "UMaskExt": "0x00c80ffe", + "PublicDescription": "TOR Inserts; Code read prefetch from local IA that hits in the snoop filter", + "UMask": "0xc88ffd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRd misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; DRd hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", "PerPkg": "1", - "UMask": "0x00c817fe01", - "UMaskExt": "0x00c817fe", + "PublicDescription": "TOR Inserts; Data read from local IA that hits in the snoop filter", + "UMask": "0xc817fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRd Pref misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Hit the LLC", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", "PerPkg": "1", - "UMask": "0x00c897fe01", - "UMaskExt": "0x00c897fe", + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores due to page walks that hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for ItoM from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; DRd Opt hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", "PerPkg": "1", - "UMask": "0x00cc43ff04", - "UMaskExt": "0x00cc43ff", + "PublicDescription": "TOR Inserts; Data read opt from local IA that hits in the snoop filter", + "UMask": "0xc827fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRd misses from local IA targeting local memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; DRd Opt Pref hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", "PerPkg": "1", - "UMask": "0x00c816fe01", - "UMaskExt": "0x00c816fe", + "PublicDescription": "TOR Inserts; Data read opt prefetch from local IA that hits in the snoop filter", + "UMask": "0xc8a7fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRd misses from local IA targeting remote memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; DRd Pref hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", "PerPkg": "1", - "UMask": "0x00c8177e01", - "UMaskExt": "0x00c8177e", + "PublicDescription": "TOR Inserts; Data read prefetch from local IA that hits in the snoop filter", + "UMask": "0xc897fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting local memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Hit LLC", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM", "PerPkg": "1", - "UMask": "0x00C896FE01", - "UMaskExt": "0x00C896FE", + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting remote memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; LLCPrefCode hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", "PerPkg": "1", - "UMask": "0x00C8977E01", - "UMaskExt": "0x00C8977E", + "PublicDescription": "TOR Inserts; Last level cache prefetch code read from local IA that hits in the snoop filter", + "UMask": "0xcccffd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Occupancy for DRd misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", + "BriefDescription": "TOR Inserts; LLCPrefData hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", "PerPkg": "1", - "UMask": "0x00c817fe01", - "UMaskExt": "0x00c817fe", + "PublicDescription": "TOR Inserts; Last level cache prefetch data read from local IA that hits in the snoop filter", + "UMask": "0xccd7fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Occupancy for DRd misses from local IA targeting local memory", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", + "BriefDescription": "TOR Inserts; LLCPrefRFO hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", "PerPkg": "1", - "UMask": "0x00c816fe01", - "UMaskExt": "0x00c816fe", + "PublicDescription": "TOR Inserts; Last level cache prefetch read for ownership from local IA that hits in the snoop filter", + "UMask": "0xccc7fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Occupancy for DRd misses from local IA targeting remote memory", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", + "BriefDescription": "TOR Inserts; RFO hits from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", "PerPkg": "1", - "UMask": "0x00c8177e01", - "UMaskExt": "0x00c8177e", + "PublicDescription": "TOR Inserts; Read for ownership from local IA that hits in the snoop filter", + "UMask": "0xc807fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRds issued by iA Cores targeting PMM Mem that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; RFO Pref hits from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", + "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", "PerPkg": "1", - "UMask": "0x00c8178a01", - "UMaskExt": "0x00c8178a", + "PublicDescription": "TOR Inserts; Read for ownership prefetch from local IA that hits in the snoop filter", + "UMask": "0xc887fd01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for DRds issued by IA Cores targeting DDR Mem that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts;ItoM from Local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", + "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM", "PerPkg": "1", - "UMask": "0x00c8178601", - "UMaskExt": "0x00c81786", + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.; ItoM events that are initiated from the Core", + "UMask": "0xcc47ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Occupancy for DRds issued by iA Cores targeting DDR Mem that Missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", + "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR", "PerPkg": "1", - "UMask": "0x00c8178601", - "UMaskExt": "0x00c81786", + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd47ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Occupancy for DRds issued by iA Cores targeting PMM Mem that Missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", + "BriefDescription": "TOR Inserts; LLCPrefCode from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE", "PerPkg": "1", - "UMask": "0x00c8178a01", - "UMaskExt": "0x00c8178a", + "PublicDescription": "TOR Inserts; Last level cache prefetch code read from local IA.", + "UMask": "0xcccfff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for RdCur from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; LLCPrefData from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", "PerPkg": "1", - "UMask": "0x00c8f3ff04", - "UMaskExt": "0x00c8f3ff", + "PublicDescription": "TOR Inserts; Last level cache prefetch data read from local IA.", + "UMask": "0xccd7ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts for ItoMCacheNears from IO devices", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", + "BriefDescription": "TOR Inserts; LLCPrefRFO from local IA", "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", + "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", "PerPkg": "1", - "UMask": "0x00cd43ff04", - "UMaskExt": "0x00cd43ff", + "PublicDescription": "TOR Inserts; Last level cache prefetch read for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7ff01", "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Slot 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT0", + "BriefDescription": "TOR Inserts; misses from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts : All requests from iA Cores that Missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Slot 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT1", + "BriefDescription": "TOR Inserts for CRd misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode CRd", + "UMask": "0xc80ffe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Slot 2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.SLOT2", + "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80efe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.DATA", + "BriefDescription": "TOR Inserts; CRd Pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Code read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc88ffe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : LLCRD Not Empty", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.LLCRD", + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL", "PerPkg": "1", - "UMask": "0x0000000010", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88efe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.NULL", + "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE", "PerPkg": "1", - "UMask": "0x0000000020", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88f7e01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : LLCTRL", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", + "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE", "PerPkg": "1", - "UMask": "0x0000000040", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80f7e01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Protocol Header", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", + "BriefDescription": "TOR Inserts for DRd misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD", "PerPkg": "1", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd", + "UMask": "0xc817fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : All Non Data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", + "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", "PerPkg": "1", - "UMask": "0x0000000097", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts : DRd PTEs issued by iA Cores due to a page walk that missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc837fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Sent : Idle", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.IDLE", + "BriefDescription": "TOR Inserts for DRds issued by IA Cores targeting DDR Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR", "PerPkg": "1", - "UMask": "0x0000000047", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target DDR memory", + "UMask": "0xc8178601", + "Unit": "CHA" }, { - "BriefDescription": "All Null Flits", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", + "BriefDescription": "TOR Inserts for DRd misses from local IA targeting local memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL", "PerPkg": "1", - "UMask": "0x0000000027", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target local memory", + "UMask": "0xc816fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Slot 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT0", + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8168601", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Slot 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT1", + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8168a01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Slot 2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.SLOT2", + "BriefDescription": "TOR Inserts; DRd Opt misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Data read opt from local IA that misses in the snoop filter", + "UMask": "0xc827fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.DATA", + "BriefDescription": "TOR Inserts; DRd Opt Pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Data read opt prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8a7fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : LLCRD Not Empty", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.LLCRD", + "BriefDescription": "TOR Inserts for DRds issued by iA Cores targeting PMM Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM", "PerPkg": "1", - "UMask": "0x0000000010", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target PMM memory", + "UMask": "0xc8178a01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Empty", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.NULL", + "BriefDescription": "TOR Inserts for DRd Pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF", "PerPkg": "1", - "UMask": "0x0000000020", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRD_PREF", + "UMask": "0xc897fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : LLCTRL", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR", "PerPkg": "1", - "UMask": "0x0000000040", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8978601", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Protocol Header", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", + "BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting local memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL", "PerPkg": "1", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRD_PREF, and target local memory", + "UMask": "0xc896fe01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : All Data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR", "PerPkg": "1", - "UMask": "0x000000000f", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8968601", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : All Non Data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM", "PerPkg": "1", - "UMask": "0x0000000097", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8968a01", + "Unit": "CHA" }, { - "BriefDescription": "Valid Flits Received : Idle", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.IDLE", + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM", "PerPkg": "1", - "UMask": "0x0000000047", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8978a01", + "Unit": "CHA" }, { - "BriefDescription": "Null FLITs received from any slot", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", + "BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting remote memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE", "PerPkg": "1", - "UMask": "0x0000000027", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRD_PREF, and target remote memory", + "UMask": "0xc8977e01", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR", "PerPkg": "1", - "UMask": "0x000000000e", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8970601", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass, Match Opcode", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", + "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM", "PerPkg": "1", - "UMask": "0x000000010e", - "UMaskExt": "0x00000001", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8970a01", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "BriefDescription": "TOR Inserts for DRd misses from local IA targeting remote memory", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE", "PerPkg": "1", - "UMask": "0x000000000f", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Inserts into the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and target remote memory", + "UMask": "0xc8177e01", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard, Match Opcode", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x04", - "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", "PerPkg": "1", - "UMask": "0x000000010f", - "UMaskExt": "0x00000001", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8170601", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", + "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", "PerPkg": "1", - "UMask": "0x000000000e", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8170a01", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass, Match Opcode", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", + "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM", "PerPkg": "1", - "UMask": "0x000000010e", - "UMaskExt": "0x00000001", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fe01", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", + "BriefDescription": "TOR Inserts; LLCPrefCode misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE", "PerPkg": "1", - "UMask": "0x000000000f", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Last level cache prefetch code read from local IA that misses in the snoop filter", + "UMask": "0xcccffe01", + "Unit": "CHA" }, { - "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard, Match Opcode", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x05", - "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", + "BriefDescription": "TOR Inserts; LLCPrefData misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", "PerPkg": "1", - "UMask": "0x000000010f", - "UMaskExt": "0x00000001", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Last level cache prefetch data read from local IA that misses in the snoop filter", + "UMask": "0xccd7fe01", + "Unit": "CHA" }, { - "BriefDescription": "Direct packet attempts : D2C", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x12", - "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", + "BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Last level cache prefetch read for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7fe01", + "Unit": "CHA" }, { - "BriefDescription": "Cycles in L1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_UPI_L1_POWER_CYCLES", + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8668601", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8668a01", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86e8601", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x30", - "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86e8a01", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8670601", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8670a01", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x31", - "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f0601", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f0a01", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", + "BriefDescription": "TOR Inserts; RFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc807fe01", + "Unit": "CHA" }, { - "BriefDescription": "RxQ Occupancy - All Packets : Slot 2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x32", - "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", + "BriefDescription": "TOR Inserts RFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc806fe01", + "Unit": "CHA" }, { - "BriefDescription": "Tx Flit Buffer Allocations", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x40", - "EventName": "UNC_UPI_TxL_INSERTS", + "BriefDescription": "TOR Inserts; RFO pref misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc887fe01", + "Unit": "CHA" }, { - "BriefDescription": "Tx Flit Buffer Bypassed", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x41", - "EventName": "UNC_UPI_TxL_BYPASSED", + "BriefDescription": "TOR Inserts; RFO prefetch misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc886fe01", + "Unit": "CHA" }, { - "BriefDescription": "Tx Flit Buffer Occupancy", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x42", - "EventName": "UNC_UPI_TxL_OCCUPANCY", + "BriefDescription": "TOR Inserts; RFO prefetch misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "UPI LL" + "PublicDescription": "TOR Inserts; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8877e01", + "Unit": "CHA" }, { - "BriefDescription": "FAF allocation -- sent to ADQ", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x16", - "EventName": "UNC_I_FAF_TRANSACTIONS", + "BriefDescription": "TOR Inserts; RFO misses from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "IRP" + "PublicDescription": "TOR Inserts Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc8077e01", + "Unit": "CHA" }, { - "BriefDescription": "FAF - request insert from TC", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x18", - "EventName": "UNC_I_FAF_INSERTS", + "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "IRP" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", + "Unit": "CHA" }, { - "BriefDescription": "FAF occupancy", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x19", - "EventName": "UNC_I_FAF_OCCUPANCY", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "IRP" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", + "Unit": "CHA" }, { - "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x20", - "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that Missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IRP" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", + "Unit": "CHA" }, { - "BriefDescription": "Inbound write (fast path) requests received by the IRP", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x11", - "EventName": "UNC_I_TRANSACTIONS.WR_PREF", + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", - "Unit": "IRP" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678601", + "Unit": "CHA" }, { - "BriefDescription": "CMS Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_M2P_CMS_CLOCKTICKS", + "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM", "PerPkg": "1", - "Unit": "M2PCIe" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678a01", + "Unit": "CHA" }, { - "BriefDescription": "Read request for 4 bytes made by IIO Part0 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8601", + "Unit": "CHA" }, { - "BriefDescription": "Read request for 4 bytes made by IIO Part1 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8a01", + "Unit": "CHA" }, { - "BriefDescription": "Read request for 4 bytes made by IIO Part2 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Missed LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", + "Unit": "CHA" }, { - "BriefDescription": "Read request for 4 bytes made by IIO Part3 to Memory", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RFO from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc807ff01", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card reading from DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RFO pref from local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc887ff01", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card reading from DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts;SpecItoM from Local IA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.; SpecItoM events that are initiated from the Core", + "UMask": "0xcc57ff01", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card reading from DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "WbEFtoEs issued by iA Cores . (Non Modified Write Backs) :Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc3fff01", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : Card reading from DRAM", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. Modified Write Backs", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "WbMtoIs issued by iA Cores . (Modified Write Backs) :Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part0 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part1 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part2 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; All from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part3 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part0 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; Hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part1 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; ItoM hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part2 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd43fd04", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part3 to Memory", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RdCur and FsRdCur hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices that hit the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RFO hits from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts for ItoM from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Inserts into the TOR from local IO with the opcode ItoM", + "UMask": "0xcc43ff04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts for ItoMCacheNears from IO devices.", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Inserts into the TOR from local IO devices with the opcode ItoMCacheNears. This event indicates a partial write request.", + "UMask": "0xcd43ff04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; Misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; ItoM misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd43fe04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RdCur and FsRdCur misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : PCIRdCurs issued by IO Devices that missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fe04", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x84", - "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RFO misses from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices that missed the LLC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made to IIO Part0 by the CPU", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts for RdCur from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Inserts into the TOR from local IO with the opcode RdCur", + "UMask": "0xc8f3ff04", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made to IIO Part1 by the CPU", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; RFO from local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : RFOs issued by IO Devices : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803ff04", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made to IIO Part2 by the CPU", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", + "Unit": "CHA" }, { - "BriefDescription": "Write request of 4 bytes made to IIO Part3 by the CPU", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : IPQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IPQ", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : IPQ : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x8", + "Unit": "CHA" }, { - "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : IRQ - iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : IRQ - iA : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : From an iA Core", + "UMask": "0x1", + "Unit": "CHA" }, { - "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : IRQ - Non iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : IRQ - Non iA : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x10", + "Unit": "CHA" }, { - "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Just ISOC", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.ISOC", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Just ISOC : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Just Local Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Just Local Targets : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : All from Local iA and IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : All from Local iA and IO : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : All locally initiated requests", + "UMask": "0xc000ff05", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : All from Local iA", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : All from Local iA : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : All locally initiated requests from iA Cores", + "UMask": "0xc000ff01", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : All from Local IO", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : All from Local IO : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : All locally generated IO traffic", + "UMask": "0xc000ff04", + "Unit": "CHA" }, { - "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Match the Opcode in b[29:19] of the extended umask field : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Just Misses", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MISS", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Just Misses : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : MMCFG Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : MMCFG Access : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : MMIO Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.MMIO", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : MMIO Access : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part3", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Just NonCoherent", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Just NonCoherent : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : PMM Access", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PMM", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : PM Access : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in b[29:19] of the extended umask field", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Match the PreMorphed Opcode in b[29:19] of the extended umask field : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : PRQ - IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : PRQ - IOSF : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : From a PCIe Device", + "UMask": "0x4", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : PRQ - Non IOSF", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : PRQ - Non IOSF : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x20", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : Just Remote Targets", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : Just Remote Targets : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : All from Remote", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : All from Remote : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : All remote requests (e.g. snoops, writebacks) that came from remote sockets", + "UMask": "0xc001ffc8", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : All Snoops from Remote", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.REM_SNPS", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : All Snoops from Remote : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. : All snoops to this LLC that came from remote sockets", + "UMask": "0xc001ff08", + "Unit": "CHA" }, { - "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc1", - "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : RRQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.RRQ", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : RRQ : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x40", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts; All Snoops from Remote", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.SNPS_FROM_REM", "PerPkg": "1", - "PortMask": "0x0001", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent. All snoops to this LLC that came from remote sockets.", + "UMask": "0xc001ff08", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Inserts : WBQ", + "EventCode": "0x35", + "EventName": "UNC_CHA_TOR_INSERTS.WBQ", "PerPkg": "1", - "PortMask": "0x0002", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Inserts : WBQ : Counts the number of entries successfully inserted into the TOR that match qualifications specified by the subevent.", + "UMask": "0x80", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy : All", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL", "PerPkg": "1", - "PortMask": "0x0004", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : All : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "UMask": "0xc001ffff", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy : DDR Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", "PerPkg": "1", - "PortMask": "0x0008", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : DDR Access : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy : SF/LLC Evictions", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", "PerPkg": "1", - "PortMask": "0x0010", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : SF/LLC Evictions : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : TOR allocation occurred as a result of SF/LLC evictions (came from the ISMQ)", + "UMask": "0x2", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy : Just Hits", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", "PerPkg": "1", - "PortMask": "0x0020", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : Just Hits : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; All from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", "PerPkg": "1", - "PortMask": "0x0040", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : All requests from iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001ff01", + "Unit": "CHA" }, { - "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", - "Counter": "0,1", - "CounterType": "PGMABLE", - "EventCode": "0x83", - "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", "PerPkg": "1", - "PortMask": "0x0080", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : CLFlushes issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8c7ff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", "PerPkg": "1", - "PortMask": "0x01", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : CLFlushOpts issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8d7ff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; CRd from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", "PerPkg": "1", - "PortMask": "0x02", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Code read from local IA that misses in the snoop filter", + "UMask": "0xc80fff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; CRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", "PerPkg": "1", - "PortMask": "0x04", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Code read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc88fff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; DRd from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", "PerPkg": "1", - "PortMask": "0x08", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Data read from local IA that misses in the snoop filter", + "UMask": "0xc817ff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 4", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; DRd Opt from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", "PerPkg": "1", - "PortMask": "0x10", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Data read opt from local IA that misses in the snoop filter", + "UMask": "0xc827ff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 5", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; DRd Opt Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", "PerPkg": "1", - "PortMask": "0x20", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Data read opt prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8a7ff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 6", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; DRd Pref from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF", "PerPkg": "1", - "PortMask": "0x40", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Data read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc897ff01", + "Unit": "CHA" }, { - "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 7", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc2", - "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", - "FCMask": "0x07", + "BriefDescription": "TOR Occupancy; Hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", "PerPkg": "1", - "PortMask": "0x80", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy : All requests from iA Cores that Hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd01", + "Unit": "CHA" }, { - "BriefDescription": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "Counter": "2,3", - "CounterType": "PGMABLE", - "EventCode": "0xd5", - "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", - "FCMask": "0x04", + "BriefDescription": "TOR Occupancy; CRd hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", "PerPkg": "1", - "UMask": "0x00000000ff", - "UMaskExt": "0x00000000", - "Unit": "IIO" + "PublicDescription": "TOR Occupancy; Code read from local IA that hits in the snoop filter", + "UMask": "0xc80ffd01", + "Unit": "CHA" }, { - "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x02", - "EventName": "UNC_M2M_RxC_AD_INSERTS", + "BriefDescription": "TOR Occupancy; CRd Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Code read prefetch from local IA that hits in the snoop filter", + "UMask": "0xc88ffd01", + "Unit": "CHA" }, { - "BriefDescription": "AD Ingress (from CMS) Occupancy", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x03", - "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", + "BriefDescription": "TOR Occupancy; DRd hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read from local IA that hits in the snoop filter", + "UMask": "0xc817fd01", + "Unit": "CHA" }, { - "BriefDescription": "Messages sent direct to core (bypassing the CHA)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x16", - "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", + "BriefDescription": "TOR Occupancy; DRd Opt hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", "PerPkg": "1", - "UMask": "0x07", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read opt from local IA that hits in the snoop filter", + "UMask": "0xc827fd01", + "Unit": "CHA" }, { - "BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x17", - "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", + "BriefDescription": "TOR Occupancy; DRd Opt Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", "PerPkg": "1", - "UMask": "0x07", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read opt prefetch from local IA that hits in the snoop filter", + "UMask": "0xc8a7fd01", + "Unit": "CHA" }, { - "BriefDescription": "Number of reads in which direct to core transaction were overridden", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x18", - "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", + "BriefDescription": "TOR Occupancy; DRd Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF", "PerPkg": "1", - "UMask": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read prefetch from local IA that hits in the snoop filter", + "UMask": "0xc897fd01", + "Unit": "CHA" }, { - "BriefDescription": "Messages sent direct to the Intel UPI", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x19", - "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that Hit LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_ITOM", "PerPkg": "1", - "UMask": "0x07", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores that Hit LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fd01", + "Unit": "CHA" }, { - "BriefDescription": "Cycles when direct to Intel UPI was disabled", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x1a", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", + "BriefDescription": "TOR Occupancy; LLCPrefCode hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFCODE", "PerPkg": "1", - "UMask": "0x07", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Last level cache prefetch code read from local IA that hits in the snoop filter", + "UMask": "0xcccffd01", + "Unit": "CHA" }, { - "BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x1b", - "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", + "BriefDescription": "TOR Occupancy; LLCPrefData hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFDATA", "PerPkg": "1", - "UMask": "0x07", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Last level cache prefetch data read from local IA that hits in the snoop filter", + "UMask": "0xccd7fd01", + "Unit": "CHA" }, { - "BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x1c", - "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", + "BriefDescription": "TOR Occupancy; LLCPrefRFO hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO", "PerPkg": "1", - "UMask": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Last level cache prefetch read for ownership from local IA that hits in the snoop filter", + "UMask": "0xccc7fd01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", + "BriefDescription": "TOR Occupancy; RFO hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", "PerPkg": "1", - "UMask": "0x01", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Read for ownership from local IA that hits in the snoop filter", + "UMask": "0xc807fd01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", + "BriefDescription": "TOR Occupancy; RFO Pref hits from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", "PerPkg": "1", - "UMask": "0x08", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Read for ownership prefetch from local IA that hits in the snoop filter", + "UMask": "0xc887fd01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOM", "PerPkg": "1", - "UMask": "0x02", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47ff01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x20", - "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", + "BriefDescription": "TOR Occupancy : ItoMCacheNears issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOMCACHENEAR", "PerPkg": "1", - "UMask": "0x04", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : ItoMCacheNears issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd47ff01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from A to I", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", + "BriefDescription": "TOR Occupancy; LLCPrefCode from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFCODE", "PerPkg": "1", - "UMask": "0x0320", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Last level cache prefetch data read from local IA.", + "UMask": "0xcccfff01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from A to S", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", + "BriefDescription": "TOR Occupancy; LLCPrefData from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA", "PerPkg": "1", - "UMask": "0x0340", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Last level cache prefetch data read from local IA that misses in the snoop filter", + "UMask": "0xccd7ff01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from/to Any state", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", + "BriefDescription": "TOR Occupancy; LLCPrefRFO from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO", "PerPkg": "1", - "UMask": "0x0301", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Last level cache prefetch read for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7ff01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from I to A", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", + "BriefDescription": "TOR Occupancy; Misses from Local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", "PerPkg": "1", - "UMask": "0x0304", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : All requests from iA Cores that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from I to S", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", + "BriefDescription": "TOR Occupancy; CRd misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", "PerPkg": "1", - "UMask": "0x0302", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Code read from local IA that misses in the snoop filter", + "UMask": "0xc80ffe01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from S to A", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", + "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_LOCAL", "PerPkg": "1", - "UMask": "0x0310", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that Missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80efe01", + "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory update from S to I", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x21", - "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", + "BriefDescription": "TOR Occupancy; CRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", "PerPkg": "1", - "UMask": "0x0308", - "UMaskExt": "0x03", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Code read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc88ffe01", + "Unit": "CHA" }, { - "BriefDescription": "Tracker Inserts : Channel 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x32", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_LOCAL", "PerPkg": "1", - "UMask": "0x0000000104", - "UMaskExt": "0x00000001", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88efe01", + "Unit": "CHA" }, { - "BriefDescription": "Tracker Inserts : Channel 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x32", - "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", + "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_REMOTE", "PerPkg": "1", - "UMask": "0x0000000204", - "UMaskExt": "0x00000002", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc88f7e01", + "Unit": "CHA" }, { - "BriefDescription": "Tracker Occupancy : Channel 0", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x33", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", + "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_REMOTE", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : CRd issued by iA Cores that Missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc80f7e01", + "Unit": "CHA" }, { - "BriefDescription": "Tracker Occupancy : Channel 1", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x33", - "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", + "BriefDescription": "TOR Occupancy for DRd misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "Number of cycles for elements in the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd", + "UMask": "0xc817fe01", + "Unit": "CHA" }, { - "BriefDescription": "Data Prefetches Dropped", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", + "BriefDescription": "TOR Occupancy for DRds issued by iA Cores targeting DDR Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "Number of cycles for elements in the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target DDR memory", + "UMask": "0xc8178601", + "Unit": "CHA" }, { - "BriefDescription": "Data Prefetches Dropped", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI", + "BriefDescription": "TOR Occupancy for DRd misses from local IA targeting local memory", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "Number of cycles for elements in the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target local memory", + "UMask": "0xc816fe01", + "Unit": "CHA" }, { - "BriefDescription": "Data Prefetches Dropped", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8168601", + "Unit": "CHA" }, { - "BriefDescription": "Data Prefetches Dropped", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI", + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8168a01", + "Unit": "CHA" }, { - "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x56", - "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH", + "BriefDescription": "TOR Occupancy; DRd Opt misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", "PerPkg": "1", - "UMask": "0x000000000a", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read opt from local IA that misses in the snoop filter", + "UMask": "0xc827fe01", + "Unit": "CHA" }, { - "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x56", - "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", + "BriefDescription": "TOR Occupancy; DRd Opt Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", "PerPkg": "1", - "UMask": "0x0000000005", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read opt prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8a7fe01", + "Unit": "CHA" }, { - "BriefDescription": "Data Prefetches Dropped", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x58", - "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", + "BriefDescription": "TOR Occupancy for DRds issued by iA Cores targeting PMM Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM", "PerPkg": "1", - "UMask": "0x0000000005", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "Number of cycles for elements in the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target PMM memory", + "UMask": "0xc8178a01", + "Unit": "CHA" }, { - "BriefDescription": ": UPI - All Channels", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x5d", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.UPI_ALLCH", + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF", "PerPkg": "1", - "UMask": "0x000000000a", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy; Data read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc897fe01", + "Unit": "CHA" }, { - "BriefDescription": ": XPT - All Channels", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x5d", - "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_DDR", "PerPkg": "1", - "UMask": "0x0000000005", - "UMaskExt": "0x00000000", - "Unit": "M2M" + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8978601", + "Unit": "CHA" }, { - "BriefDescription": "FlowQ Generated Prefetch", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x29", - "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M3UPI" + "PublicDescription": "TOR Occupancy; Data read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc896fe01", + "Unit": "CHA" }, { - "BriefDescription": "D2U Sent", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x2a", - "EventName": "UNC_M3UPI_D2U_SENT", + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_DDR", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M3UPI" + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8968601", + "Unit": "CHA" }, { - "BriefDescription": "D2C Sent", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x2b", - "EventName": "UNC_M3UPI_D2C_SENT", + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_PMM", "PerPkg": "1", - "UMaskExt": "0x00000000", - "Unit": "M3UPI" + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8968a01", + "Unit": "CHA" }, { - "BriefDescription": "M3UPI CMS Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_PMM", "PerPkg": "1", - "Unit": "M3UPI" + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8978a01", + "Unit": "CHA" }, { - "BriefDescription": "Local requests for exclusive ownership of a cache line without receiving data", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL", + "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE", "PerPkg": "1", - "UMask": "0x0000000010", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy; Data read prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8977e01", "Unit": "CHA" }, { - "BriefDescription": "Read requests made into the CHA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.READS", + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_DDR", "PerPkg": "1", - "UMask": "0x0000000003", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8970601", "Unit": "CHA" }, { - "BriefDescription": "Write requests made into the CHA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x50", - "EventName": "UNC_CHA_REQUESTS.WRITES", + "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_PMM", "PerPkg": "1", - "UMask": "0x000000000c", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8970a01", "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP", + "BriefDescription": "TOR Occupancy for DRd misses from local IA targeting remote memory", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", + "PublicDescription": "Number of cycles for elements in the TOR from local IA cores which miss the LLC and snoop filter with the opcode DRd, and which target remote memory", + "UMask": "0xc8177e01", "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x53", - "EventName": "UNC_CHA_DIR_LOOKUP.SNP", + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8170601", "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.HA", + "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8170a01", "Unit": "CHA" }, { - "BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x54", - "EventName": "UNC_CHA_DIR_UPDATE.TOR", + "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_ITOM", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : ItoMs issued by iA Cores that Missed LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc47fe01", "Unit": "CHA" }, { - "BriefDescription": "OSB Snoop Broadcast : Local InvItoE", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.LOCAL_INVITOE", + "BriefDescription": "TOR Occupancy; LLCPrefCode misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy; Last level cache prefetch code read from local IA that misses in the snoop filter", + "UMask": "0xcccffe01", "Unit": "CHA" }, { - "BriefDescription": "OSB Snoop Broadcast : Local Rd", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x55", - "EventName": "UNC_CHA_OSB.LOCAL_READ", + "BriefDescription": "TOR Occupancy; LLCPrefData misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy; Last level cache prefetch data read from local IA that misses in the snoop filter", + "UMask": "0xccd7fe01", "Unit": "CHA" }, { - "BriefDescription": "CMS Clockticks", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0xc0", - "EventName": "UNC_CHA_CMS_CLOCKTICKS", + "BriefDescription": "TOR Occupancy; LLCPrefRFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO", "PerPkg": "1", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy; Last level cache prefetch read for ownership from local IA that misses in the snoop filter", + "UMask": "0xccc7fe01", "Unit": "CHA" }, { - "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD", + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_DDR", "PerPkg": "1", - "UMask": "0x00001bc1ff", - "UMaskExt": "0x00001bc1", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8668601", "Unit": "CHA" }, { - "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Requests from a Remote Socket", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x34", - "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP", + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_PMM", "PerPkg": "1", - "UMask": "0x00001c19ff", - "UMaskExt": "0x00001c19", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8668a01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; All Snoops from Remote", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.SNPS_FROM_REM", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_DDR", "PerPkg": "1", - "UMask": "0x00c001ff08", - "UMaskExt": "0x00c001ff", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86e8601", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : All", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ALL", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_PMM", "PerPkg": "1", - "UMask": "0x00C001FFff", - "UMaskExt": "0x00C001FF", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86e8a01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; All from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA", + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_DDR", "PerPkg": "1", - "UMask": "0x00c001ff01", - "UMaskExt": "0x00c001ff", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8670601", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; Hits from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT", + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_PMM", "PerPkg": "1", - "UMask": "0x00c001fd01", - "UMaskExt": "0x00c001fd", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8670a01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; CRd hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_DDR", "PerPkg": "1", - "UMask": "0x00c80ffd01", - "UMaskExt": "0x00c80ffd", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f0601", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_PMM", "PerPkg": "1", - "UMask": "0x00c817fd01", - "UMaskExt": "0x00c817fd", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f0a01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; LLCPrefRFO hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO", + "BriefDescription": "TOR Occupancy; RFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", "PerPkg": "1", - "UMask": "0x00ccc7fd01", - "UMaskExt": "0x00ccc7fd", + "PublicDescription": "TOR Occupancy; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc807fe01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO", + "BriefDescription": "TOR Occupancy; RFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL", "PerPkg": "1", - "UMask": "0x00c807fd01", - "UMaskExt": "0x00c807fd", + "PublicDescription": "TOR Occupancy; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc806fe01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; misses from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS", + "BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", "PerPkg": "1", - "UMask": "0x00c001fe01", - "UMaskExt": "0x00c001fe", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc887fe01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO", + "BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL", "PerPkg": "1", - "UMask": "0x00ccc7fe01", - "UMaskExt": "0x00ccc7fe", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc886fe01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", + "BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE", "PerPkg": "1", - "UMask": "0x00c807fe01", - "UMaskExt": "0x00c807fe", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc8877e01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; All from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO", + "BriefDescription": "TOR Occupancy; RFO misses from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE", "PerPkg": "1", - "UMask": "0x00c001ff04", - "UMaskExt": "0x00c001ff", + "PublicDescription": "TOR Occupancy; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc8077e01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; Hits from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT", + "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores that Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", "PerPkg": "1", - "UMask": "0x00c001fd04", - "UMaskExt": "0x00c001fd", + "PublicDescription": "TOR Occupancy : UCRdFs issued by iA Cores that Missed LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc877de01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; Misses from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", "PerPkg": "1", - "UMask": "0x00c001fe04", - "UMaskExt": "0x00c001fe", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86ffe01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; ItoM misses from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM", + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that Missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", "PerPkg": "1", - "UMask": "0x00cc43fe04", - "UMaskExt": "0x00cc43fe", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores that Missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867fe01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO misses from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO", + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_DDR", "PerPkg": "1", - "UMask": "0x00c803fe04", - "UMaskExt": "0x00c803fe", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678601", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : IRQ - iA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA", + "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_PMM", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8678a01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : SF/LLC Evictions", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.EVICT", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_DDR", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8601", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : PRQ - IOSF", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_PMM", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86f8a01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : IPQ", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IPQ", + "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that Missed LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : WiLs issued by iA Cores that Missed LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc87fde01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : IRQ - Non iA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA", + "BriefDescription": "TOR Occupancy; RFO from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", "PerPkg": "1", - "UMask": "0x0000000010", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy; Read for ownership from local IA that misses in the snoop filter", + "UMask": "0xc807ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : PRQ - Non IOSF", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF", + "BriefDescription": "TOR Occupancy; RFO prefetch from local IA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", "PerPkg": "1", - "UMask": "0x0000000020", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy; Read for ownership prefetch from local IA that misses in the snoop filter", + "UMask": "0xc887ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : RRQ", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.RRQ", + "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM", "PerPkg": "1", - "UMask": "0x0000000040", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : SpecItoMs issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc57ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : WBQ", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.WBQ", + "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", "PerPkg": "1", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc27ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : All from Local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO", + "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", "PerPkg": "1", - "UMask": "0x00C000FF04", - "UMaskExt": "0x00C000FF", + "PublicDescription": "TOR Occupancy : WCiLs issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc86fff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : All from Local iA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA", + "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", "PerPkg": "1", - "UMask": "0x00c000ff01", - "UMaskExt": "0x00c000ff", + "PublicDescription": "TOR Occupancy : WCiLF issued by iA Cores : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc867ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : All from Local iA and IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL", + "BriefDescription": "TOR Occupancy; All from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", "PerPkg": "1", - "UMask": "0x00C000FF05", - "UMaskExt": "0x00C000FF", + "PublicDescription": "TOR Occupancy : All requests from IO Devices : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : All Snoops from Remote", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REM_SNPS", + "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", "PerPkg": "1", - "UMask": "0x00C001FF08", - "UMaskExt": "0x00C001FF", + "PublicDescription": "TOR Occupancy : CLFlushes issued by IO Devices : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8c3ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : All from Remote", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL", + "BriefDescription": "TOR Occupancy; Hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", "PerPkg": "1", - "UMask": "0x00C001FFC8", - "UMaskExt": "0x00C001FF", + "PublicDescription": "TOR Occupancy : All requests from IO Devices that hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fd04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Just Hits", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.HIT", + "BriefDescription": "TOR Occupancy; ITOM hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", "PerPkg": "1", - "UMaskExt": "0x00000001", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices that Hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fd04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Just Misses", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MISS", + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", "PerPkg": "1", - "UMaskExt": "0x00000002", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd43fd04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : MMCFG Access", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMCFG", + "BriefDescription": "TOR Occupancy; RdCur and FsRdCur hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", "PerPkg": "1", - "UMaskExt": "0x00000020", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devices that hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fd04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : MMIO Access", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MMIO", + "BriefDescription": "TOR Occupancy; RFO hits from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", "PerPkg": "1", - "UMaskExt": "0x00000040", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices that hit the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fd04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Just Local Targets", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT", + "BriefDescription": "TOR Occupancy; ITOM from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", "PerPkg": "1", - "UMaskExt": "0x00000080", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Just Remote Targets", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT", + "BriefDescription": "TOR Occupancy; Misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", "PerPkg": "1", - "UMaskExt": "0x00000100", + "PublicDescription": "TOR Occupancy : All requests from IO Devices that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc001fe04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of the extended umask field", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC", + "BriefDescription": "TOR Occupancy; ITOM misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", "PerPkg": "1", - "UMaskExt": "0x00000200", + "PublicDescription": "TOR Occupancy : ItoMs issued by IO Devices that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc43fe04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in b[29:19] of the extended umask field", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC", + "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", "PerPkg": "1", - "UMaskExt": "0x00000400", + "PublicDescription": "TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcd43fe04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Just NonCoherent", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.NONCOH", + "BriefDescription": "TOR Occupancy; RdCur and FsRdCur misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", "PerPkg": "1", - "UMaskExt": "0x01000000", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devices that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3fe04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts : Just ISOC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.ISOC", + "BriefDescription": "TOR Occupancy; RFO misses from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", "PerPkg": "1", - "UMaskExt": "0x02000000", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices that missed the LLC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803fe04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; CRd Pref hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF", + "BriefDescription": "TOR Occupancy; RdCur and FsRdCur from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", "PerPkg": "1", - "UMask": "0x00c88ffd01", - "UMaskExt": "0x00c88ffd", + "PublicDescription": "TOR Occupancy : PCIRdCurs issued by IO Devices : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc8f3ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Pref hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF", + "BriefDescription": "TOR Occupancy; ItoM from local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", "PerPkg": "1", - "UMask": "0x00c897fd01", - "UMaskExt": "0x00c897fd", + "PublicDescription": "TOR Occupancy : RFOs issued by IO Devices : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xc803ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Opt hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT", + "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", "PerPkg": "1", - "UMask": "0x00c827fd01", - "UMaskExt": "0x00c827fd", + "PublicDescription": "TOR Occupancy : WbMtoIs issued by IO Devices : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. Does not include addressless requests such as locks and interrupts.", + "UMask": "0xcc23ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Opt Pref hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF", + "BriefDescription": "TOR Occupancy : IPQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", "PerPkg": "1", - "UMask": "0x00c8a7fd01", - "UMaskExt": "0x00c8a7fd", + "PublicDescription": "TOR Occupancy : IPQ : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "UMask": "0x8", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO Pref hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF", + "BriefDescription": "TOR Occupancy : IRQ - iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", "PerPkg": "1", - "UMask": "0x00c887fd01", - "UMaskExt": "0x00c887fd", + "PublicDescription": "TOR Occupancy : IRQ - iA : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : From an iA Core", + "UMask": "0x1", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; CRd Pref misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", + "BriefDescription": "TOR Occupancy : IRQ - Non iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", "PerPkg": "1", - "UMask": "0x00c88ffe01", - "UMaskExt": "0x00c88ffe", + "PublicDescription": "TOR Occupancy : IRQ - Non iA : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "UMask": "0x10", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Opt misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", + "BriefDescription": "TOR Occupancy : Just ISOC", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", "PerPkg": "1", - "UMask": "0x00c827fe01", - "UMaskExt": "0x00c827fe", + "PublicDescription": "TOR Occupancy : Just ISOC : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Opt Pref misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", + "BriefDescription": "TOR Occupancy : Just Local Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", "PerPkg": "1", - "UMask": "0x00c8a7fe01", - "UMaskExt": "0x00c8a7fe", + "PublicDescription": "TOR Occupancy : Just Local Targets : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO pref misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", + "BriefDescription": "TOR Occupancy : All from Local iA and IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", "PerPkg": "1", - "UMask": "0x00c887fe01", - "UMaskExt": "0x00c887fe", + "PublicDescription": "TOR Occupancy : All from Local iA and IO : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : All locally initiated requests", + "UMask": "0xc000ff05", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; ItoM hits from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM", + "BriefDescription": "TOR Occupancy : All from Local iA", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", "PerPkg": "1", - "UMask": "0x00cc43fd04", - "UMaskExt": "0x00cc43fd", + "PublicDescription": "TOR Occupancy : All from Local iA : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : All locally initiated requests from iA Cores", + "UMask": "0xc000ff01", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO hits from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO", + "BriefDescription": "TOR Occupancy : All from Local IO", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", "PerPkg": "1", - "UMask": "0x00c803fd04", - "UMaskExt": "0x00c803fd", + "PublicDescription": "TOR Occupancy : All from Local IO : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : All locally generated IO traffic", + "UMask": "0xc000ff04", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO", + "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", "PerPkg": "1", - "UMask": "0x00c803ff04", - "UMaskExt": "0x00c803ff", + "PublicDescription": "TOR Occupancy : Match the Opcode in b[29:19] of the extended umask field : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO pref from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF", + "BriefDescription": "TOR Occupancy : Just Misses", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", "PerPkg": "1", - "UMask": "0x00c887ff01", - "UMaskExt": "0x00c887ff", + "PublicDescription": "TOR Occupancy : Just Misses : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO", + "BriefDescription": "TOR Occupancy : MMCFG Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", "PerPkg": "1", - "UMask": "0x00c807ff01", - "UMaskExt": "0x00c807ff", + "PublicDescription": "TOR Occupancy : MMCFG Access : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; LLCPrefRFO from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO", + "BriefDescription": "TOR Occupancy : MMIO Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.MMIO", "PerPkg": "1", - "UMask": "0x00ccc7ff01", - "UMaskExt": "0x00ccc7ff", + "PublicDescription": "TOR Occupancy : MMIO Access : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD", + "BriefDescription": "TOR Occupancy : Just NonCoherent", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", "PerPkg": "1", - "UMask": "0x00c817ff01", - "UMaskExt": "0x00c817ff", + "PublicDescription": "TOR Occupancy : Just NonCoherent : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Pref from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF", + "BriefDescription": "TOR Occupancy : PMM Access", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PMM", "PerPkg": "1", - "UMask": "0x00c897ff01", - "UMaskExt": "0x00c897ff", + "PublicDescription": "TOR Occupancy : PMM Access : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent.", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Opt from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT", + "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode in b[29:19] of the extended umask field", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", "PerPkg": "1", - "UMask": "0x00c827ff01", - "UMaskExt": "0x00c827ff", + "PublicDescription": "TOR Occupancy : Match the PreMorphed Opcode in b[29:19] of the extended umask field : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; DRd Opt Pref from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF", + "BriefDescription": "TOR Occupancy : PRQ - IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", "PerPkg": "1", - "UMask": "0x00c8a7ff01", - "UMaskExt": "0x00c8a7ff", + "PublicDescription": "TOR Occupancy : PRQ - IOSF : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : From a PCIe Device", + "UMask": "0x4", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; CRd Pref from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF", + "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", "PerPkg": "1", - "UMask": "0x00C88FFF01", - "UMaskExt": "0x00C88FFF", + "PublicDescription": "TOR Occupancy : PRQ - Non IOSF : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "UMask": "0x20", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; CRd from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD", + "BriefDescription": "TOR Occupancy : Just Remote Targets", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REMOTE_TGT", "PerPkg": "1", - "UMask": "0x00c80fff01", - "UMaskExt": "0x00c80fff", + "PublicDescription": "TOR Occupancy : Just Remote Targets : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts RFO misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL", + "BriefDescription": "TOR Occupancy : All from Remote", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_ALL", "PerPkg": "1", - "UMask": "0x00c806fe01", - "UMaskExt": "0x00c806fe", + "PublicDescription": "TOR Occupancy : All from Remote : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : All remote requests (e.g. snoops, writebacks) that came from remote sockets", + "UMask": "0xc001ffc8", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE", + "BriefDescription": "TOR Occupancy : All Snoops from Remote", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_SNPS", "PerPkg": "1", - "UMask": "0x00c8077e01", - "UMaskExt": "0x00c8077e", + "PublicDescription": "TOR Occupancy : All Snoops from Remote : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T : All snoops to this LLC that came from remote sockets", + "UMask": "0xc001ff08", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO prefetch misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL", + "BriefDescription": "TOR Occupancy : RRQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ", "PerPkg": "1", - "UMask": "0x00c886fe01", - "UMaskExt": "0x00c886fe", + "PublicDescription": "TOR Occupancy : RRQ : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "UMask": "0x40", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts; RFO prefetch misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE", + "BriefDescription": "TOR Occupancy; All Snoops from Remote", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.SNPS_FROM_REM", "PerPkg": "1", - "UMask": "0x00c8877e01", - "UMaskExt": "0x00c8877e", + "PublicDescription": "For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. All snoops to this LLC that came from remote sockets.", + "UMask": "0xc001ff08", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts;CLFlush from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH", + "BriefDescription": "TOR Occupancy : WBQ", + "EventCode": "0x36", + "EventName": "UNC_CHA_TOR_OCCUPANCY.WBQ", "PerPkg": "1", - "UMask": "0x00c8c7ff01", - "UMaskExt": "0x00c8c7ff", + "PublicDescription": "TOR Occupancy : WBQ : For each cycle, this event accumulates the number of valid entries in the TOR that match qualifications specified by the subevent. T", + "UMask": "0x80", "Unit": "CHA" }, { - "BriefDescription": "TOR Inserts;CLFlushOpt from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT", + "BriefDescription": "IIO Clockticks", + "EventCode": "0x01", + "EventName": "UNC_IIO_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00c8d7ff01", - "UMaskExt": "0x00c8d7ff", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": "Number of IIO clock cycles while the event is enabled", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts;ItoM from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cc47ff01", - "UMaskExt": "0x00cc47ff", - "Unit": "CHA" + "PortMask": "0x01", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts;SpecItoM from Local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cc57ff01", - "UMaskExt": "0x00cc57ff", - "Unit": "CHA" + "PortMask": "0x02", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; All Snoops from Remote", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.SNPS_FROM_REM", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001ff08", - "UMaskExt": "0x00c001ff", - "Unit": "CHA" + "PortMask": "0x04", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 2", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : All", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ALL", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C001FFff", - "UMaskExt": "0x00C001FF", - "Unit": "CHA" + "PortMask": "0x08", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; All from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 4", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001ff01", - "UMaskExt": "0x00c001ff", - "Unit": "CHA" + "PortMask": "0x10", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 4", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; Hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 5", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001fd01", - "UMaskExt": "0x00c001fd", - "Unit": "CHA" + "PortMask": "0x20", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 5", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; CRd hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 6", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c80ffd01", - "UMaskExt": "0x00c80ffd", - "Unit": "CHA" + "PortMask": "0x40", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 6", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD", + "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 7", + "EventCode": "0xc2", + "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c817fd01", - "UMaskExt": "0x00c817fd", - "Unit": "CHA" + "PortMask": "0x80", + "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 7", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefRFO hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFRFO", + "BriefDescription": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "EventCode": "0xd5", + "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS", + "FCMask": "0x04", "PerPkg": "1", - "UMask": "0x00ccc7fd01", - "UMaskExt": "0x00ccc7fd", - "Unit": "CHA" + "UMask": "0xff", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO", + "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c807fd01", - "UMaskExt": "0x00c807fd", - "Unit": "CHA" + "PortMask": "0x0100", + "PublicDescription": "Data requested by the CPU : Core writing to Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; Misses from Local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS", + "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001fe01", - "UMaskExt": "0x00c001fe", - "Unit": "CHA" + "PortMask": "0x0200", + "PublicDescription": "Data requested by the CPU : Core writing to Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; CRd misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD", + "BriefDescription": "Write request of 4 bytes made to IIO Part0 by the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c80ffe01", - "UMaskExt": "0x00c80ffe", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefRFO misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO", + "BriefDescription": "Write request of 4 bytes made to IIO Part1 by the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccc7fe01", - "UMaskExt": "0x00ccc7fe", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO", + "BriefDescription": "Write request of 4 bytes made to IIO Part2 by the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c807fe01", - "UMaskExt": "0x00c807fe", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; All from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO", + "BriefDescription": "Write request of 4 bytes made to IIO Part3 by the CPU", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001ff04", - "UMaskExt": "0x00c001ff", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; Hits from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT", + "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001fd04", - "UMaskExt": "0x00c001fd", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Data requested by the CPU : Core writing to Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; Misses from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS", + "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c001fe04", - "UMaskExt": "0x00c001fe", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Data requested by the CPU : Core writing to Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO misses from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_RFO", + "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c803fe04", - "UMaskExt": "0x00c803fe", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Data requested by the CPU : Core writing to Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; ITOM misses from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOM", + "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc0", + "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cc43fe04", - "UMaskExt": "0x00cc43fe", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Data requested by the CPU : Core writing to Cards MMIO space : Number of DWs (4 bytes) requested by the main die. Includes all requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : IRQ - iA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_IA", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : SF/LLC Evictions", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.EVICT", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : PRQ - IOSF", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : IPQ", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IPQ", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000008", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : IRQ - Non iA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IRQ_NON_IA", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000010", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : PRQ - Non IOSF", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PRQ_NON_IOSF", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000020", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : RRQ", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000040", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : WBQ", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.WBQ", + "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000080", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : All from Local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IO", + "BriefDescription": "Read request for 4 bytes made by IIO Part0 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C000FF04", - "UMaskExt": "0x00C000FF", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : All from Local iA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_IA", + "BriefDescription": "Read request for 4 bytes made by IIO Part1 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C000FF01", - "UMaskExt": "0x00C000FF", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : All from Local iA and IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOC_ALL", + "BriefDescription": "Read request for 4 bytes made by IIO Part2 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C000FF05", - "UMaskExt": "0x00C000FF", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : All Snoops from Remote", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_SNPS", + "BriefDescription": "Read request for 4 bytes made by IIO Part3 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C001FF08", - "UMaskExt": "0x00C001FF", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : All from Remote", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REM_ALL", + "BriefDescription": "Data requested of the CPU : Card reading from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C001FFC8", - "UMaskExt": "0x00C001FF", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Just Hits", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.HIT", + "BriefDescription": "Data requested of the CPU : Card reading from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000001", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Just Misses", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MISS", + "BriefDescription": "Data requested of the CPU : Card reading from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000002", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : MMCFG Access", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMCFG", + "BriefDescription": "Data requested of the CPU : Card reading from DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000020", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : MMIO Access", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MMIO", + "BriefDescription": "Write request of 4 bytes made by IIO Part0 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000040", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Just Local Targets", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.LOCAL_TGT", + "BriefDescription": "Write request of 4 bytes made by IIO Part1 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000080", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Just Remote Targets", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.REMOTE_TGT", + "BriefDescription": "Write request of 4 bytes made by IIO Part2 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000100", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Match the Opcode in b[29:19] of the extended umask field", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.MATCH_OPC", + "BriefDescription": "Write request of 4 bytes made by IIO Part3 to Memory", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000200", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Match the PreMorphed Opcode in b[29:19] of the extended umask field", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PREMORPH_OPC", + "BriefDescription": "Data requested of the CPU : Card writing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x00000400", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Just NonCoherent", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.NONCOH", + "BriefDescription": "Data requested of the CPU : Card writing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x01000000", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy : Just ISOC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.ISOC", + "BriefDescription": "Data requested of the CPU : Card writing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMaskExt": "0x02000000", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; CRd Pref hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD_PREF", + "BriefDescription": "Data requested of the CPU : Card writing to DRAM", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c88ffd01", - "UMaskExt": "0x00c88ffd", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Pref hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_PREF", + "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c897fd01", - "UMaskExt": "0x00c897fd", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Opt hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT", + "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c827fd01", - "UMaskExt": "0x00c827fd", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Opt Pref hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD_OPT_PREF", + "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8a7fd01", - "UMaskExt": "0x00c8a7fd", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO Pref hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO_PREF", + "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c887fd01", - "UMaskExt": "0x00c887fd", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; CRd Pref misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF", + "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c88ffe01", - "UMaskExt": "0x00c88ffe", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF", + "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c897fe01", - "UMaskExt": "0x00c897fe", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Opt misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT", + "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c827fe01", - "UMaskExt": "0x00c827fe", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Opt Pref misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_OPT_PREF", + "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x83", + "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8a7fe01", - "UMaskExt": "0x00c8a7fe", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Data requested of the CPU : Card writing to another Card (same or different stack) : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF", + "BriefDescription": ": Context cache hits", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS", "PerPkg": "1", - "UMask": "0x00c887fe01", - "UMaskExt": "0x00c887fe", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": ": Context cache hits : Counts each time a first look up of the transaction hits the RCC.", + "UMask": "0x80", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; ITOM hits from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOM", + "BriefDescription": ": Context cache lookups", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS", "PerPkg": "1", - "UMask": "0x00cc43fd04", - "UMaskExt": "0x00cc43fd", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": ": Context cache lookups : Counts each time a transaction looks up root context cache.", + "UMask": "0x40", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO hits from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_RFO", + "BriefDescription": ": IOTLB lookups first", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS", "PerPkg": "1", - "UMask": "0x00c803fd04", - "UMaskExt": "0x00c803fd", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": ": IOTLB lookups first : Some transactions have to look up IOTLB multiple times. Counts the first time a request looks up IOTLB.", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; ItoM from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_RFO", + "BriefDescription": "IOTLB Fills (same as IOTLB miss)", + "EventCode": "0x40", + "EventName": "UNC_IIO_IOMMU0.MISSES", "PerPkg": "1", - "UMask": "0x00c803ff04", - "UMaskExt": "0x00c803ff", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": "IOTLB Fills (same as IOTLB miss) : When a transaction misses IOTLB, it does a page walk to look up memory and bring in the relevant page translation. Counts when this page translation is written to IOTLB.", + "UMask": "0x20", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; ITOM from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_ITOM", + "BriefDescription": ": IOMMU memory access", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES", "PerPkg": "1", - "UMask": "0x00cc43ff04", - "UMaskExt": "0x00cc43ff", - "Unit": "CHA" + "PublicDescription": ": IOMMU memory access : IOMMU sends out memory fetches when it misses the cache look up which is indicated by this signal. M2IOSF only uses low priority channel", + "UMask": "0xc0", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO", + "BriefDescription": ": PWC Hit to a 2M page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS", "PerPkg": "1", - "UMask": "0x00c807ff01", - "UMaskExt": "0x00c807ff", - "Unit": "CHA" + "PublicDescription": ": PWC Hit to a 2M page : Counts each time a transaction's first look up hits the SLPWC at the 2M level", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO prefetch from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_RFO_PREF", + "BriefDescription": ": PWT Hit to a 256T page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_256T_HITS", "PerPkg": "1", - "UMask": "0x00c887ff01", - "UMaskExt": "0x00c887ff", - "Unit": "CHA" + "PublicDescription": ": PWT Hit to a 256T page : Counts each time a transaction's first look up hits the SLPWC at the 512G level", + "UMask": "0x10", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefRFO from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFRFO", + "BriefDescription": ": PWC Hit to a 4K page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS", "PerPkg": "1", - "UMask": "0x00ccc7ff01", - "UMaskExt": "0x00ccc7ff", - "Unit": "CHA" + "PublicDescription": ": PWC Hit to a 4K page : Counts each time a transaction's first look up hits the SLPWC at the 4K level", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD", + "BriefDescription": ": PWC Hit to a 1G page", + "EventCode": "0x41", + "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS", "PerPkg": "1", - "UMask": "0x00c817ff01", - "UMaskExt": "0x00c817ff", - "Unit": "CHA" + "PublicDescription": ": PWC Hit to a 1G page : Counts each time a transaction's first look up hits the SLPWC at the 1G level", + "UMask": "0x8", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Opt from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT", + "BriefDescription": ": Global IOTLB invalidation cycles", + "EventCode": "0x43", + "EventName": "UNC_IIO_IOMMU3.PWT_OCCUPANCY_MSB", "PerPkg": "1", - "UMask": "0x00c827ff01", - "UMaskExt": "0x00c827ff", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": ": Global IOTLB invalidation cycles : Indicates that IOMMU is doing global invalidation.", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Opt Pref from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_OPT_PREF", + "BriefDescription": "PWT occupancy. Does not include 9th bit of occupancy (will undercount if PWT is greater than 255 per cycle).", + "EventCode": "0x42", + "EventName": "UNC_IIO_PWT_OCCUPANCY", "PerPkg": "1", - "UMask": "0x00c8a7ff01", - "UMaskExt": "0x00c8a7ff", - "Unit": "CHA" + "PortMask": "0x0000", + "PublicDescription": "PWT occupancy : Indicates how many page walks are outstanding at any point in time.", + "UMask": "0xff", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; CRd from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD", + "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part0", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c80fff01", - "UMaskExt": "0x00c80fff", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; CRd Pref from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CRD_PREF", + "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part1", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c88fff01", - "UMaskExt": "0x00c88fff", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Pref from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_DRD_PREF", + "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part2", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c897ff01", - "UMaskExt": "0x00c897ff", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL", + "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part3", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C896FE01", - "UMaskExt": "0x00C896FE", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; DRd Pref misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE", + "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C8977E01", - "UMaskExt": "0x00C8977E", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_LOCAL", + "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c806fe01", - "UMaskExt": "0x00c806fe", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_REMOTE", + "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8077e01", - "UMaskExt": "0x00c8077e", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_LOCAL", + "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c886fe01", - "UMaskExt": "0x00c886fe", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RFO prefetch misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_REMOTE", + "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8877e01", - "UMaskExt": "0x00c8877e", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "All LLC lines in E state that are victimized on a fill", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E", + "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000002", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "All LLC lines in M state that are victimized on a fill", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M", + "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000001", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "All LLC lines in S state that are victimized on a fill", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x37", - "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S", + "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x0000000004", - "UMaskExt": "0x00000000", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR", + "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cd43fd04", - "UMaskExt": "0x00cd43fd", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR", + "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cd43fe04", - "UMaskExt": "0x00cd43fe", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE", + "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c837fe01", - "UMaskExt": "0x00c837fe", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Hit the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE", + "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space", + "EventCode": "0xc1", + "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c837fd01", - "UMaskExt": "0x00c837fd", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space : Also known as Outbound. Number of requests initiated by the main die, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE", + "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c837ff01", - "UMaskExt": "0x00c837ff", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE", + "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0xcc3fff01", - "UMaskExt": "0xcc3fff", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; RdCur and FsRdCur hits from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR", + "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8f3fd04", - "UMaskExt": "0x00c8f3fd", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; RdCur and FsRdCur misses from local IO", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR", + "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8f3fe04", - "UMaskExt": "0x00c8f3fe", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RdCur and FsRdCur hits from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_PCIRDCUR", + "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8f3fd04", - "UMaskExt": "0x00c8f3fd", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RdCur and FsRdCur misses from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_PCIRDCUR", + "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8f3fe04", - "UMaskExt": "0x00c8f3fe", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; RdCur and FsRdCur from local IO", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_PCIRDCUR", + "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8f3ff04", - "UMaskExt": "0x00c8f3ff", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; LLCPrefCode hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE", + "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cccffd01", - "UMaskExt": "0x00cccffd", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : Card reading from DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x4", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; LLCPrefData hits from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA", + "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part0 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccd7fd01", - "UMaskExt": "0x00ccd7fd", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; LLCPrefData from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA", + "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part1 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccd7ff01", - "UMaskExt": "0x00ccd7ff", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; LLCPrefCode misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE", + "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part2 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cccffe01", - "UMaskExt": "0x00cccffe", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; LLCPrefData misses from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA", + "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part3 to Memory", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccd7fe01", - "UMaskExt": "0x00ccd7fe", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefCode hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFCODE", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cccffd01", - "UMaskExt": "0x00cccffd", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefData hits from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_LLCPREFDATA", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccd7fd01", - "UMaskExt": "0x00ccd7fd", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefData from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFDATA", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccd7ff01", - "UMaskExt": "0x00ccd7ff", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefCode misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFCODE", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cccffe01", - "UMaskExt": "0x00cccffe", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to DRAM : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x1", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefData misses from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00ccd7fe01", - "UMaskExt": "0x00ccd7fe", - "Unit": "CHA" + "PortMask": "0x0001", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts; LLCPrefCode from local IA", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cccfff01", - "UMaskExt": "0x00cccfff", - "Unit": "CHA" + "PortMask": "0x0002", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Occupancy; LLCPrefCode from local IA", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_LLCPREFCODE", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00cccfff01", - "UMaskExt": "0x00cccfff", - "Unit": "CHA" + "PortMask": "0x0004", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 2", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8168a01", - "UMaskExt": "0x00c8168a", - "Unit": "CHA" + "PortMask": "0x0008", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8170a01", - "UMaskExt": "0x00c8170a", - "Unit": "CHA" + "PortMask": "0x0010", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x16 card plugged in to Lane 4/5/6/7, Or x8 card plugged in to Lane 4/5, Or x4 card is plugged in to slot 4", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8168601", - "UMaskExt": "0x00c81686", - "Unit": "CHA" + "PortMask": "0x0020", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 5", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00c8170601", - "UMaskExt": "0x00c81706", - "Unit": "CHA" + "PortMask": "0x0040", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 6/7, Or x4 card is plugged in to slot 6", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM", + "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)", + "EventCode": "0x84", + "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7", + "FCMask": "0x07", "PerPkg": "1", - "UMask": "0x00C8978A01", - "UMaskExt": "0x00C8978A", - "Unit": "CHA" + "PortMask": "0x0080", + "PublicDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack) : Also known as Inbound. Number of 64B cache line requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 7", + "UMask": "0x2", + "Unit": "IIO" }, { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM", + "BriefDescription": "IRP Clockticks", + "EventCode": "0x01", + "EventName": "UNC_I_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00C8968A01", - "UMaskExt": "0x00C8968A", - "Unit": "CHA" + "PublicDescription": "Number of IRP clock cycles while the event is enabled", + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM", + "BriefDescription": "FAF - request insert from TC.", + "EventCode": "0x18", + "EventName": "UNC_I_FAF_INSERTS", "PerPkg": "1", - "UMask": "0x00C8970A01", - "UMaskExt": "0x00C8970A", - "Unit": "CHA" + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR", + "BriefDescription": "FAF occupancy", + "EventCode": "0x19", + "EventName": "UNC_I_FAF_OCCUPANCY", "PerPkg": "1", - "UMask": "0x00C8978601", - "UMaskExt": "0x00C89786", - "Unit": "CHA" + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR", + "BriefDescription": "FAF allocation -- sent to ADQ", + "EventCode": "0x16", + "EventName": "UNC_I_FAF_TRANSACTIONS", "PerPkg": "1", - "UMask": "0x00C8968601", - "UMaskExt": "0x00C89686", - "Unit": "CHA" + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR", + "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)", + "EventCode": "0x20", + "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS", "PerPkg": "1", - "UMask": "0x00C8970601", - "UMaskExt": "0x00C89706", - "Unit": "CHA" + "UMask": "0x1", + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL", + "BriefDescription": "Misc Events - Set 1 : Lost Forward", + "EventCode": "0x1f", + "EventName": "UNC_I_MISC1.LOST_FWD", "PerPkg": "1", - "UMask": "0x00C80EFE01", - "UMaskExt": "0x00C80EFE", - "Unit": "CHA" + "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop pulled away ownership before a write was committed", + "UMask": "0x10", + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE", + "BriefDescription": "Inbound write (fast path) requests received by the IRP.", + "EventCode": "0x11", + "EventName": "UNC_I_TRANSACTIONS.WR_PREF", "PerPkg": "1", - "UMask": "0x00C80F7E01", - "UMaskExt": "0x00C80F7E", - "Unit": "CHA" + "PublicDescription": "Inbound write (fast path) requests to coherent memory, received by the IRP resulting in write ownership requests issued by IRP to the mesh.", + "UMask": "0x8", + "Unit": "IRP" }, { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL", + "BriefDescription": "M2M Clockticks", + "EventCode": "0x01", + "EventName": "UNC_M2M_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00C88EFE01", - "UMaskExt": "0x00C88EFE", - "Unit": "CHA" + "PublicDescription": "Clockticks of the mesh to memory (M2M)", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE", + "BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled", + "EventCode": "0x17", + "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE", "PerPkg": "1", - "UMask": "0x00C88F7E01", - "UMaskExt": "0x00C88F7E", - "Unit": "CHA" + "UMask": "0x7", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cores", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR", + "BriefDescription": "Messages sent direct to core (bypassing the CHA)", + "EventCode": "0x16", + "EventName": "UNC_M2M_DIRECT2CORE_TAKEN", "PerPkg": "1", - "UMask": "0x00CD47FF01", - "UMaskExt": "0x00CD47FF", - "Unit": "CHA" + "UMask": "0x7", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. Modified Write Backs", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI", + "BriefDescription": "Number of reads in which direct to core transaction were overridden", + "EventCode": "0x18", + "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE", "PerPkg": "1", - "UMask": "0x00cc27ff01", - "UMaskExt": "0x00cc27ff", - "Unit": "CHA" + "UMask": "0x3", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Hit LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM", + "BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden", + "EventCode": "0x1b", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS", "PerPkg": "1", - "UMask": "0x00CC47FD01", - "UMaskExt": "0x00CC47FD", - "Unit": "CHA" + "UMask": "0x7", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Missed LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM", + "BriefDescription": "Cycles when direct to Intel UPI was disabled", + "EventCode": "0x1a", + "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE", "PerPkg": "1", - "UMask": "0x00CC47FE01", - "UMaskExt": "0x00CC47FE", - "Unit": "CHA" + "UMask": "0x7", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that Missed LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF", + "BriefDescription": "Messages sent direct to the Intel UPI", + "EventCode": "0x19", + "EventName": "UNC_M2M_DIRECT2UPI_TAKEN", "PerPkg": "1", - "UMask": "0x00C877DE01", - "UMaskExt": "0x00C877DE", - "Unit": "CHA" + "UMask": "0x7", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Missed LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL", + "BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden", + "EventCode": "0x1c", + "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE", "PerPkg": "1", - "UMask": "0x00C87FDE01", - "UMaskExt": "0x00C87FDE", - "Unit": "CHA" + "UMask": "0x3", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF", + "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY", "PerPkg": "1", - "UMask": "0x00C867FF01", - "UMaskExt": "0x00C867FF", - "Unit": "CHA" + "UMask": "0x1", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", + "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A", "PerPkg": "1", - "UMask": "0x00C867FE01", - "UMaskExt": "0x00C867FE", - "Unit": "CHA" + "UMask": "0x8", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM", + "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I", "PerPkg": "1", - "UMask": "0x00C8678A01", - "UMaskExt": "0x00C8678A", - "Unit": "CHA" + "UMask": "0x2", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM", + "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)", + "EventCode": "0x20", + "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S", "PerPkg": "1", - "UMask": "0x00C8668A01", - "UMaskExt": "0x00C8668A", - "Unit": "CHA" + "UMask": "0x4", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM", + "BriefDescription": "Multi-socket cacheline Directory update from A to I", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I", "PerPkg": "1", - "UMask": "0x00C8670A01", - "UMaskExt": "0x00C8670A", - "Unit": "CHA" + "UMask": "0x320", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR", + "BriefDescription": "Multi-socket cacheline Directory update from A to S", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S", "PerPkg": "1", - "UMask": "0x00C8678601", - "UMaskExt": "0x00C86786", - "Unit": "CHA" + "UMask": "0x340", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR", + "BriefDescription": "Multi-socket cacheline Directory update from/to Any state", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY", "PerPkg": "1", - "UMask": "0x00C8668601", - "UMaskExt": "0x00C86686", - "Unit": "CHA" + "UMask": "0x301", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR", + "BriefDescription": "Multi-socket cacheline Directory update from I to A", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A", "PerPkg": "1", - "UMask": "0x00C8670601", - "UMaskExt": "0x00C86706", - "Unit": "CHA" + "UMask": "0x304", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL", + "BriefDescription": "Multi-socket cacheline Directory update from I to S", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S", "PerPkg": "1", - "UMask": "0x00C86FFF01", - "UMaskExt": "0x00C86FFF", - "Unit": "CHA" + "UMask": "0x302", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that Missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", + "BriefDescription": "Multi-socket cacheline Directory update from S to A", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A", "PerPkg": "1", - "UMask": "0x00C86FFE01", - "UMaskExt": "0x00C86FFE", - "Unit": "CHA" + "UMask": "0x310", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM", + "BriefDescription": "Multi-socket cacheline Directory update from S to I", + "EventCode": "0x21", + "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I", "PerPkg": "1", - "UMask": "0x00C86F8A01", - "UMaskExt": "0x00C86F8A", - "Unit": "CHA" + "UMask": "0x308", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM", + "BriefDescription": "UNC_M2M_IMC_READS.TO_PMM", + "EventCode": "0x24", + "EventName": "UNC_M2M_IMC_READS.TO_PMM", "PerPkg": "1", - "UMask": "0x00C86E8A01", - "UMaskExt": "0x00C86E8A", - "Unit": "CHA" + "UMask": "0x320", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM", + "BriefDescription": "PMM - All Channels", + "EventCode": "0x25", + "EventName": "UNC_M2M_IMC_WRITES.TO_PMM", "PerPkg": "1", - "UMask": "0x00C86F0A01", - "UMaskExt": "0x00C86F0A", - "Unit": "CHA" + "UMask": "0x1880", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR", + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI", "PerPkg": "1", - "UMask": "0x00C86F8601", - "UMaskExt": "0x00C86F86", - "Unit": "CHA" + "UMask": "0x2", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR", + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT", "PerPkg": "1", - "UMask": "0x00C86E8601", - "UMaskExt": "0x00C86E86", - "Unit": "CHA" + "UMask": "0x1", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR", + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI", "PerPkg": "1", - "UMask": "0x00C86F0601", - "UMaskExt": "0x00C86F06", - "Unit": "CHA" + "UMask": "0x8", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI", + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT", "PerPkg": "1", - "UMask": "0x00CC23FF04", - "UMaskExt": "0x00CC23FF", - "Unit": "CHA" + "UMask": "0x4", + "Unit": "M2M" }, { - "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH", + "BriefDescription": "Data Prefetches Dropped", + "EventCode": "0x58", + "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH", "PerPkg": "1", - "UMask": "0x00C8C3FF04", - "UMaskExt": "0x00C8C3FF", - "Unit": "CHA" + "UMask": "0x5", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_PMM", + "BriefDescription": ": UPI - All Channels", + "EventCode": "0x5d", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.UPI_ALLCH", "PerPkg": "1", - "UMask": "0x00c8168a01", - "UMaskExt": "0x00c8168a", - "Unit": "CHA" + "UMask": "0xa", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_PMM", + "BriefDescription": ": XPT - All Channels", + "EventCode": "0x5d", + "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH", "PerPkg": "1", - "UMask": "0x00c8170a01", - "UMaskExt": "0x00c8170a", - "Unit": "CHA" + "UMask": "0x5", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_LOCAL_DDR", + "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH", "PerPkg": "1", - "UMask": "0x00c8168601", - "UMaskExt": "0x00c81686", - "Unit": "CHA" + "UMask": "0xa", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE_DDR", + "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels", + "EventCode": "0x56", + "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH", "PerPkg": "1", - "UMask": "0x00c8170601", - "UMaskExt": "0x00c81706", - "Unit": "CHA" + "PublicDescription": "Prefetch CAM Inserts : XPT -All Channels", + "UMask": "0x5", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_PMM", + "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations", + "EventCode": "0x02", + "EventName": "UNC_M2M_RxC_AD_INSERTS", "PerPkg": "1", - "UMask": "0x00c8978a01", - "UMaskExt": "0x00c8978a", - "Unit": "CHA" + "UMask": "0x1", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_PMM", + "BriefDescription": "AD Ingress (from CMS) Occupancy", + "EventCode": "0x03", + "EventName": "UNC_M2M_RxC_AD_OCCUPANCY", "PerPkg": "1", - "UMask": "0x00c8968a01", - "UMaskExt": "0x00c8968a", - "Unit": "CHA" + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_PMM", + "BriefDescription": "Tracker Inserts : Channel 0", + "EventCode": "0x32", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH0", "PerPkg": "1", - "UMask": "0x00c8970a01", - "UMaskExt": "0x00c8970a", - "Unit": "CHA" + "UMask": "0x104", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_DDR", + "BriefDescription": "Tracker Inserts : Channel 1", + "EventCode": "0x32", + "EventName": "UNC_M2M_TRACKER_INSERTS.CH1", "PerPkg": "1", - "UMask": "0x00c8978601", - "UMaskExt": "0x00c89786", - "Unit": "CHA" + "UMask": "0x204", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_LOCAL_DDR", + "BriefDescription": "Tracker Occupancy : Channel 0", + "EventCode": "0x33", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0", "PerPkg": "1", - "UMask": "0x00c8968601", - "UMaskExt": "0x00c89686", - "Unit": "CHA" + "UMask": "0x1", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_REMOTE_DDR", + "BriefDescription": "Tracker Occupancy : Channel 1", + "EventCode": "0x33", + "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1", "PerPkg": "1", - "UMask": "0x00c8970601", - "UMaskExt": "0x00c89706", - "Unit": "CHA" + "UMask": "0x2", + "Unit": "M2M" }, { - "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that Missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_LOCAL", + "BriefDescription": "M2P Clockticks", + "EventCode": "0x01", + "EventName": "UNC_M2P_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00c80efe01", - "UMaskExt": "0x00c80efe", - "Unit": "CHA" + "PublicDescription": "Number of M2P clock cycles while the event is enabled", + "Unit": "M2PCIe" }, { - "BriefDescription": "TOR Occupancy : CRd issued by iA Cores that Missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_REMOTE", + "BriefDescription": "CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M2P_CMS_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00c80f7e01", - "UMaskExt": "0x00c80f7e", - "Unit": "CHA" + "Unit": "M2PCIe" }, { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_LOCAL", + "BriefDescription": "M3UPI Clockticks", + "EventCode": "0x01", + "EventName": "UNC_M3UPI_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00c88efe01", - "UMaskExt": "0x00c88efe", - "Unit": "CHA" + "PublicDescription": "Number of M2UPI clock cycles while the event is enabled", + "Unit": "M3UPI" }, { - "BriefDescription": "TOR Occupancy : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD_PREF_REMOTE", + "BriefDescription": "M3UPI CMS Clockticks", + "EventCode": "0xc0", + "EventName": "UNC_M3UPI_CMS_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00c88f7e01", - "UMaskExt": "0x00c88f7e", - "Unit": "CHA" + "Unit": "M3UPI" }, { - "BriefDescription": "TOR Occupancy : CLFlushes issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSH", + "BriefDescription": "D2C Sent", + "EventCode": "0x2b", + "EventName": "UNC_M3UPI_D2C_SENT", "PerPkg": "1", - "UMask": "0x00c8c7ff01", - "UMaskExt": "0x00c8c7ff", - "Unit": "CHA" + "PublicDescription": "D2C Sent : Count cases BL sends direct to core", + "Unit": "M3UPI" }, { - "BriefDescription": "TOR Occupancy : CLFlushOpts issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_CLFLUSHOPT", + "BriefDescription": "D2U Sent", + "EventCode": "0x2a", + "EventName": "UNC_M3UPI_D2U_SENT", "PerPkg": "1", - "UMask": "0x00c8d7ff01", - "UMaskExt": "0x00c8d7ff", - "Unit": "CHA" + "PublicDescription": "D2U Sent : Cases where SMI3 sends D2U command", + "Unit": "M3UPI" }, { - "BriefDescription": "TOR Occupancy : ItoMCacheNears issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOMCACHENEAR", + "BriefDescription": "FlowQ Generated Prefetch", + "EventCode": "0x29", + "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN", "PerPkg": "1", - "UMask": "0x00cd47ff01", - "UMaskExt": "0x00cd47ff", - "Unit": "CHA" + "PublicDescription": "FlowQ Generated Prefetch : Count cases where FlowQ causes spawn of Prefetch to iMC/SMI3 target", + "Unit": "M3UPI" }, { - "BriefDescription": "TOR Occupancy : SpecItoMs issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_SPECITOM", + "BriefDescription": "UPI Clockticks", + "EventCode": "0x01", + "EventName": "UNC_UPI_CLOCKTICKS", "PerPkg": "1", - "UMask": "0x00cc57ff01", - "UMaskExt": "0x00cc57ff", - "Unit": "CHA" + "PublicDescription": "Number of UPI LL clock cycles while the event is enabled", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WBMTOI", + "BriefDescription": "Direct packet attempts : D2C", + "EventCode": "0x12", + "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C", "PerPkg": "1", - "UMask": "0x00cc27ff01", - "UMaskExt": "0x00cc27ff", - "Unit": "CHA" + "PublicDescription": "Direct packet attempts : D2C : Counts the number of DRS packets that we attempted to do direct2core/direct2UPI on. There are 4 mutually exclusive filters. Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases. Note that this does not count packets that are not candidates for Direct2Core. The only candidates for Direct2Core are DRS packets destined for Cbos.", + "UMask": "0x1", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_ITOM", + "BriefDescription": "Cycles in L1", + "EventCode": "0x21", + "EventName": "UNC_UPI_L1_POWER_CYCLES", "PerPkg": "1", - "UMask": "0x00cc47ff01", - "UMaskExt": "0x00cc47ff", - "Unit": "CHA" + "PublicDescription": "Cycles in L1 : Number of UPI qfclk cycles spent in L1 power mode. L1 is a mode that totally shuts down a UPI link. Use edge detect to count the number of instances when the UPI link entered L1. Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another. Because L1 totally shuts down the link, it takes a good amount of time to exit this mode.", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that Hit LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_HIT_ITOM", + "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB", "PerPkg": "1", - "UMask": "0x00cc47fd01", - "UMaskExt": "0x00cc47fd", - "Unit": "CHA" + "PublicDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass : Matches on Receive path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xe", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : ItoMs issued by iA Cores that Missed LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_ITOM", + "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC", "PerPkg": "1", - "UMask": "0x00cc47fe01", - "UMaskExt": "0x00cc47fe", - "Unit": "CHA" + "PublicDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x10e", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : UCRdFs issued by iA Cores that Missed LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_UCRDF", + "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS", "PerPkg": "1", - "UMask": "0x00c877de01", - "UMaskExt": "0x00c877de", - "Unit": "CHA" + "PublicDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard : Matches on Receive path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xf", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WiLs issued by iA Cores that Missed LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WIL", + "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard, Match Opcode", + "EventCode": "0x05", + "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC", "PerPkg": "1", - "UMask": "0x00c87fde01", - "UMaskExt": "0x00c87fde", - "Unit": "CHA" + "PublicDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard, Match Opcode : Matches on Receive path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x10f", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCILF", + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0", "PerPkg": "1", - "UMask": "0x00c867ff01", - "UMaskExt": "0x00c867ff", - "Unit": "CHA" + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 0 : Counts the number of times that an incoming flit was able to bypass the flit buffer and pass directly across the BGF and into the Egress. This is a latency optimization, and should generally be the common case. If this value is less than the number of flits transferred, it implies that there was queueing getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x1", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLF issued by iA Cores that Missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF", + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1", "PerPkg": "1", - "UMask": "0x00c867fe01", - "UMaskExt": "0x00c867fe", - "Unit": "CHA" + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 1 : Counts the number of times that an incoming flit was able to bypass the flit buffer and pass directly across the BGF and into the Egress. This is a latency optimization, and should generally be the common case. If this value is less than the number of flits transferred, it implies that there was queueing getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x2", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_PMM", + "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2", + "EventCode": "0x31", + "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2", "PerPkg": "1", - "UMask": "0x00c8678a01", - "UMaskExt": "0x00c8678a", - "Unit": "CHA" + "PublicDescription": "RxQ Flit Buffer Bypassed : Slot 2 : Counts the number of times that an incoming flit was able to bypass the flit buffer and pass directly across the BGF and into the Egress. This is a latency optimization, and should generally be the common case. If this value is less than the number of flits transferred, it implies that there was queueing getting onto the ring, and thus the transactions saw higher latency.", + "UMask": "0x4", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_PMM", + "BriefDescription": "Valid Flits Received : All Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA", "PerPkg": "1", - "UMask": "0x00c8668a01", - "UMaskExt": "0x00c8668a", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : All Data : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0xf", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_PMM", + "BriefDescription": "Null FLITs received from any slot", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL", "PerPkg": "1", - "UMask": "0x00c8670a01", - "UMaskExt": "0x00c8670a", - "Unit": "CHA" + "UMask": "0x27", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCILF_DDR", + "BriefDescription": "Valid Flits Received : Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.DATA", "PerPkg": "1", - "UMask": "0x00c8678601", - "UMaskExt": "0x00c86786", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Data : Shows legal flit time (hides impact of L0p and L0c). : Count Data Flits (which consume all slots), but how much to count is based on Slot0-2 mask, so count can be 0-3 depending on which slots are enabled for counting..", + "UMask": "0x8", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCILF_DDR", + "BriefDescription": "Valid Flits Received : Idle", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.IDLE", "PerPkg": "1", - "UMask": "0x00c8668601", - "UMaskExt": "0x00c86686", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Idle : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCILF_DDR", + "BriefDescription": "Valid Flits Received : LLCRD Not Empty", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.LLCRD", "PerPkg": "1", - "UMask": "0x00c8670601", - "UMaskExt": "0x00c86706", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : LLCRD Not Empty : Shows legal flit time (hides impact of L0p and L0c). : Enables counting of LLCRD (with non-zero payload). This only applies to slot 2 since LLCRD is only allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_WCIL", + "BriefDescription": "Valid Flits Received : LLCTRL", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.LLCTRL", "PerPkg": "1", - "UMask": "0x00c86fff01", - "UMaskExt": "0x00c86fff", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : LLCTRL : Shows legal flit time (hides impact of L0p and L0c). : Equivalent to an idle packet. Enables counting of slot 0 LLCTRL messages.", + "UMask": "0x40", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores that Missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL", + "BriefDescription": "Valid Flits Received : All Non Data", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.NON_DATA", "PerPkg": "1", - "UMask": "0x00c86ffe01", - "UMaskExt": "0x00c86ffe", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : All Non Data : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x97", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_PMM", + "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Empty", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.NULL", "PerPkg": "1", - "UMask": "0x00c86f8a01", - "UMaskExt": "0x00c86f8a", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Slot NULL or LLCRD Empty : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all zeros is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dual slot. This can apply to slot 0,1, or 2.", + "UMask": "0x20", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_PMM", + "BriefDescription": "Valid Flits Received : Protocol Header", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.PROTHDR", "PerPkg": "1", - "UMask": "0x00c86e8a01", - "UMaskExt": "0x00c86e8a", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Protocol Header : Shows legal flit time (hides impact of L0p and L0c). : Enables count of protocol headers in slot 0,1,2 (depending on slot uMask bits)", + "UMask": "0x80", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_PMM", + "BriefDescription": "Valid Flits Received : Slot 0", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT0", "PerPkg": "1", - "UMask": "0x00c86f0a01", - "UMaskExt": "0x00c86f0a", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Slot 0 : Shows legal flit time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits determine types of headers to count.", + "UMask": "0x1", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_WCIL_DDR", + "BriefDescription": "Valid Flits Received : Slot 1", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT1", "PerPkg": "1", - "UMask": "0x00c86f8601", - "UMaskExt": "0x00c86f86", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Slot 1 : Shows legal flit time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits determine types of headers to count.", + "UMask": "0x2", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LOCAL_WCIL_DDR", + "BriefDescription": "Valid Flits Received : Slot 2", + "EventCode": "0x03", + "EventName": "UNC_UPI_RxL_FLITS.SLOT2", "PerPkg": "1", - "UMask": "0x00c86e8601", - "UMaskExt": "0x00c86e86", - "Unit": "CHA" + "PublicDescription": "Valid Flits Received : Slot 2 : Shows legal flit time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits determine types of headers to count.", + "UMask": "0x4", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_REMOTE_WCIL_DDR", + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT0", "PerPkg": "1", - "UMask": "0x00c86f0601", - "UMaskExt": "0x00c86f06", - "Unit": "CHA" + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 0 : Number of allocations into the UPI Rx Flit Buffer. Generally, when data is transmitted across UPI, it will bypass the RxQ and pass directly to the ring interface. If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency. This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.", + "UMask": "0x1", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : WbMtoIs issued by IO Devices", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_WBMTOI", + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT1", "PerPkg": "1", - "UMask": "0x00cc23ff04", - "UMaskExt": "0x00cc23ff", - "Unit": "CHA" + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 1 : Number of allocations into the UPI Rx Flit Buffer. Generally, when data is transmitted across UPI, it will bypass the RxQ and pass directly to the ring interface. If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency. This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.", + "UMask": "0x2", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : CLFlushes issued by IO Devices", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_CLFLUSH", + "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2", + "EventCode": "0x30", + "EventName": "UNC_UPI_RxL_INSERTS.SLOT2", "PerPkg": "1", - "UMask": "0x00c8c3ff04", - "UMaskExt": "0x00c8c3ff", - "Unit": "CHA" + "PublicDescription": "RxQ Flit Buffer Allocations : Slot 2 : Number of allocations into the UPI Rx Flit Buffer. Generally, when data is transmitted across UPI, it will bypass the RxQ and pass directly to the ring interface. If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency. This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.", + "UMask": "0x4", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_HIT_ITOMCACHENEAR", + "BriefDescription": "RxQ Occupancy - All Packets : Slot 0", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0", "PerPkg": "1", - "UMask": "0x00cd43fd04", - "UMaskExt": "0x00cd43fd", - "Unit": "CHA" + "PublicDescription": "RxQ Occupancy - All Packets : Slot 0 : Accumulates the number of elements in the UPI RxQ in each cycle. Generally, when data is transmitted across UPI, it will bypass the RxQ and pass directly to the ring interface. If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency. This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x1", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.IO_MISS_ITOMCACHENEAR", + "BriefDescription": "RxQ Occupancy - All Packets : Slot 1", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1", "PerPkg": "1", - "UMask": "0x00cd43fe04", - "UMaskExt": "0x00cd43fe", - "Unit": "CHA" + "PublicDescription": "RxQ Occupancy - All Packets : Slot 1 : Accumulates the number of elements in the UPI RxQ in each cycle. Generally, when data is transmitted across UPI, it will bypass the RxQ and pass directly to the ring interface. If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency. This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x2", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : PMM Access", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.PMM", + "BriefDescription": "RxQ Occupancy - All Packets : Slot 2", + "EventCode": "0x32", + "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2", "PerPkg": "1", - "UMaskExt": "0x00000008", - "Unit": "CHA" + "PublicDescription": "RxQ Occupancy - All Packets : Slot 2 : Accumulates the number of elements in the UPI RxQ in each cycle. Generally, when data is transmitted across UPI, it will bypass the RxQ and pass directly to the ring interface. If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency. This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.", + "UMask": "0x4", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Inserts : PMM Access", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.PMM", + "BriefDescription": "Cycles in L0p", + "EventCode": "0x27", + "EventName": "UNC_UPI_TxL0P_POWER_CYCLES", "PerPkg": "1", - "UMaskExt": "0x00000008", - "Unit": "CHA" + "PublicDescription": "Cycles in L0p : Number of UPI qfclk cycles spent in L0p power mode. L0p is a mode where we disable 1/2 of the UPI lanes, decreasing our bandwidth in order to save power. It increases snoop and data transfer latencies and decreases overall bandwidth. This mode can be very useful in NUMA optimized workloads that largely only utilize UPI for snoops and their responses. Use edge detect to count the number of instances when the UPI link entered L0p. Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another.", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Occupancy : DDR Access", - "CounterType": "PGMABLE", - "EventCode": "0x36", - "EventName": "UNC_CHA_TOR_OCCUPANCY.DDR", + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB", "PerPkg": "1", - "UMaskExt": "0x00000004", - "Unit": "CHA" + "PublicDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass : Matches on Transmit path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xe", + "Unit": "UPI LL" }, { - "BriefDescription": "TOR Inserts : DDR Access", - "Counter": "0,1,2,3", - "CounterType": "PGMABLE", - "EventCode": "0x35", - "EventName": "UNC_CHA_TOR_INSERTS.DDR", + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC", "PerPkg": "1", - "UMaskExt": "0x00000004", - "Unit": "CHA" + "PublicDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x10e", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard : Matches on Transmit path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0xf", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard, Match Opcode", + "EventCode": "0x04", + "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC", + "PerPkg": "1", + "PublicDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard, Match Opcode : Matches on Transmit path of a UPI port.\r\nMatch based on UMask specific bits:\r\nZ: Message Class (3-bit)\r\nY: Message Class Enable\r\nW: Opcode (4-bit)\r\nV: Opcode Enable\r\nU: Local Enable\r\nT: Remote Enable\r\nS: Data Hdr Enable\r\nR: Non-Data Hdr Enable\r\nQ: Dual Slot Hdr Enable\r\nP: Single Slot Hdr Enable\r\nLink Layer control types are excluded (LL CTRL, slot NULL, LLCRD) even under specific opcode match_en cases.\r\nNote: If Message Class is disabled, we expect opcode to also be disabled.", + "UMask": "0x10f", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Tx Flit Buffer Bypassed", + "EventCode": "0x41", + "EventName": "UNC_UPI_TxL_BYPASSED", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Bypassed : Counts the number of times that an incoming flit was able to bypass the Tx flit buffer and pass directly out the UPI Link. Generally, when data is transmitted across UPI, it will bypass the TxQ and pass directly to the link. However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link.", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : All Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Data : Counts number of data flits across this UPI link.", + "UMask": "0xf", + "Unit": "UPI LL" + }, + { + "BriefDescription": "All Null Flits", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL", + "PerPkg": "1", + "UMask": "0x27", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Data : Shows legal flit time (hides impact of L0p and L0c). : Count Data Flits (which consume all slots), but how much to count is based on Slot0-2 mask, so count can be 0-3 depending on which slots are enabled for counting..", + "UMask": "0x8", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Idle", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.IDLE", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Idle : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x47", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : LLCRD Not Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.LLCRD", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : LLCRD Not Empty : Shows legal flit time (hides impact of L0p and L0c). : Enables counting of LLCRD (with non-zero payload). This only applies to slot 2 since LLCRD is only allowed in slot 2", + "UMask": "0x10", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : LLCTRL", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.LLCTRL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : LLCTRL : Shows legal flit time (hides impact of L0p and L0c). : Equivalent to an idle packet. Enables counting of slot 0 LLCTRL messages.", + "UMask": "0x40", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : All Non Data", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.NON_DATA", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : All Non Data : Shows legal flit time (hides impact of L0p and L0c).", + "UMask": "0x97", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.NULL", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty : Shows legal flit time (hides impact of L0p and L0c). : LLCRD with all zeros is treated as NULL. Slot 1 is not treated as NULL if slot 0 is a dual slot. This can apply to slot 0,1, or 2.", + "UMask": "0x20", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Protocol Header", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.PROTHDR", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Protocol Header : Shows legal flit time (hides impact of L0p and L0c). : Enables count of protocol headers in slot 0,1,2 (depending on slot uMask bits)", + "UMask": "0x80", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 0", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT0", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 0 : Shows legal flit time (hides impact of L0p and L0c). : Count Slot 0 - Other mask bits determine types of headers to count.", + "UMask": "0x1", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 1", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT1", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 1 : Shows legal flit time (hides impact of L0p and L0c). : Count Slot 1 - Other mask bits determine types of headers to count.", + "UMask": "0x2", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Valid Flits Sent : Slot 2", + "EventCode": "0x02", + "EventName": "UNC_UPI_TxL_FLITS.SLOT2", + "PerPkg": "1", + "PublicDescription": "Valid Flits Sent : Slot 2 : Shows legal flit time (hides impact of L0p and L0c). : Count Slot 2 - Other mask bits determine types of headers to count.", + "UMask": "0x4", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Tx Flit Buffer Allocations", + "EventCode": "0x40", + "EventName": "UNC_UPI_TxL_INSERTS", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Allocations : Number of allocations into the UPI Tx Flit Buffer. Generally, when data is transmitted across UPI, it will bypass the TxQ and pass directly to the link. However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link. This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.", + "Unit": "UPI LL" + }, + { + "BriefDescription": "Tx Flit Buffer Occupancy", + "EventCode": "0x42", + "EventName": "UNC_UPI_TxL_OCCUPANCY", + "PerPkg": "1", + "PublicDescription": "Tx Flit Buffer Occupancy : Accumulates the number of flits in the TxQ. Generally, when data is transmitted across UPI, it will bypass the TxQ and pass directly to the link. However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link. This can be used with the cycles not empty event to track average occupancy, or the allocations event to track average lifetime in the TxQ.", + "Unit": "UPI LL" } ] |