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Update the existing example in the general mpic binding to have a
separate TCRx region. Currently the example doesn't describe TCRx at
all. The one upstream device tree with an mpic timer node (p1022ds)
uses one large reg region to describe both, even though there are other
unrelated registers in between. That device tree also contains a bogus
interrupt specifier, and there's no upstream software that uses this yet,
so changing this shouldn't be a problem.
Add a full binding for the MPIC timer node, not just an example of
4-cell interrupts in the MPIC binding.
Add fsl,available-ranges, similar to msi-available-ranges.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
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Define the binding for compatible = "fsl,mpic", including the definition
of 4-cell interrupt specifiers. The 3rd and 4th cells are needed to
define additional types of interrupt source outside the "normal" external
and internal interrupts in FSL SoCs. Define error interrupt, IPIs, and
PIC timer sources.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The device tree is used by more than just PowerPC. Make the documentation
directory available to all.
v2: reorganized files while moving to create arch and driver specific
directories.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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