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path: root/Documentation/devicetree/bindings/riscv
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2022-06-02dt-bindings: riscv: microchip: add polarberry compatible stringConor Dooley1-0/+1
2022-06-02dt-bindings: riscv: microchip: document icicle reference designConor Dooley1-0/+1
2022-04-02dt-bindings: Fix phandle-array issues in the idle-states bindingsPalmer Dabbelt1-0/+2
2022-03-31RISC-V CPU Idle SupportPalmer Dabbelt1-0/+6
2022-03-10dt-bindings: Add common bindings for ARM and RISC-V idle statesAnup Patel1-0/+6
2022-02-23MAINTAINERS: sifive: drop Yash ShahKrzysztof Kozlowski1-1/+0
2021-09-21dt-bindings: riscv: correct e51 and u54-mc CPU bindingsKrzysztof Kozlowski1-2/+6
2021-09-05Merge tag 'riscv-for-linus-5.15-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+27
2021-08-20dt-bindings: sifive-l2-cache: Fix 'select' matchingRob Herring1-4/+4
2021-08-04dt-bindings: riscv: add starfive jh7100 bindingsDrew Fustini1-0/+27
2021-06-21dt-bindings: Drop redundant minItems/maxItemsRob Herring1-1/+0
2021-04-26dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoCAtish Patra1-0/+27
2021-02-26Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds4-9/+97
2021-02-23dt-bindings: update risc-v cpu propertiesDamien Le Moal1-0/+2
2021-02-23dt-bindings: add Canaan boards compatible stringsDamien Le Moal1-0/+47
2021-01-12dt-bindings: Add missing array size constraintsRob Herring1-0/+1
2021-01-08dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched boardYash Shah1-5/+12
2021-01-08dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoCYash Shah1-0/+6
2021-01-08dt-bindings: riscv: Update l2 cache DT documentation to add support for SiFiv...Yash Shah1-4/+30
2020-10-27dt-bindings: Explicitly allow additional properties in board/SoC schemasRob Herring1-0/+3
2020-10-27dt-bindings: More whitespace clean-ups in schema filesRob Herring1-2/+2
2020-10-07dt-bindings: Explicitly allow additional properties in common schemasRob Herring1-0/+2
2020-10-01dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schemaSagar Kadam2-51/+98
2020-05-03dt-bindings: Remove cases of 'allOf' containing a '$ref'Rob Herring1-11/+9
2019-10-23dt-bindings: riscv: Fix CPU schema errorsRob Herring1-16/+13
2019-08-09dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed...Paul Walmsley1-1/+1
2019-08-09dt-bindings: riscv: remove obsolete cpus.txtPaul Walmsley2-162/+12
2019-08-09dt-bindings: Update the riscv,isa string descriptionAtish Patra1-0/+4
2019-07-21dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodesRob Herring1-82/+61
2019-06-26dt-bindings: riscv: resolve 'make dt_binding_check' warningsPaul Walmsley1-12/+14
2019-06-17dt-bindings: riscv: convert cpu binding to json-schemaPaul Walmsley1-0/+168
2019-06-17dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540Paul Walmsley1-0/+25
2019-05-17RISC-V: Add DT documentation for SiFive L2 Cache ControllerYash Shah1-0/+51
2017-09-26dt-bindings: RISC-V CPU BindingsPalmer Dabbelt1-0/+162