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path: root/arch/arc/include/asm/mmu.h
AgeCommit message (Expand)AuthorFilesLines
2021-08-26ARC: mm: disintegrate mmu.h (arcv2 bits out)Vineet Gupta1-78/+2
2021-08-25ARC: mm: move MMU specific bits out of entry code ...Vineet Gupta1-0/+8
2021-08-25ARC: mm: move MMU specific bits out of ASID allocatorVineet Gupta1-0/+13
2021-08-25ARC: mm: move mmu/cache externs out to setup.hVineet Gupta1-4/+0
2021-08-25ARC: mm: remove tlb paranoid codeVineet Gupta1-6/+0
2021-08-25ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 onlyVineet Gupta1-4/+0
2021-08-25ARC: retire MMUv1 and MMUv2 supportVineet Gupta1-18/+4
2019-10-28ARC: mm: tlb flush optim: Make TLBWriteNI fallback to TLBWrite if not availableVineet Gupta1-0/+2
2019-10-28ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch regVineet Gupta1-0/+4
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2017-08-04ARCv2: PAE40: set MSB even if !CONFIG_ARC_HAS_PAE40 but PAE exists in SoCVineet Gupta1-0/+2
2017-05-05ARC: mm: fix build failure in linux-next for UP buildsVineet Gupta1-0/+4
2015-10-29ARC: mm: PAE40 supportVineet Gupta1-0/+7
2015-06-22ARCv2: MMUv4: TLB programming Model changesVineet Gupta1-1/+23
2013-11-06ARC: [SMP] ASID allocationVineet Gupta1-1/+1
2013-09-05ARC: fix new Section mismatches in build (post __cpuinit cleanup)Vineet Gupta1-1/+1
2013-08-30ARC: [ASID] Track ASID allocation cycles/generationsVineet Gupta1-1/+1
2013-08-30ARC: [ASID] Refactor the TLB paranoid debug codeVineet Gupta1-1/+1
2013-08-30ARC: [ASID] Remove legacy/unused debug codeVineet Gupta1-3/+0
2013-08-30ARC: MMUv4 preps/3 - Abstract out TLB Insert/DeleteVineet Gupta1-0/+2
2013-06-22ARC: Disintegrate arcregs.hVineet Gupta1-0/+36
2013-06-22ARC: Use kconfig helper IS_ENABLED() to get rid of defines.hVineet Gupta1-0/+8
2013-02-15ARC: MMU Context ManagementVineet Gupta1-0/+23