summaryrefslogtreecommitdiff
path: root/arch/arc
AgeCommit message (Expand)AuthorFilesLines
2015-09-02Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-1/+2
2015-08-27ARCv2: entry: Fix reserved handlerVineet Gupta1-7/+2
2015-08-27ARCv2: perf: Finally introduce HS perf unitVineet Gupta2-2/+6
2015-08-27ARCv2: perf: SMP supportAlexey Brodkin1-15/+54
2015-08-27ARCv2: perf: implement exclusion of event counting in user or kernel modeAlexey Brodkin2-2/+17
2015-08-27ARCv2: perf: Support sampling events using overflow interruptsAlexey Brodkin2-10/+126
2015-08-27ARCv2: perf: implement "event_set_period"Alexey Brodkin1-16/+63
2015-08-27ARC: perf: cap the number of counters to hardware max of 32Vineet Gupta2-5/+6
2015-08-21ARC: Eliminate some ARCv2 specific code for ARCompact buildVineet Gupta2-28/+34
2015-08-20ARC: add/fix some comments in code - no functional changeVineet Gupta6-22/+23
2015-08-20ARC: change some branchs to jumps to resolve linkage errorsYuriy Kolerov3-9/+9
2015-08-20ARC: ensure futex ops are atomic in !LLSC configVineet Gupta1-0/+12
2015-08-20ARC: Enable HAVE_FUTEX_CMPXCHGVineet Gupta1-0/+1
2015-08-20ARC: make futex_atomic_cmpxchg_inatomic() return bimodalVineet Gupta1-9/+11
2015-08-20ARC: futex cosmeticsVineet Gupta1-8/+9
2015-08-20ARC: add barriers to futex codeVineet Gupta1-11/+10
2015-08-20ARCv2: IOC: Allow boot time disableAlexey Brodkin1-3/+4
2015-08-20ARCv2: SLC: Allow boot time disableVineet Gupta1-2/+19
2015-08-20ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin4-16/+125
2015-08-11ARC: Enable optimistic spinning for LLSC configVineet Gupta1-0/+1
2015-08-07ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoffVineet Gupta2-4/+2
2015-08-05ARC: Make pt_regs regs unsignedVineet Gupta2-37/+37
2015-08-04ARCv2: spinlock/rwlock: Reset retry delay when starting a new spin-wait cycleVineet Gupta1-3/+3
2015-08-04ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponentia...Vineet Gupta4-4/+347
2015-08-04ARC: LLOCK/SCOND based rwlockVineet Gupta2-10/+166
2015-08-04ARC: LLOCK/SCOND based spin_lockVineet Gupta1-7/+69
2015-08-04ARC: refactor atomic inline asm operands with symbolic namesVineet Gupta1-15/+17
2015-08-04Revert "ARCv2: STAR 9000837815 workaround hardware exclusive transactions liv...Vineet Gupta1-12/+2
2015-08-04ARCv2: [axs103_smp] Reduce clk for Quad FPGA configsVineet Gupta1-0/+15
2015-08-03ARCv2: Fix the peripheral address space detectionVineet Gupta2-5/+10
2015-07-31arc/irq: Prepare idu_cascade_isr for irq argument removalThomas Gleixner1-1/+2
2015-07-23ARCv2: allow selection of page size for MMUv4Alexey Brodkin1-2/+2
2015-07-20ARCv2: lib: memset: Don't assume 64-bit load/storesVineet Gupta1-7/+36
2015-07-20ARCv2: lib: memcpy: Missing PREFETCHWVineet Gupta1-1/+1
2015-07-20ARCv2: add knob for DIV_REV in KconfigAlexey Brodkin2-1/+13
2015-07-20ARC/time: Migrate to new 'set-state' interfaceViresh Kumar1-25/+15
2015-07-18mm: clean up per architecture MM hook header filesLaurent Dufour2-15/+1
2015-07-13ARCv2: support HS38 releasesVineet Gupta1-1/+5
2015-07-13ARC: make sure instruction_pointer() returns unsigned valueAlexey Brodkin1-1/+1
2015-07-09ARC: slightly refactor macros for boot loggingVineet Gupta1-4/+5
2015-07-09ARC: Add llock/scond to futex backendVineet Gupta1-6/+42
2015-07-09arc:irqchip: prepare for drivers/irqchip/irqchip.h removalJoël Porquet3-3/+0
2015-07-09ARC: Make ARC bitops "safer" (add anti-optimization)Vineet Gupta1-26/+9
2015-07-09ARCv2: [axs103] bump CPU frequency from 75 to 90 MHZAlexey Brodkin2-2/+2
2015-07-06ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handlerVineet Gupta1-2/+1
2015-07-06ARCv2: intc: IDU: support irq affinityVineet Gupta1-1/+18
2015-07-06ARC: fix unused var wanringVineet Gupta1-1/+0
2015-07-06ARC: Don't memzero twice in dma_alloc_coherent for __GFP_ZEROVineet Gupta1-2/+2
2015-07-06ARC: Override toplevel default -O2 with -O3Vineet Gupta1-1/+2
2015-07-06ARCv2: guard SLC DMA ops with spinlockAlexey Brodkin1-2/+10