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2020-03-26arm: dts: calxeda: Group port-phys and sgpio-gpio itemsAndre Przywara1-4/+5
For proper bindings checks we need to properly group the port-phys and sgpio-gpio items, so that they match the expected number of items. Link: https://lore.kernel.org/r/20200228135106.220620-5-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-26arm: dts: calxeda: Fix interrupt groupingAndre Przywara1-2/+2
Currently multiple interrupts for some devices are written as one array instead of using the DT grouping notation (<0 42 4>, <0 23 4>). This ends up in the same binary representation in the .dtb, but is semantically not equivalent. The yaml schema checks will stumble over this, so lets fix that first. I refrained from using the symbolic names for GIC_SPI/GIC_PPI and IRQ_TYPE_LEVEL_HIGH, mostly because it increases the delta between the original DTS files and the mainline versions, so it's just additional churn. Link: https://lore.kernel.org/r/20200228135106.220620-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-26arm: dts: calxeda: Provide UART clockAndre Przywara1-2/+2
The PL011 UART binding requires two clocks to be named in a node. Add the second clock, which is the bus gate, that just gets enabled. Since this is a fixed clock anyway, it doesn't make any difference. Link: https://lore.kernel.org/r/20200228135106.220620-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner1-12/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-11-19Merge tag 'edac_for_3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds1-6/+0
Pull EDAC updates from Borislav Petkov: "Following up on last week's discussion, here's my part of the EDAC pile, highlights in the signed tag. The last two patches have a date from just now because I've just applied them to the tree after Johannes sent them to me earlier. I decided to forward them now because they're trivial. There's a third one for MPC85xx which adds PCIe error interrupt support but since it is not so trivial and hasn't seen any linux-next time, I'm deferring it to 3.14 EDAC update highlights: - Support for Calxeda ECX-2000 memory controller, from Robert Richter - Misc Calxeda Highbank drivers and EDAC core cleanups, from Rob Herring and Robert Richter - New maintainer for Freescale's MPC85xx EDAC driver: Johannes Thumshirn" * tag 'edac_for_3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: edac/85xx: Remove mpc85xx_pci_err_remove EDAC: Add edac-mpc85xx driver to MAINTAINERS edac, highbank: Moving error injection to sysfs for edac edac, highbank: Add MAINTAINERS entry edac: Unify reporting of device info for device, mc and pci edac, highbank: Improve and unify naming edac, highbank: Add Calxeda ECX-2000 support ARM: dts: calxeda: move memory-controller node out of ecx-common.dtsi edac, highbank: Fix interrupt setup of mem and l2 controller
2013-11-05ARM: dts: calxeda: move memory-controller node out of ecx-common.dtsiRob Herring1-6/+0
The DDR controller is slightly different in ECX-2000 and ECX-1000, so we need to have different nodes for each platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> [Device Tree documentation updated.] Signed-off-by: Robert Richter <rric@kernel.org>
2013-10-02dts: calxeda: add ARM PSCI bindingRob Herring1-0/+8
Add the PSCI binding node for Calxeda SOCs. Only claiming "arm,psci" support since there is no agreement on 0.2 binding definition. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org
2013-06-07sata highbank: add bit-banged SGPIO driver supportMark Langsdorf1-0/+2
Highbank supports SGPIO by bit-banging out the SGPIO signals over three GPIO pins defined in the DTB. Add support for this SGPIO functionality. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2012-10-31ARM: dts: Add Calxeda ECX-2000 supportRob Herring1-0/+237
Separate out common dts pieces from highbank dts and add support for Calxeda ECX-2000 (Midway) SOC. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de>