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path: root/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi
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2020-02-13ARM: dts: imx6dl-yapp4: Specify USB overcurrent protection polarityMichal Vokáč1-0/+2
After reset the oc protection polarity is set to active high on imx6. If the polarity is not specified in device tree it is not changed. The imx6dl-yapp4 platform uses an active-low oc signal so explicitly configure that in the device tree. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6dl-yapp4: Enable the I2C3 bus on all board variantsMichal Vokáč1-1/+1
imx6dl-yapp4 Draco and Ursa boards use the I2C3 bus to control some external devices through the /dev files. So enable the I2C3 bus on all board variants, not just on Hydra. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6dl-yapp4: Enable UART2Michal Vokáč1-0/+13
The second UART is needed for 3D or MFD printer control. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25ARM: dts: imx6dl-yapp4: Enable the MPR121 touchkey controller on HydraMichal Vokáč1-0/+13
Add the touch keyboard present on Hydra board. The controller is connected only using I2C lines. The interrupt line is not available hence we use the polling mode. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: imx6dl-yapp4: Use correct pseudo PHY address for the switchMichal Vokáč1-2/+2
The switch is accessible through pseudo PHY which is located at 0x10. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Fixes: 87489ec3a77f ("ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-19ARM: dts: imx6dl-yapp4: Use rgmii-id phy mode on the cpu portMichal Vokáč1-1/+1
Use rgmii-id phy mode for the CPU port (MAC0) of the QCA8334 switch to add delays to both Tx and Rx clock. It worked with the rgmii mode before because the qca8k driver (incorrectly) enabled delays in that mode and rgmii-id was not implemented at all. Commit 5ecdd77c61c8 ("net: dsa: qca8k: disable delay for RGMII mode") removed the delays from the RGMII mode and hence broke the networking. To fix the problem, commit a968b5e9d587 ("net: dsa: qca8k: Enable delay for RGMII_ID mode") was introduced. Now the correct phy mode is available so use it. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-02-11ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boardsVokáč Michal1-0/+595
These are i.MX6S/DL based SBCs embedded in various Y Soft products. All share the same board design but have slightly different HW configuration. Ursa - i.MX6S SoC, 512MB RAM DDR3, 4GB eMMC, microSD - parallel WVGA 7" LCD with touch panel - 1x Eth (QCA8334 switch) - USB OTG - USB host (micro-B) Draco - i.MX6S SoC, 512MB RAM DDR3, 4GB eMMC, microSD - parallel WVGA 7" LCD with touch panel - 2x Eth (QCA8334 switch) - USB OTG - USB host (micro-B) - RGB LED (I2C LP5562) - 3.5mm audio jack + codec (LM49350) Hydra - i.MX6DL SoC, 2GB RAM DDR3, 4GB eMMC, microSD - I2C OLED display, capacitive matrix keys - 2x Eth (QCA8334 switch) - USB OTG - RGB LED (I2C LP5562) - 3.5mm audio jack + codec (LM49350) - HDMI - miniPCIe slot Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>