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2023-04-08ARM: dts: sun8i: v3s: Switch dma-names order for snps,dw-apb-uart nodesCristian Ciocaltea1-3/+3
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230321215624.78383-5-cristian.ciocaltea@collabora.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-08ARM: dts: sun8i: a23/a33: Switch dma-names order for snps,dw-apb-uart nodesCristian Ciocaltea1-5/+5
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230321215624.78383-4-cristian.ciocaltea@collabora.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-08ARM: dts: sun6i: a31: Switch dma-names order for snps,dw-apb-uart nodesCristian Ciocaltea1-6/+6
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230321215624.78383-3-cristian.ciocaltea@collabora.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-08ARM: dts: qcom: sdx55-fn980: Move "status" property to the end of nodeManivannan Sadhasivam1-7/+9
To align with rest of the devicetree files, let's move the "status" property to the end of the nodes. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230331145915.11653-2-manivannan.sadhasivam@linaro.org
2023-04-08ARM: dts: qcom: sdx55: Move reset and wake gpios to board dtsManivannan Sadhasivam2-2/+3
The reset and wake properties in the PCIe EP node belong to the board dts as they can be customized per board design. So let's move them from SoC dtsi. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230331145915.11653-1-manivannan.sadhasivam@linaro.org
2023-04-07ARM: dts: armada: Add missing phy-mode and fixed linksAndrew Lunn7-8/+16
The DSA framework has got more picky about always having a phy-mode for the CPU port. The Armada Ethernet supports RGMII, SGMII, 1000base-x and 2500Base-X. Set the switch phy-mode based on how the SoC Ethernet ports is been configured. For RGMII mode, have the switch add the delays. Additionally, the cpu label has never actually been used in the binding, so remove it. Lastly, add a fixed-link node indicating the expected speed/duplex of the link to the SoC. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07ARM: dts: orion5: Add missing phy-mode and fixed linksAndrew Lunn1-1/+6
The DSA framework has got more picky about always having a phy-mode for the CPU port. The Orion5x Ethernet is an RGMII port. Set the switch to impose the RGMII delays. Additionally, the cpu label has never actually been used in the binding, so remove it. Lastly, add a fixed-link node indicating the expected speed/duplex of the link to the SoC. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07ARM: dts: kirkwood: Add missing phy-mode and fixed linksAndrew Lunn5-5/+8
The DSA framework has got more picky about always having a phy-mode for the CPU port. The Kirkwood Ethernet is an RGMII port. Set the switch to impose the RGMII delays. Additionally, the cpu label has never actually been used in the binding, so remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-06ARM: dts: qcom: sdx65: move status properties to end of nodesAlex Elder2-6/+8
Move a few device tree "status" properties so that they are the last specified property, in "qcom-sdx65-mtp.dts" and "qcom-sdx65.dtsi". Note that properties must always be specified before sub-nodes. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327195605.2854123-3-elder@linaro.org
2023-04-06ARM: dts: qcom: sdx65: add IPA informationAlex Elder2-0/+44
Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust Zone on this platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230327195605.2854123-2-elder@linaro.org
2023-04-06Merge tag 'imx-fixes-6.3-2' of ↵Arnd Bergmann2-11/+3
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.3, 2nd round: - Fix 'reg' address length for i.MX8MP LCDIF2 device. - A couple of changes from Fabio Estevam to fix DTC warnings caused unnecessary address/size cells. - Re-enable PCI driver support in imx_v6_v7_defconfig. - Fix PMIC clock source property for imx8mm-evk board. - A couple of fixes from Peng Fan to correct off-on delay property for i.MX8 Verdin boards. * tag 'imx-fixes-6.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v6_v7_defconfig: Fix unintentional disablement of PCI ARM: dts: imx6ull-colibri: Remove unnecessary #address-cells/#size-cells ARM: dts: imx7d-remarkable2: Remove unnecessary #address-cells/#size-cells arm64: dts: imx8mp-verdin: correct off-on-delay arm64: dts: imx8mm-verdin: correct off-on-delay arm64: dts: imx8mm-evk: correct pmic clock source arm64: dts: imx8mp: fix address length for LCDIF2 Link: https://lore.kernel.org/r/20230406021602.GP11367@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-06ARM: dts: imx6ull: Add chargebyte Tarragon supportStefan Wahren6-0/+1044
This adds the support for chargebyte Tarragon, which is an Electrical Vehicle Supply Equipment (EVSE) for AC charging stations (according to IEC 61851, ISO 15118). The Tarragon board is based on an i.MX6ULL SoC and is available in 4 variants (Master, Slave, SlaveXT, Micro), which provide more or less peripherals. Supported features: * 512 MB DDR RAM * eMMC * Debug UART * 100 Mbit Ethernet * USB 2.0 Host interface * Powerline communication (QCA700x) * 2x RS485 * Digital in- and outputs (12 V) * One-Wire master for external temp sensors * 2x relay outputs * 2x motor interfaces Link: https://chargebyte.com/products/charging-station-communication/charge-control-c Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-04-06Merge tag 'linux-can-next-for-6.4-20230404-2' of ↵Jakub Kicinski2-0/+59
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2023-04-04-2 The first patch is by Oliver Hartkopp and makes the maximum pdu size of the CAN ISOTP protocol configurable. The following 5 patches are by Dario Binacchi and add support for the bxCAN controller by ST. Geert Uytterhoeven's patch for the rcar_canfd driver fixes a sparse warning. Peng Fan's patch adds an optional power-domains property to the flexcan device tree binding. Frank Jungclaus adds support for CAN_CTRLMODE_BERR_REPORTING to the esd_usb driver. The last patch is by Oliver Hartkopp and converts the USB IDs of the kvaser_usb driver to hexadecimal values. * tag 'linux-can-next-for-6.4-20230404-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next: kvaser_usb: convert USB IDs to hexadecimal values can: esd_usb: Add support for CAN_CTRLMODE_BERR_REPORTING dt-bindings: can: fsl,flexcan: add optional power-domains property can: rcar_canfd: rcar_canfd_probe(): fix plain integer in transceivers[] init can: bxcan: add support for ST bxCAN controller ARM: dts: stm32: add pin map for CAN controller on stm32f4 ARM: dts: stm32: add CAN support on stm32f429 dt-bindings: net: can: add STM32 bxcan DT bindings dt-bindings: arm: stm32: add compatible for syscon gcan node can: isotp: add module parameter for maximum pdu size ==================== Link: https://lore.kernel.org/r/20230404145908.1714400-1-mkl@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-04-05ARM: dts: imx6ull-colibri: Remove unnecessary #address-cells/#size-cellsFabio Estevam1-9/+3
Building with W=1 leads to the following dtc warning: arch/arm/boot/dts/imx6ull-colibri.dtsi:36.9-46.5: Warning (graph_child_address): /connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary Since a single port is used, 'ports' can be removed, as well as the unnecessary #address-cells/#size-cells. Fixes: bd5880e10982 ("ARM: dts: colibri-imx6ull: Enable dual-role switching") Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-04-05ARM: dts: imx7d-remarkable2: Remove unnecessary #address-cells/#size-cellsFabio Estevam1-2/+0
Building with W=1 leads to the following dtc warning: arch/arm/boot/dts/imx7d-remarkable2.dts:319.19-335.4: Warning (avoid_unnecessary_addr_size): /soc/bus@30800000/i2c@30a50000/pmic@62: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Remove unnecessary #address-cells/#size-cells to fix it. Fixes: 9076cbaa7757 ("ARM: dts: imx7d-remarkable2: Enable silergy,sy7636a") Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alistair Francis <alistair@alistair23.me> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-04-04Merge tag 'amlogic-arm-dt-for-v6.4' of ↵Arnd Bergmann3-3/+66
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM DT changes for v6.4: - adjust order of some compatibles - meson8: add the xtal_32k_out pin - meson8: add the SDXC_A pins - mxiii-plus: Enable Bluetooth and WiFi support * tag 'amlogic-arm-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: meson8m2: mxiii-plus: Enable Bluetooth and WiFi support ARM: dts: meson8: add the SDXC_A pins ARM: dts: meson8: add the xtal_32k_out pin arm: dts: meson: adjust order of some compatibles Link: https://lore.kernel.org/r/eb1f32f8-822d-9cfc-fca6-9e044bf4a5ab@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04ARM: dts: oxnas: remove obsolete device tree filesNeil Armstrong5-867/+0
Due to lack of maintainance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 devices. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'at91-dt-6.4' of ↵Arnd Bergmann4-4/+8
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 device tree updates for 6.4: It contains: - Update to maximum frequency for QSPI on several boards thanks to the additon of the new spi-cs-setup-ns property. * tag 'at91-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency Link: https://lore.kernel.org/r/20230331142751.41522-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'omap-for-v6.4/dt-overlays-signed' of ↵Arnd Bergmann6-0/+328
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree overlays for omaps for v6.4 Devicetree overlays for omaps to enable the optional LCD and touchscreen modules on am57xx-evm and am57xx-idk boards. * tag 'omap-for-v6.4/dt-overlays-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am57xx-idk: Add IDK displays and touchscreens ARM: dts: ti: Add AM57xx GP EVM Rev A3 board support ARM: dts: ti: Add AM57xx GP EVM board support Link: https://lore.kernel.org/r/pull-1680180448-508978@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'omap-for-v6.4/dt-signed' of ↵Arnd Bergmann26-71/+99
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt Devicetree changes for omaps for v6.4 Devicetree changes for omaps for gta04, Phytec am335x devices, and to drop a obsolete compatible property: - A non-urgent fix for gta04 to enable more dma channels for some audio configurations - Update the dts compatible and vendor prefixes for gta04 - A series of updates for Phytec am335x based boards to configure more devices like rtc and audio, and a few clean-up patches - A change to drop the usage of "ti,omap36xx" compatible, the driver code already checks for "ti,omap3630" that is also alread set in the dts files. This makes the yaml binding conversion a bit simpler. * tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap: Drop ti,omap36xx compatible ARM: dts: am335x-phycore-som: Remove superseded/invalid GPMC NAND type. ARM: dts: am335x-pcm-953: Remove superseded/invalid LED trigger. ARM: dts: am335x-phycore-som: Remove underscore in node names. ARM: dts: am335x-regor: Remove underscore in node names. ARM: dts: am335x-pcm-935: Remove underscore in node names. ARM: dts: am335x-wega: Change node name of sound card, remove underscores. ARM: dts: am335x-wega: Fix audio codec by using simple-audio-card driver. ARM: dts: am335x-phycore-som: Add alias for TPS65910 RTC ARM: dts: omap3-gta04: fix compatible record for GTA04 board ARM: dts: gta04: fix excess dma channel usage Link: https://lore.kernel.org/r/pull-1680180389-756753@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04Merge tag 'renesas-dts-for-v6.4-tag1' of ↵Arnd Bergmann1-6/+13
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.4 - Add USB3 support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0, - Add uSD card and eMMC support for the RZ/V2M Evaluation Kit 2.0, - Add CAN-FD, thermal, GMSL2 video capture, and sound support for the R-Car V4H SoC and the White-Hawk development board, - Add PMU support for the RZ/G2UL, RZ/G2L{,C}, and RZ/V2L SoCs, - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC, - Add I2C EEPROM support for the Atmark Techno Armadillo-800-EVA, and the Renesas Condor and ULCB development boards, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (30 commits) arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value arm64: dts: renesas: ulcb: Add I2C EEPROM for PMIC arm64: dts: renesas: condor: Add I2C EEPROM for PMIC ARM: dts: armadillo800eva: Add I2C EEPROM for MAC address arm64: dts: renesas: Remove R-Car H3 ES1.* devicetrees arm64: dts: renesas: white-hawk: Add R-Car Sound support arm64: dts: renesas: r8a779g0: R-Car Sound support arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI channels arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table arm64: dts: renesas: r9a07g054: Add Cortex-A55 PMU node arm64: dts: renesas: white-hawk-csi-dsi: Add and connect MAX96712 arm64: dts: renesas: r8a779g0: Add and connect all CSI-2, ISP and VIN nodes arm64: dts: renesas: r8a779f0: Use proper labels for thermal zones arm64: dts: renesas: r8a779g0: Add thermal nodes arm64: dts: renesas: rzv2mevk2: Add uart0 pins arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems arm64: dts: renesas: r9a07g044: Add Cortex-A55 PMU node ... Link: https://lore.kernel.org/r/cover.1679907064.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04ARM: tegra30: Use cpu* labelsMaxim Schwalm1-4/+1
Replace cpu paths with labels since those already exist in tree. Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04ARM: tegra30: peripherals: Add 266.5MHz nodesSvyatoslav Ryhel1-0/+20
LG Optimus Vu (p895) and Optimus 4X HD (p880) have 266.5MHz RAM clock and require this entry to work with it correctly. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04ARM: tegra: asus-tf101: Fix accelerometer mount matrixSvyatoslav Ryhel1-3/+3
Accelerometer mount matrix used in tf101 downstream is inverted. This new matrix was generated on actual device using calibration script, like on other transformers. Tested-by: Robert Eckelmann <longnoserob@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03ARM: dts: exynos: add mmc aliasesHenrik Grimler32-0/+134
Add aliases for eMMC, SD card and WiFi where applicable, so that assigned mmc indeces are always the same. Co-developed-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Anton Bambura <jenneron@protonmail.com> [ Tested on exynos5800-peach-pi ] Tested-by: Valentine Iourine <iourine@iourine.msk.su> Signed-off-by: Henrik Grimler <henrik@grimler.se> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230402144724.17839-3-henrik@grimler.se Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-03ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v propertyHenrik Grimler26-11/+22
Previously, the mshc0 alias has been necessary so that MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0. However, these capabilities should be described in the device tree so that we do not have to rely on the alias. The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width = <8>, which is already set for all the mshc0/mmc0 nodes, replaces MMC_CAP_8_BIT_DATA. Also drop other mshc aliases as they are not needed. Signed-off-by: Henrik Grimler <henrik@grimler.se> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230402144724.17839-2-henrik@grimler.se Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-03ARM: dts: stm32: Add QSPI support on STM32MP13x SoC familyPatrice Chotard1-0/+15
Add QSPI support on STM32MP13x SoC family Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: add FMC support on STM32MP13x SoC familyChristophe Kerello1-0/+33
Add FMC support on STM32MP13x SoC family. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: YAML validation fails for Argon BoardsPierre-Yves MORDRET1-9/+0
"make dtbs_check" gives following output : stm32mp157c-emstamp-argon.dtb: gpu@59000000: 'contiguous-area' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: YAML validation fails for Odyssey BoardsPierre-Yves MORDRET1-10/+0
"make dtbs_check" gives following output : stm32mp157c-odyssey.dt.yaml: gpu@59000000: 'contiguous-area' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-04-03ARM: dts: stm32: YAML validation fails for STM32MP15 ST BoardsPierre-Yves MORDRET2-18/+0
"make dtbs_check" gives following output : stm32mp157x-xxx.dt.yaml: gpu@59000000: 'contiguous-area' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml Solve this trouble for STM32MPU Boards : - stm32mp157c-ed1 - stm32mp157x-dkx Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-30ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus1-1/+2
frequency sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~33%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus1-1/+2
frequency sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d2 ICP Link: https://lore.kernel.org/r/20230328101517.1595738-4-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus1-1/+2
frequency sama5d27-som1 populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-3-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus1-1/+2
frequency sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~37%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-2-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30ARM: dts: r8a7790: Add PWM device nodesGeert Uytterhoeven1-0/+70
Add support for the 7 PWM channels provided by PWM Timers on R-Car H2, by adding device nodes describing the PWM Timers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/9755b3af4296060ee31c4652def639574cbbd2fb.1679330878.git.geert+renesas@glider.be
2023-03-30ARM: dts: r8a7790: Add TPU device nodeGeert Uytterhoeven1-0/+11
Add support for the 4 PWM channels provided by the 16-bit Timer Pulse Unit on R-Car H2, by adding a device node describing the TPU. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/75da1e63135a3fc8a3aaafbff7139bd5d7509be3.1679330727.git.geert+renesas@glider.be
2023-03-30ARM: dts: marzen: Enable I2C supportGeert Uytterhoeven1-0/+6
Enable the single I2C bus available on the Marzen development board. As this bus contains an AK4643 codec, it must be limited to 100 kHz. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/77b87378397fd26f39c73f68e3ea465db6d38fb1.1679330016.git.geert+renesas@glider.be
2023-03-30ARM: dts: marzen: Add slide switchesGeert Uytterhoeven1-0/+63
Describe the four General Purpose Switches on the Marzen development board, so they can be used for user input and/or for wake-up from s2ram. The GPIO block on R-Car H1 does not support triggering interrupts on both edges of a changing input signal, hence one cannot use gpio-keys with gpios properties. Instead, one of two alternatives needs to be used: 1. Use gpio-keys with interrupts instead of gpios properties, at the expense of receiving only key presses (release events will be auto-generated), 2. Use gpio-keys-polled with gpios properties, at the expense of making these keys unusable as wake-up sources. As the DTS for the Marzen development board serves mainly as an example, the approach taken is to use the first alternative for the first two switches, and the second alternative for the last two switches. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f834a3c397362f2424fcae6a0c0440356208b182.1679329829.git.geert+renesas@glider.be
2023-03-30ARM: dts: r8a7779: Add PWM supportGeert Uytterhoeven1-13/+78
Add support for the 7 PWM channels provided by PWM Timers on R-Car H1, by describing the PWM Timers and their module clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/71622584db692f571d542ef2dcf088ce549aed3f.1679329211.git.geert+renesas@glider.be
2023-03-29ARM64: dts: imx7ulp: update usb compatiblePeng Fan1-2/+3
Per binding doc, update the compatible Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230322052504.2629429-11-peng.fan@oss.nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-03-28ARM: dts: stm32: add uart nodes and uart aliases on stm32mp135f-dkValentin Caron1-1/+41
Update device-tree stm32mp135f-dk.dts to add usart1, uart8, usart2 and uart aliases. - Usart2 is used to interface a BT device, enable it by default. - Usart1 and uart8 are available on expansion connector. They are kept disabled. So, the pins are kept in analog state to lower power consumption by default or can be used as GPIO. - Uart4 is used for console. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: add pins for usart2/1/4/8 in stm32mp13-pinctrlValentin Caron1-0/+129
Add pins for uart4, uart8, usart1 and usart2 in stm32mp13-pinctrl.dtsi Theses pins have three states: default, sleep and idle. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: add uart nodes on stm32mp13Valentin Caron1-1/+96
Update device-tree stm32mp131.dtsi to add some uart features. On uart 1, 2, 3, 5, 6, 7, 8 nodes, add compabible, exti interrupts, clock, reset properties, dma config. On uart 4 node, only add dma configuration and use exti interrupt. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: clean uart aliases on stm32mp15xx-exx boardsValentin Caron2-9/+8
Remove duplicates and clean uart aliases. Uart aliases and uart pins should be declared and associated to uart instance at the same time. Put also aliases node above chosen node as same as stm32mp157c-dk2.dts. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: clean uart aliases on stm32mp15xx-dkx boardsValentin Caron3-6/+6
Remove duplicates and clean uart aliases. Uart aliases and uart pins should be declared and associated to uart instance at the same time. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: dts: stm32: fix slew-rate of USART2 on stm32mp15xx-dkxValentin Caron1-2/+2
On stm32mp15xx-dkx boards: - Fix slew-rate of USART 2 to 0 like other USARTs, because frequency of USART pins doesn't exceed 10Mhz. Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-03-28ARM: tegra: transformers: Bind RT5631 sound nodesSvyatoslav Ryhel3-0/+51
TF201, TF300TG and TF700T support RT5631 codec. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-28ARM: tegra: transformers: Update WM8903 sound nodesSvyatoslav Ryhel3-14/+14
Fix headset detection and use device GPIO microphone detection on WM8903 Transformers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-28ARM: dts: stm32: add pin map for CAN controller on stm32f4Dario Binacchi1-0/+30
Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-03 19:20:29 +0300