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path: root/arch/arm/mach-vexpress/Makefile
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2014-11-28ARM: vexpress: Remove non-DT codePawel Moll1-2/+1
Now, with the CLCD DT support available, there is no more reason to keep the non-DT support for V2P-CA9. Removed, together with "some" supporting code. It was necessary to make PLAT_VERSATILE_SCHED_CLOCK optional and selected by the machines still interested in it. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-02-18ARM: 7962/2: Make all mcpm functions notraceDave Martin1-0/+3
The functions in mcpm_entry.c are mostly intended for use during scary cache and coherency disabling sequences, or do other things which confuse trace ... like powering a CPU down and not returning. Similarly for the backend code. For simplicity, this patch just makes whole files notrace. There should be more than enough traceable points on the paths to these functions, but we can be more fine-grained later if there is a need for it. Jon Medhurst: Also added spc.o to the list of files as it contains functions used by MCPM code which have comments comments like: "might be used in code paths where normal cacheable locks are not working" Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Jon Medhurst <tixy@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-30ARM: vexpress/TC2: add support for CPU DVFSSudeep KarkadaNagesha1-1/+2
SPC(Serial Power Controller) on TC2 also controls the CPU performance operating points which is essential to provide CPU DVFS. The M3 microcontroller provides two sets of eight performance values, one set for each cluster (CA15 or CA7). Each of this value contains the frequency(kHz) and voltage(mV) at that performance level. It expects these performance level to be passed through the SPC PERF_LVL registers. This patch adds support to populate these performance levels from M3, build the mapping to CPU OPPs at the boot and then use it to get and set the CPU performance level runtime. Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Pawel Moll <Pawel.Moll@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-09-10ARM: vexpress: allow dcscb and tc2_pm in a combined ARMv6+v7 buildNicolas Pitre1-0/+2
This fixes the following build error: /tmp/cce439dZ.s: Assembler messages: /tmp/cce439dZ.s:506: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:512: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:513: Error: selected processor does not support ARM mode `dsb ' /tmp/cce439dZ.s:583: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:589: Error: selected processor does not support ARM mode `isb ' /tmp/cce439dZ.s:590: Error: selected processor does not support ARM mode `dsb ' Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-07ARM: vexpress/TC2: basic PM supportNicolas Pitre1-0/+1
This is the MCPM backend for the Virtual Express A15x2 A7x3 CoreTile aka TC2. This provides cluster management for SMP secondary boot and CPU hotplug. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Pawel Moll <pawel.moll@arm.com> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [PM: made it drive SCC registers directly and provide base for SPC] Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2013-05-29ARM: vexpress/dcscb: handle platform coherency exit/setup and CCIDave Martin1-1/+1
Add the required code to properly handle race free platform coherency exit to the DCSCB power down method. The power_up_setup callback is used to enable the CCI interface for the cluster being brought up. This must be done in assembly before the kernel environment is entered. Thanks to Achin Gupta and Nicolas Pitre for their help and contributions. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
2013-05-29ARM: vexpress: introduce DCSCB supportNicolas Pitre1-0/+1
This adds basic CPU and cluster reset controls on RTSM for the A15x4-A7x4 model configuration using the Dual Cluster System Configuration Block (DCSCB). The cache coherency interconnect (CCI) is not handled yet. Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
2013-03-21arm: vexpress: Move the poweroff/restart code to drivers/power/resetCatalin Marinas1-1/+1
This patch moves the arch/arm/mach-vexpress/reset.c functionality to drivers/platform/reset/ and adds the necessary Kconfig wiring. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
2012-11-05ARM: vexpress: Start using new Versatile Express infrastructurePawel Moll1-1/+1
This patch starts using all the configuration infrastructure. - generic GPIO library is forced now - sysreg GPIOs are used as MMC CD and WP information sources; thanks to this MMCI auxiliary data is not longer necessary - DVI muxer and mode control is removed from non-DT V2P-CA9 code as this is now handled by the vexpress-dvi driver - clock generators control is removed as is being handled by the common clock driver now - the sysreg and sysctl control is now delegated to the appropriate drivers and all related code was removed - NOR Flash set_vpp function has been removed as the control bit used does _not_ control its VPP line, but the #WP signal instead (which is de facto unusable in case of Linux MTD drivers); this also allowed the remove its DT auxiliary data The non-DT code defines only minimal required number of the config devices. Device Trees are updated to make use of all new features. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
2012-09-14ARM: vexpress: convert to multi-platformRob Herring1-0/+2
Convert vexpress to multi-platform. This always enables vexpress DT and makes it the default v7 platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com>
2011-02-19ARM: realview/vexpress: consolidate SMP bringup codeRussell King1-1/+1
Realview and Versatile Express share the same SMP bringup code, so consolidate the two implementations. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-19ARM: realview/vexpress: consolidate localtimer supportRussell King1-1/+0
Realview and Versatile Express local timer support is identical, so consolidate the implementations. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: CPU hotplug: add Versatile Express hotplug CPU supportRussell King1-0/+1
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02ARM: Add Versatile Express SMP supportRussell King1-0/+2
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02ARM: Add Versatile Express CA9x4 processor supportRussell King1-0/+1
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-02ARM: Add Versatile Express supportRussell King1-0/+5
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>