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2024-08-03arm64: dts: amlogic: setup hdmi system clockJerome Brunet1-0/+5
[ Upstream commit 1443b6ea806dfcdcee6c894784332c9c947ac319 ] HDMI Tx needs the system clock set on the xtal rate. This clock is managed by the main clock controller of the related SoCs. Currently 2 part of the display drivers race to setup the HDMI system clock by directly poking the controller register. The clock API should be used to setup the rate instead. Use assigned-clock to setup the HDMI system clock. Fixes: 6939db7e0dbf ("ARM64: dts: meson-gx: Add support for HDMI output") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20240626152733.1350376-3-jbrunet@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03arm64: dts: amlogic: add power domain to hdmitxJerome Brunet1-0/+1
[ Upstream commit f1ab099d6591a353899a2ee09c89de0fc908e2d2 ] HDMI Tx needs HDMI Tx memory power domain turned on. This power domain is handled under the VPU power domain. The HDMI Tx currently works because it is enabling the PD by directly poking the power controller register. It is should not do that but properly use the power domain controller. Fix this by adding the power domain to HDMI Tx. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20240625145017.1003346-3-jbrunet@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Stable-dep-of: 1443b6ea806d ("arm64: dts: amlogic: setup hdmi system clock") Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03arm64: dts: amlogic: gx: correct hdmi clocksJerome Brunet1-2/+2
[ Upstream commit 0602ba0dcd0e76067a0b7543e92b2de3fb231073 ] The clocks provided to HDMI tx are not consistent between gx and g12: * gx receives the peripheral clock as 'isfr' while g12 receives it as 'iahb' * g12 gets the HDMI system clock as 'isfr' but gx does not even get it. It surely needs that clock since the driver is directly poking around the clock controller's registers for that clock. Align gx SoCs with g12 and provide: * the HDMI peripheral clock as 'iahb' * the HDMI system clock as 'isfr' Fixes: 6939db7e0dbf ("ARM64: dts: meson-gx: Add support for HDMI output") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20240626152733.1350376-2-jbrunet@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2023-03-07arm64: dts: amlogic: gxl: use gxl mdio multiplexerJerome Brunet1-12/+13
So the far, GXL SoCs were using the generic mmio register based mdio multiplexer. This properly sets one of the glue register but the SoC actually has 3 of those registers. One of them sets the ID under which the internal phy will advertise itself. If nothing sets this register before linux boots (like u-boot), the internal phy path is broken. To address this problem, a dedicated MDIO mux driver has been introduced. Switch to this new driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20230306151354.132973-1-jbrunet@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-03-06arm64: dts: meson: adjust order of some compatiblesHeiner Kallweit1-2/+2
During review of a new yaml binding, affecting these dts, it turned out that some compatibles aren't ordered as they should be. Order should be most specific to least specific. Suggested-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/1ce888df-6096-73de-a98a-354d086428d4@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-26arm64: dts: amlogic: meson-gxl: add missing unit address to eth-phy-mux node ↵Neil Armstrong1-1/+1
name Fixes: bus@c8834000: eth-phy-mux: {...} should not be valid under {'type': 'object'} Link: https://lore.kernel.org/r/20230124-b4-amlogic-bindings-fixups-v1-9-44351528957e@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-10-25arm64: dts: meson-gxl: add SPI pinctrl nodes for CLKAmjad Ouled-Ameur1-0/+14
Add SPICC Controller pin nodes for CLK line when idle for Amlogic GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20221004-up-aml-fix-spi-v4-3-0342d8e10c49@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2020-07-22Merge tag 'amlogic-fixes' into v5.9/dt64Kevin Hilman1-0/+5
Amlogic fixes for v5.8-rc - misc DT fixes, and SoC ID fixes
2020-07-13arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clockMartin Blumenstingl1-2/+3
Add the "timing-adjustment" clock now that we know how it is connected to the PRG_ETHERNET registers. It is used internally to generate the RGMII RX delay on the MAC side (if needed). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com
2020-07-13arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindingsMartin Blumenstingl1-2/+5
The "amlogic,meson-gx-pwrc-vpu" binding only supports the VPU power domain, while actually there are more power domains behind that set of registers. Switch to the new bindings so we can add more power domains as needed. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200620161211.23685-1-martin.blumenstingl@googlemail.com
2020-06-30arm64: dts: meson: add missing gxl rng clockJerome Brunet1-0/+5
The peripheral clock of the RNG is missing for gxl while it is present for gxbb. Fixes: 1b3f6d148692 ("ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200617125346.1163527-1-jbrunet@baylibre.com
2020-05-20arm64: dts: meson: gxl: add acodec supportJerome Brunet1-0/+11
Add the internal audio DAC to the gxl SoC DT Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-2-jbrunet@baylibre.com
2020-05-20arm64: dts: meson-gx: add aiu supportJerome Brunet1-0/+23
Add the AIU audio device to the Amlogic GX SoC family DT. ATM, this device provides the i2s and spdif output stages and also the hdmi and internal codec glues. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20200421163935.775935-3-jbrunet@baylibre.com
2020-04-29arm64: dts: amlogic: use the new USB control driver for GXL and GXMMartin Blumenstingl1-20/+25
Add the correcly architectured USB Glue node and adapt all the Amlogic GXL and GXM board to the new organization. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200326134507.4808-11-narmstrong@baylibre.com
2019-12-16arm64: dts: meson: gxl: add i2c C pinsJerome Brunet1-0/+9
Add the DV18 and DV19 pinmux setting for the i2c C of the gxl family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-10-26ARM64: dts: amlogic: adds crypto hardware nodeCorentin Labbe1-0/+10
This patch adds the GXL crypto hardware node for all GXL SoCs. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-30arm64: dts: meson-gxl: fix internal phy compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: ethernet-phy@8: compatible: ['ethernet-phy-id0181.4400', 'ethernet-phy-ieee802.3-c22'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-30arm64: dts: meson: fix ethernet mac reg formatNeil Armstrong1-3/+0
This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-axg-s400.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-g12a-u200.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-g12a-u200.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-gxbb-nanopi-k2.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too long meson-gxl-s805x-libretech-ac.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too lon while here, also drop the redundant reg property from meson-gxl.dtsi because it had the same value as meson-gx.dtsi from which it inherits. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson: add video decoder entriesMaxime Jourdan1-0/+11
This enables the video decoder for GXBB, GXL and GXM chips Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-05-21arm64: dts: meson: fix mmc pin biasJerome Brunet1-10/+25
Clk pin does not require bias, data strobe should be pulled low. The rest of the pin (data and cmd) are pulled up. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-01-17arm64: dts: meson-gx: add support for simplefbMaxime Jourdan1-0/+6
SimpleFB allows transferring a framebuffer from the firmware/bootloader to the kernel, while making sure the related clocks and power supplies stay enabled. Add nodes for CVBS and HDMI Simple Framebuffers. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-12-05arm64: dts: meson: add clock controller clock inputsJerome Brunet1-0/+4
Add the clock inputs of the clock controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-29arm64: dts: meson: consistently disable pin biasJerome Brunet1-0/+49
On Amlogic chipsets, the bias set through pinconf applies to the pad itself, not only the GPIO function. This means that even when we change the function of the pad from GPIO to anything else, the bias previously set still applies. As we have seen with the eMMC, depending on the bias type and the function, it may trigger problems. The underlying issue is that we inherit whatever was left by previous user of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual setup we will get is undefined. There is nothing mentioned in the documentation about pad bias and pinmux function, however leaving it undefined is not an option. This change consistently disable the pad bias for every pinmux functions. It seems to work well, we can only assume that the necessary bias (if any) is already provided by the pin function itself. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-29arm64: dts: meson: disable pad bias for mmc pinmuxesJerome Brunet1-0/+4
In some cases (such as a boot from SPI) the bootloader or the ROM code may leave a bias pull-down on the mmc pins. If so the MMC will fail during the initialisation. Explicitly disabling the pinmux solves the problem. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-29arm64: dts: meson: remove extra subnode in mmc clk_gate pinmuxJerome Brunet1-9/+0
In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for the function definition, the other for the bias. This is not necessary since we can define the function and the bias in the same subnode. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-15arm64: dts: meson-gx: add efuse pclkJerome Brunet1-0/+4
Add the required peripheral clock for the efuse device. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-14arm64: dts: meson: Fix erroneous SPI bus warningsRob Herring1-1/+1
dtc has new checks for SPI buses. The meson dts files have a node named spi' which causes false positive warnings. As the node is a pinctrl child node, change the node name to be 'spi-pins' to fix the warnings. arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dtb: Warning (spi_bus_bridge): /soc/periphs@c8834000/pinctrl@4b0/spi: incorrect #address-cells for SPI bus Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: linux-amlogic@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-06-28ARM64: dts: meson-gx: fix ATF reserved memory regionKevin Hilman1-8/+0
Vendor firmware/uboot has different reserved regions depending on firmware version, but current codebase reserves the same regions on GXL and GXBB, so move the additional reserved memory region to common .dtsi. Found when putting a recent vendor u-boot on meson-gxbb-p200. Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Cc: stable@vger.kernel.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson: fix clock source of the pclk for UART_AOYixun Lan1-2/+2
>From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-10ARM64: dts: meson: add MMC resetsJerome Brunet1-1/+4
Add reset lines to the mmc controllers of the meson gx and axg SoCs Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-04-19ARM64: dts: meson-gx: fix gxl clock controller compatibleJerome Brunet1-1/+1
There are a few differences between the gxbb and gxl clock controllers which makes them incompatible. The hdmi, gp0 and fixed pll are different. The rate of these plls reported by gxbb driver on a gxl device would be wrong. Remove the gxbb compatible from the gxl clock controller node so only the correct driver is matched. Fixes: 973fbd55b53c ("ARM64: dts: meson-gxl: Add clock nodes") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-04-19ARM64: dts: meson-gx: sysctrl is the parent of the clock controllerJerome Brunet1-3/+2
The parent of the meson-gx clock controller should be the hhi system controller, not the HIU bus. This way, the HHI register region can be used safely by multiple drivers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-04-18ARM64: dts: meson-gxl: add USB host supportMartin Blumenstingl1-0/+61
This adds USB host support to the Meson GXL SoC. A dwc3 controller is used for host-mode, while a dwc2 controller (not added in this patch because I could not get it working) is used for device-mode only. The dwc3 controller's internal roothub has two USB2 ports enabled but no USB3 port. Each of the ports is supplied by a separate PHY. The USB pins are connected to the SoC's USBHOST_A and USBOTG_B pins. Due to the way the roothub works internally the USB PHYs are left enabled. When the dwc3 controller is disabled the PHY is never powered on so it does not draw any extra power. However, when the dwc3 host controller is enabled then all PHYs also have to be enabled, otherwise USB devices will not be detected (regardless of whether they are plugged into an enabled port or not). This means that only the dwc3 controller has to be enabled on boards with USB support (instead of requiring all boards to enable the PHYs additionally with the chance of forgetting to enable one and breaking all other ports with that as well). This also adds the USB3 PHY which currently only does some basic initialization. That however is required because without it high-speed devices (like USB thumb drives) do not work on some devices (probably because the bootloader does not configure the USB3 PHY registers). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-08ARM64: dts: amlogic: Convert to new-style SPDX license identifiersNeil Armstrong1-38/+1
Move the SPDX-License-Identifier lines to the top and drop the license splat. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-13ARM64: dts: meson-gxl: add internal ethernet PHY irqJerome Brunet1-0/+1
Add the interrupt of the internal ethernet PHY Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-21Merge tag 'amlogic-dt64' of ↵Arnd Bergmann1-2/+44
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit DT updates for v4.16" from Kevin Hilman - meson-gx: add VPU power domain support - odroid-c2: add HDMI and CEC nodes - misc cleanups * tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gxm: fix q200 interrupt number ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2 ARM64: dts: meson: add comments with the GPIO for the PHY interrupts ARM64: dts: amlogic: use generic bus node names ARM64: dts: meson: drop "sana" clock from SAR ADC ARM64: dts: odroid-c2: Add HDMI and CEC Nodes ARM64: dts: meson-gx: grow reset controller memory zone ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards ARM64: dts: meson-gx: add VPU power domain
2017-12-08ARM64: dts: meson-gx: fix UART pclk clock nameNeil Armstrong1-3/+3
The clock-names for pclk was wrongly set to "core", but the bindings specifies "pclk". This was not cathed until the legacy non-documented bindings were removed. Reported-by: Andreas Färber <afaerber@suse.de> Fixes: f72d6f6037b7 ("ARM64: dts: meson-gx: use stable UART bindings with correct gate clock") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-06ARM64: dts: meson: drop "sana" clock from SAR ADCXingyu Chen1-2/+1
The SAR ADC modules doesn't require The "sana" clock. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Singed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-12-06ARM64: dts: meson-gx: add VPU power domainNeil Armstrong1-0/+43
This patch adds support for the VPU Power Domain nodes, and attaches the VPU power domain to the VPU node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-30Merge tag 'amlogic-dt64-2' of ↵Arnd Bergmann1-0/+6
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit DT updates for v4.15, round 2" from Kevin Hilman: - add support for new GPIO IRQ driver * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gx: add external PHY interrupt on some platforms ARM64: dts: meson-gx: add gpio interrupt controller ARM64: meson: enable MESON_IRQ_GPIO in Kconfig ARM64: dts: meson-gxbb-odroidc2: fix usb1 power supply
2017-10-30Merge tag 'amlogic-dt64' of ↵Arnd Bergmann1-3/+17
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit platforms: DT updates for v4.15" from Kevin Hilman: - new SoC support: A113D - new boards: Tronsmart Vega S96, Khadas vim2 - reserved memory fixups - gpio-names cleanups - MMC cleanups, enable high-speed modes - misc cleanups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-axg: add initial A113D SoC DT support dt-bindings: arm: amlogic: Add Meson AXG binding ARM64: dts: meson-gx: remove unnecessary uart compatible ARM64: dts: meson-gx: remove unnecessary clocks properties ARM64: dts: meson-gxl: Add alternate ARM Trusted Firmware reserved memory zone ARM64: dts: meson-gxm: enable HS400 on the vim2 ARM64: dts: meson-gxbb-nexbox-a95x: Enable USB Nodes dt-bindings: arm: amlogic: Add Tronsmart Vega S96 binding ARM64: dts: meson-gxm: Add Vega S96 board ARM64: dts: meson-gxm: Add support for Khadas VIM2 ARM64: dts: meson-gxl: Take eMMC data strobe out of eMMC pins ARM64: dts: meson-gxl: adjust libretech-cc gpio-line-names ARM64: dts: meson-gxl: adjust kvim gpio-line-names ARM64: dts: meson-gxbb: adjust odroid-c2 gpio-line-names ARM64: dts: meson-gxbb: adjust nanopi-k2 gpio-line-names ARM64: dts: meson-gx: adjust gpio-ranges for TEST_N ARM64: dts: meson-gx: remove gpio offset ARM: dts: meson8: remove gpio offset ARM64: dts: meson-gxl-libretech-cc: enable internal phy leds ARM64: dts: meson-gxl-libretech-cc: enable saradc
2017-10-29ARM64: dts: meson-gx: add gpio interrupt controllerJerome Brunet1-0/+6
Add gpio interrupt controller to Amlogic GX family SoCs Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-12ARM64: dts: meson-gxl: Add alternate ARM Trusted Firmware reserved memory zoneNeil Armstrong1-0/+8
This year, Amlogic updated the ARM Trusted Firmware reserved memory mapping for Meson GXL SoCs and products sold since May 2017 uses this alternate reserved memory mapping. But products had been sold using the previous mapping. This issue has been explained in [1] and a dynamic solution is yet to be found to avoid loosing another 3Mbytes of reservable memory. In the meantime, this patch adds this alternate memory zone only for the GXL and GXM SoCs since GXBB based new products stopped earlier. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html Fixes: bba8e3f42736 ("ARM64: dts: meson-gx: Add firmware reserved memory zones") Reported-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-12ARM64: dts: meson-gxl: Take eMMC data strobe out of eMMC pinsNeil Armstrong1-2/+8
Since the Data Strobe pin is optional, take it out of the default eMMC pins and add a separate entry. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-12ARM64: dts: meson-gx: adjust gpio-ranges for TEST_NJerome Brunet1-1/+1
TEST_N has moved from the EE controller to the AO controller so the gpio-ranges need to adjusted for it Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-12ARM64: dts: meson-gx: remove gpio offsetJerome Brunet1-1/+1
Remove pin offset on the EE controller. Meson pinctrl no longer has this quirk Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-09-05ARM64: dts: meson: add mmc clk gate pinsJerome Brunet1-0/+33
Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This is necessary to be able to gate the clk outside of the SoC while keeping it running in the controller Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-09-05ARM64: dts: meson-gx: Use correct mmc clock source 0Jerome Brunet1-3/+3
Now that the clock source 0 is properly described in the CCF, use it instead of assuming the default value (xtal) Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-08-23ARM64: dts: meson-gx: Add AO CEC nodesNeil Armstrong1-0/+6
This patch adds the AO CEC node in all the HDMI enabled boards DTS. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-08-23ARM64: dts: meson-gx: update AO clkc to new bindingsNeil Armstrong1-0/+4
The AO clkc needs to be updated to new bindings with an system control parent node and moving the clkc node as subnode. Also adds the SoC specific compatible following the bindings requirements. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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