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Describe the 40 MHz Crystal Clock Oscillator providing CAN_CLK.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0bf36a1708ad87c00455b96ebaacc63fb7305b7a.1675164686.git.geert+renesas@glider.be
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Enables confirmed-working CAN interfaces 0 and 1 on the Falcon board.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20220309162609.3726306-4-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on R-Car Gen3 boards. This allows software to identify the
PHY model at any time, regardless of the state of the PHY reset line.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/07bd7e04dda9e84cde0664980f0b1a6d69e03109.1631174218.git.geert+renesas@glider.be
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Make sure the R-Car Gen3 SoC model present is documented in the comment
header of each board DTS, on a single line. This makes it easier to
identify boards that are available with different SoC or SiP options.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/251569665d7d4f4ed4bbab7267ce2ddccdef33e5.1626261816.git.geert+renesas@glider.be
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The Ethernet PHY for the first AVB instance is located on the Falcon
BreakOut board. Hence move its description from the DTS file that
describes the CPU board to the main Falcon DTS file.
Fixes: e8ac55a5e70a9522 ("arm64: dts: renesas: falcon: Add Ethernet-AVB0 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210316154705.2433528-4-geert+renesas@glider.be
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The 32 kHz oscillator driving the R-Car V3U watchdog is located on the
Falcon CPU board. Hence move the watchdog configuration from the main
Falcon DTS file to the DTS file that describes the CPU board.
Fixes: d207dc500bbcf8c6 ("arm64: dts: renesas: falcon: Enable watchdog timer")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210316154705.2433528-3-geert+renesas@glider.be
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The serial console is located on the Falcon CPU board. Hence move
serial console configuration from the main Falcon DTS file to the DTS
file that describes the CPU board.
Fixes: 63070d7c2270e8de ("arm64: dts: renesas: Add Renesas Falcon boards support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210316154705.2433528-2-geert+renesas@glider.be
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Add a DTS file for the Falcon Ethernet sub-board (RTP0RC779A0ETS0010S),
and include it from the main r8a779a0-falcon.dts.
For now its contents are limited to the Board ID EEPROM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210304153257.4059277-4-geert+renesas@glider.be
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Add a DTS file for the Falcon CSI/DSI sub-board (RTP0RC779A0DCS0010S),
and include it from the main r8a779a0-falcon.dts.
For now its contents are limited to the Board ID EEPROM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210304153257.4059277-3-geert+renesas@glider.be
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Add device nodes for the I2C EEPROMs on the Falcon CPU and BreakOut
boards.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210304153257.4059277-2-geert+renesas@glider.be
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Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Enable the watchdog on the Falcon board.
Signed-off-by: Hoang Vo <hoang.vo.eb@renesas.com>
[wsa: rebased to mainline]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20201218173731.12839-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Initial support for the Renesas Falcon CPU and BreakOut boards
support.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599739372-30669-5-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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