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2022-08-29arm64: dts: renesas: r8a779g0: Fix HSCIF0 interrupt numberGeert Uytterhoeven1-1/+1
The interrupt number for the HSCIF0 serial port, which serves as the serial console on the White Hawk board, is incorrect, causing userspace to hang immediately as soon as it tries to print something. Kernel output is unaffected, as it is printed using polling. Fixes: 987da486d84a5643 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/751dcef40d4534e856ed49b1d5b3a3e8d365ec42.1661419377.git.geert+renesas@glider.be
2022-07-07arm64: dts: renesas: Add panel overlay for Draak and Ebisu boardsLaurent Pinchart2-0/+37
The Draak and Ebisu boards support an optional LVDS panel. One compatible panel is the Mitsubishi AA104XD12. Add a corresponding DT overlay. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20211229193135.28767-4-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-07arm64: dts: renesas: Add panel overlay for Salvator-X(S) boardsLaurent Pinchart2-0/+38
The Salvator-X and Salvator-XS boards support an optional LVDS panel. One compatible panel is the Mitsubishi AA104XD12. Add a corresponding DT overlay. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20211229193135.28767-3-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-07arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay supportLaurent Pinchart1-0/+30
The Mitsubishi AA1024XD12 panel can be used for R-Car Gen2 and Gen3 boards as an optional external panel. It is described in the arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi file as a direct child of the DT root node. This allows including r8a77xx-aa104xd12-panel.dtsi in board device trees, with other minor modifications, to enable the panel. This is however not how external components should be modelled. Instead of modifying the board device tree to enable the panel, it should be compiled as a DT overlay, to be loaded by the boot loader. Prepare the r8a77xx-aa104xd12-panel.dtsi file for this usage by declaring a panel node only, without hardcoding its path. Overlay sources can then include r8a77xx-aa104xd12-panel.dtsi where appropriate. This change doesn't cause any regression as r8a77xx-aa104xd12-panel.dtsi is currently unused. As overlay support for this panel has only been tested with Gen3 hardware, and Gen2 support will require more development, move the file to arch/arm64/boot/dts/renesas/. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20211229193135.28767-2-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-07-05arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort orderGeert Uytterhoeven1-9/+9
The scif0 nodes were accidentally inserted after the scif3 nodes, breaking alphabetical sort order. Fixes: 1614c8624a48b9c9 ("arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2fe0e782351c202ed009dcd658f4bceec8f3a56d.1656951240.git.geert+renesas@glider.be
2022-06-29arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in commentChris Paterson1-1/+1
This dts is for the RZ/V2L SMARC EVK, not RZ/G2L. Fixes: f91c4c74796a ("arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK") Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Link: https://lore.kernel.org/r/20220623103024.24222-1-chris.paterson2@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHzGeert Uytterhoeven1-0/+5
The highest-performance mode for the Cortex-A57 CPU cores supported on R-Car H3Ne (R8A779M8) is the Power Optimized (1.5 GHz) mode. The Normal (1.6 GHz) and High Performance (1.7 GHz) modes are not supported. Hence drop the "turbo-mode" entries from the operating points table inherited from r8a77951.dtsi. Fixes: 6e87525d751fac57 ("arm64: dts: renesas: Add Renesas R8A779M8 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/aeb4530f7fbac8329b334dcb169382c836a5f32d.1655458564.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: Fix thermal-sensors on single-zone sensorsGeert Uytterhoeven2-2/+2
"make dtbs_check": arch/arm64/boot/dts/renesas/r8a774c0-cat874.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[74], [0]] is too long arch/arm64/boot/dts/renesas/r8a774c0-ek874.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[79], [0]] is too long arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[82], [0]] is too long arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[87], [0]] is too long arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[105], [0]] is too long From schema: Documentation/devicetree/bindings/thermal/thermal-zones.yaml Indeed, the thermal sensors on R-Car E3 and RZ/G2E support only a single zone, hence #thermal-sensor-cells = <0>. Fix this by dropping the bogus zero cell from the thermal sensor specifiers. Fixes: 8fa7d18f9ee2dc20 ("arm64: dts: renesas: r8a77990: Create thermal zone to support IPA") Fixes: 8438bfda9d768157 ("arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/28b812fdd1fc3698311fac984ab8b91d3d655c1c.1655301684.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connectorWolfram Sang2-0/+14
The schematics label it as SCIF0 debug port. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220614193005.2652-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add SCIF nodesLinh Phung1-0/+51
Extracted from a bigger patch in the BSP, rebased, reg length corrected, and DMA properties added. Signed-off-by: Linh Phung <linh.phung.jy@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220614095242.8264-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add HSCIF nodesLinh Phung1-0/+68
Extracted from a bigger patch in the BSP, rebased and DMA properties added. Signed-off-by: Linh Phung <linh.phung.jy@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220614095109.8175-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3Wolfram Sang1-0/+3
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220613134914.18655-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: Add missing space after remote-endpointNiklas Söderlund2-4/+4
Add the missing space after remote-endpoint in r8a774c0.dtsi and r8a77990.dtsi before the typo spreads to other files. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20220608175728.1012550-1-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: rzg2ul-smarc-som: Enable ADC on SMARC platformBiju Das1-0/+12
Enable the ADC found on RZ/G2UL SMARC SoM. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220608173025.22792-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: rzg2ul-smarc: Enable RSPI1 on carrier boardBiju Das3-6/+13
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the carrier board. This patch adds pinmux and spi1 nodes to the carrier board dtsi file and drops deleting pinctl* properties from board DTS file. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220608173025.22792-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add CPU core clocksGeert Uytterhoeven1-0/+8
Describe the clocks for the eight Cortex-A55 CPU cores. CA55 Sub-System 0 (first 2 clusters / CPU cores 0-3) is clocked by Z0φ. CA55 Sub-System 1 (last 2 clusters / CPU cores 4-7) is clocked by Z1φ. For now no operating points are defined. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/c502087f9affa86dd665def0d990d277a51cc75c.1654701480.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: r8a779f0: Add CPUIdle supportTho Vu1-0/+21
Support CPUIdle for ARM Cortex-A55 on R-Car S4-8. Signed-off-by: Tho Vu <tho.vu.wh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/5310792ce4c06515a5373ff44ceb9b925f007489.1654701480.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: r8a779f0: Add secondary CA55 CPU coresGeert Uytterhoeven1-5/+133
Complete the description of the Cortex-A55 CPU cores and L3 cache controllers on the Renesas R-Car S4-8 (R8A779F0) SoC, including CPU topology and PSCI support for enabling CPU cores. R-Car S4-8 has 8 Cortex-A55 cores, grouped in 4 clusters. Based on patches in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/d6af5975090d5830cb053b52400439bd1cbe8fc7.1654701480.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: r8a779f0: Add L3 cache controllerGeert Uytterhoeven1-0/+8
Describe the cache configuration for the first Cortex-A55 CPU core on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/a63715ce1d2d2fcc7ab987f7a1b40847965e8d6a.1654701480.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: r8a779a0: Add CPU0 core clockGeert Uytterhoeven1-0/+1
Describe the clock for the first Cortex-A76 CPU core. For now no operating points are defined. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/3ace4eea4ff1cdc0f7b8ea7d0433c1063d795785.1654701400.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible valuesGeert Uytterhoeven1-10/+20
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence update the compatible properties in various device nodes to include family-specific compatible values for R-Car Gen4: - GPIO. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b477eea0fc33a055d1b1874847e26614f68f5da0.1654701299.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: rzg2l-smarc: Use proper bool operatorWolfram Sang1-1/+1
When checking for defined macros, we want the boolean AND not the binary one. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220603232940.21736-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add UFS nodeYoshihiro Shimoda1-0/+19
Add UFS node for R-Car S4-8 (r8a779f0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220603110524.1997825-7-yoshihiro.shimoda.uh@renesas.com [geert: Move ufs30-clk to preserve sort order] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add iommus to DMAC nodesYoshihiro Shimoda1-0/+16
Add iommus properties to the DMAC nodes for r8a779f0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220530024626.1870277-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add IPMMU nodesYoshihiro Shimoda1-0/+46
Add IPMMU nodes for r8a779f0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220530024626.1870277-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: Adjust whitespace around '='Krzysztof Kozlowski5-11/+11
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220526204231.832090-1-krzysztof.kozlowski@linaro.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17arm64: dts: renesas: r8a779f0: Add thermal supportLinh Phung1-0/+56
Add support for 3 TSC nodes of thermal. The 4th node is for the control domain and not for Linux. Signed-off-by: Linh Phung <linh.phung.jy@renesas.com> [wsa: rebased, fixed resource size, removed unused 4th node breaking probe] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220525151355.24175-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-06arm64: dts: renesas: rzv2mevk2: Enable ethernetPhil Edworthy1-0/+14
Enable Ethernet interface on RZ/V2M EVK. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220520100736.15182-1-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-06arm64: dts: renesas: r9a09g011: Add ethernet nodesPhil Edworthy1-0/+51
Add Ethernet nodes to SoC dtsi. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220517081645.3764-2-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-06arm64: dts: renesas: Rename numbered regulatorsGeert Uytterhoeven8-18/+18
Numbered regulators are prone to conflicts, causing silent overwrites (see e.g. [1]). Make conflicts less likely to happen by renaming all numbered regulators to names reflecting the regulator's purposes. [1] commit 45f5d5a9e34d3fe4 ("arm64: dts: renesas: r8a77995: draak: Fix backlight regulator name"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b90dfeb834c4d7dabd22bf03396f33df58f54507.1652264651.git.geert+renesas@glider.be
2022-06-06arm64: dts: renesas: beacon: Fix regulator node namesGeert Uytterhoeven1-3/+3
Currently there are two nodes named "regulator_camera". This causes the former to be overwritten by the latter. Fix this by renaming them to unique names, using the preferred hyphen instead of an underscore. While at it, update the name of the audio regulator (which was added in the same commit) to use a hyphen. Fixes: a1d8a344f1ca0709 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/a9ac82bdf108162487289d091c53a9b3de393f13.1652263918.git.geert+renesas@glider.be
2022-06-06arm64: dts: renesas: r9a07g043: Add ADC nodeBiju Das1-1/+20
Add ADC node to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220505184353.512133-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add initial device tree for RZ/V2M EVKPhil Edworthy2-0/+46
Add basic support for RZ/V2M EVK (based on R9A09G011): - memory - External input clock - UART Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220503115557.53370-13-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add initial DTSI for RZ/V2M SoCPhil Edworthy1-0/+93
Details of the SoC can be found here: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzv2m-dual-cortex-a53-lpddr4x32bit-ai-accelerator-isp-4k-video-codec-4k-camera-input-fhd-display-output Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220504094456.24386-3-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible valuesGeert Uytterhoeven1-30/+44
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence update the compatible properties in various device nodes to include family-specific compatible values for R-Car Gen4 instead of R-Car Gen3: - DMAC, - (H)SCIF, - I2C, - IPMMU, - WDT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/73cea9d5e1a6639422c67e4df4285042e31c9fd5.1651497071.git.geert+renesas@glider.be
2022-05-06arm64: dts: renesas: Add interrupt-names to CANFD nodesGeert Uytterhoeven12-0/+12
The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two interrupts. Add interrupt-names properties to all CAN-FD device nodes to identify the individual interrupts, so we can make this property a required property in the DT bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be
2022-05-06arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller nodeBiju Das1-1/+8
Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220502190155.84496-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Create thermal zone to support IPABiju Das1-0/+16
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on the work done by Dien Pham <dien.pham.ry@renesas.com> and others for r8a77990 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Add TSU nodeBiju Das1-0/+26
Add TSU node to RZ/G2UL SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Add OPP tableBiju Das1-0/+28
Add OPP table for RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodesBiju Das1-1/+42
Add RSPI{0,1,2} nodes to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g054: Fix external clk node namesBiju Das1-4/+4
Add suffix '-clk' for can and extal clk node names and replace the clk node names audio_clk{1,2} with audio{1,2}-clk as per the device tree specification. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220428133156.18080-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g044: Fix external clk node namesBiju Das1-4/+4
Add suffix '-clk' for can and extal clk node names and replace the clk node names audio_clk{1,2} with audio{1,2}-clk as per the device tree specification. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220428133156.18080-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Remove empty rgb output endpointsLaurent Pinchart18-32/+20
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty rgb output endpoints from SoC dtsi files, and declare them in the board dts instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-2-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Remove empty lvds endpointsLaurent Pinchart12-30/+0
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty lvds endpoints from SoC dtsi files, they should be instead declared in the board dts or in overlays. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-1-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: rzg2ul-smarc: Enable USB2.0 supportBiju Das2-46/+11
Enable USB2.0 Host/Device support on RZ/G2UL SMARC EVK by adding usb{0,1} pincontrol entries to the soc-pinctrl dtsi and deleting the nodes which disabled it. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: rzg2ul-smarc: Enable AudioBiju Das2-0/+30
Enable Audio on RZ/G2UL SMARC EVK by adding ssi1 pincontrol entries to the soc-pinctrl dtsi and ssi1 and cpu sound_dai nodes to the board dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: rzg2l-smarc: Move ssi0 and cpu sound_dai nodes from ↵Biju Das4-14/+22
common dtsi On RZ/G2{L,LC} SoM module, the wm8978 audio codec is connected to ssi0, whereas on RZ/G2UL it is connected to ssi1. So move ssi0 and cpu sound_dai nodes from common dtsi to board specific dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add Renesas White Hawk boards supportYoshihiro Shimoda3-0/+69
Initial support for the Renesas White Hawk CPU and BreakOut boards. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220428135058.597586-4-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add Renesas R8A779G0 SoC supportYoshihiro Shimoda1-0/+122
Add initial support for the Renesas R8A779G0 (R-Car V4H) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220428135058.597586-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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