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2022-09-19arm64: dts: renesas: spider-cpu: Add missing bootargsKuninori Morimoto1-0/+1
This patch adds missing bootargs for R-Car S4 Spider board. One note is that current Spider board doesn't have Ethernet support yet, but this patch adds standard settings for it, too. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87leqo58ox.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19arm64: dts: renesas: spider: Move aliases and chosenGeert Uytterhoeven2-9/+9
The serial console and serial debug ports on Spider are located on the CPU board. Hence move the aliases and chosen nodes containing serial port configuration from the main Spider DTS file to the DTS file that describes the CPU board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/c03500bb10eae10caeb3f4f97bc979eeee6cce75.1663167551.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add Ethernet supportGeert Uytterhoeven1-0/+37
Describe the wiring of the first Ethernet AVB instance to the Micrel KSZ9031RNXVB PHY. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/50a31bc8267ab4c90bff27ef3aca1169f8ebc7ae.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk: Move aliases and chosenGeert Uytterhoeven2-8/+8
The serial console port on White Hawk is located on the CPU board. Hence move the aliases and chosen nodes containing serial console configuration from the main White Hawk DTS file to the DTS file that describes the CPU board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b03b74f4b5ee3c3e828e753beb334ec43162c132.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779g0: Add RAVB nodesGeert Uytterhoeven1-0/+141
Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/980e7a62d8dc3a1e2387a2d93a6296625b105506.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add push switchesGeert Uytterhoeven1-0/+37
Describe the three Push Switches on the White Hawk CPU board, so they can be used for user input. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/e18d0d5087a514db611295f5d1e13c950cf7dae7.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: white-hawk-cpu: Add GP LEDsGeert Uytterhoeven1-0/+28
Describe the three General Purpose LEDs on the White Hawk CPU board, so they can be used as indicator LEDs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/007acd941ef925057f1f9b925ed4e339dbd29a74.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779g0: Add GPIO nodesGeert Uytterhoeven1-0/+135
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/81176a5e12a5828cdcdd4b107d0b2e5970232c31.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: apple: Add WiFi module and antenna propertiesHector Martin6-0/+22
Add the new module-instance/antenna-sku properties required to select WiFi firmwares properly to all board device trees. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Hector Martin <marcan@marcan.st> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/E1oZDoI-0077b3-Dd@rmk-PC.armlinux.org.uk
2022-09-18arm64: dts: renesas: white-hawk: Add Ethernet sub-boardGeert Uytterhoeven2-0/+17
Add a DTS file for the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1) sub-board (RTP8A779G0ASKB0SE0SA000), and include it from the main r8a779g0-white-hawk.dts. For now its contents are limited to the Board ID EEPROM. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/991600919513dd05a9a7d9c170c6924baf14d1a2.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: white-hawk: Add CSI/DSI sub-boardGeert Uytterhoeven2-0/+16
Add a DTS file for the R-Car V4H White Hawk CSI/DSI sub-board (RTP8A779G0ASKB0SC0SA000), and include it from the main r8a779g0-white-hawk.dts. For now its contents are limited to the Board ID EEPROM. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/265f7782743c539c57906e8207785f8b0d80d5d0.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMsGeert Uytterhoeven2-0/+29
Enable the I2C0 bus on the White Hawk CPU board, and describe the I2C EEPROMs present on the White Hawk CPU and BreakOut boards. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/d01cada6f2d3e44dd6cb26cfa8e4ce6382f1fbff.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: r8a779g0: Add I2C nodesGeert Uytterhoeven1-0/+84
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4H (R8A779G0) SoC. Extracted from a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/272fd18fed2d7addfbdb7945ae2134988a7c3a7e.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: white-hawk-cpu: Add serial port pin controlGeert Uytterhoeven1-0/+15
Complete the description of the serial console and the external serial clock by adding pin control. Based on larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/74c862ef6e46b4af398d9b371ff38fae17b3db05.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: r8a779g0: Add pinctrl device nodeGeert Uytterhoeven1-0/+9
Add a device node for the Pin Function Controller on the Renesas R-Car V4H (R8A779G0) SoC. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ecddcadd2fad46b1cf4c9be3ec750f360b9730e4.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: white-hawk-cpu: Enable watchdog timerGeert Uytterhoeven1-0/+5
Enable the watchdog timer on the White Hawk CPU board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/77a0e29d965032115de1f07ceecb2d5d07db74eb.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: r8a779g0: Add RWDT nodeGeert Uytterhoeven1-0/+11
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas R-Car V4H (R8A779G0) SoC. Based on a patch in the BSP by Thanh Quan. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/187904c279be6654ea3deb11b7250b64dd18c3b5.1662715538.git.geert+renesas@glider.be
2022-09-17arm64: dts: ls1046a-qds: Modify the qspi flash frequencyPankaj Bansal1-1/+1
The qspi flash in ls1046a QDS board can operate at 50MHz frequency. Therefore, update the maximum supported freq in dts file. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGALi Yang1-2/+153
There is mmio based mdio mux function in the FPGA device on ls1046a-qds board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and add simple-mfd as a compatbile for the FPGA node to reflect the multi-function nature of it. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: add gpios based i2c recovery informationLi Yang1-4/+8
Add scl-gpios property for i2c recovery and add SoC specific compatible string for SoC specific fixup. Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma sizeLaurentiu Tudor1-41/+49
Wrap the usb and sata controllers in an intermediate simple-bus and use it to constrain the dma address size of these usb controllers to the 40 bits that they generate toward the interconnect. This is required because the SoC uses 48 bits address sizes and this mismatch would lead to smmu context faults because the usb generates 40-bit addresses while the smmu page tables are populated with 48-bit wide addresses. Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: make dma-coherent global to the SoCLi Yang1-4/+1
These SoCs are really completely dma coherent in their entirety so add the dma-coherent property at the soc level in the device tree and drop the instances where it's specifically added to a few select devices. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: add missing dma ranges propertyLaurentiu Tudor1-0/+1
These chips have a 48-bit address size so make sure that the dma-ranges reflects this. Otherwise the linux kernel's dma sub-system will set the default dma masks to full 64-bit, badly breaking dmas. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: Add big-endian property for PCIe nodesHou Zhiqiang1-0/+3
Add the big-endian property for LS1046A PCIe RC nodes. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodesXiaowei Bao1-0/+9
Add the PME interrupt porperty and big-endian property in PCIe EP nodes. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 nodeLi Yang1-0/+3
Enable USB3 HW LPM feature for ls1046a. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a-rdb: add pcf85263 rtc nodeLi Yang1-0/+10
Add the missing node for rtc device under i2c and fix style problems at the same time. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a-qds: add mmio based mdio-mux supportLi Yang1-2/+171
There is mmio based mdio mux function in the FPGA device on ls1043a-qds board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and add simple-mfd as a compatbile for the FPGA node to reflect the multi-function nature of it. Also connect the ethernet interfaces to these phy interfaces. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma sizeLaurentiu Tudor1-42/+50
Wrap the usb and sata controllers in an intermediate simple-bus and use it to constrain the dma address size of these usb controllers to the 40 bits that they generate toward the interconnect. This is required because the SoC uses 48 bits address sizes and this mismatch would lead to smmu context faults because the usb generates 40-bit addresses while the smmu page tables are populated with 48-bit wide addresses. Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: add gpio based i2c recovery informationLi Yang1-4/+8
Add scl-gpios property for i2c recovery and add SoC specific compatible string for SoC specific fixup. Signed-off-by: Zhang Ying <ying.zhang22455@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: make dma-coherent global to the SoCLi Yang1-3/+1
ls1043a is really completely dma coherent in their entirety so add the dma-coherent property at the soc level in the device tree and drop the instances where it's specifically added to a few select devices. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: add missing dma ranges propertyLaurentiu Tudor1-0/+1
ls1043a has a 48-bit address size so make sure that the dma-ranges reflects this. Otherwise the linux kernel's dma sub-system will set the default dma masks to full 64-bit, badly breaking dmas. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: Add big-endian property for PCIe nodesHou Zhiqiang1-0/+3
Add the big-endian property for LS1043A PCIe nodes for accessing PEX_LUT and PF register block. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: Add SCFG phandle for PCIe nodesHou Zhiqiang1-0/+3
The LS1043A PCIe controller has some control registers in SCFG block, so add the SCFG phandle for each PCIe controller node. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: use pcie aer/pme interruptsLi Yang1-9/+9
After the binding has been updated to include more specific interrupt definition, update the dts to use the more specific interrupt names. Signed-off-by: Po Liu <po.liu@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 nodeLi Yang1-0/+3
Enable USB3 HW LPM feature for ls1043a. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1043a: fix the wrong size of dcfg spaceLi Yang1-1/+1
The size of the block should be 0x1000 instead of 0x10000. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.Pankaj Bansal2-2/+5
NXP Erratum A008585 affects A57 core cluster used in LS2085 rev1. However this problem has been fixed in A72 core cluster used in LS2088. Therefore remove the erratum from LS2088A. Keeping it only in LS2085. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com> Acked-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls208xa-rdb: fix errata E-00013Biwen Li1-0/+2
Specify a channel zero in idle state to avoid enterring tri-stated state for PCA9547. Some information about E-00013: - Description: I2C1 and I2C3 buses are missing pull-up. - Impact: When the PCA954x device is tri-stated, the I2C bus will float. This makes the I2C bus and its associated downstream devices inaccessible. - Hardware fix: Populate resistors R189 and R190 for I2C1 and resistors R228 and R229 for I2C3. - Software fix: Remove the tri-state option from the PCA954x driver(PCA954x always on enable status, specify a channel zero in dts to fix the errata E-00013). Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls2081a-rdb: Add DTS for NXP LS2081ARDBPriyanka Jain2-0/+133
This patch adds support for NXP LS2081ARDB board which has LS2081A SoC. LS2081A SoC is 40-pin derivative of LS2088A SoC. From functional perspective both are same. Hence, LS2088a SoC dtsi file is included from LS2081ARDB dts. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Tao Yang <b31903@freescale.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls2080a-rdb: add phy nodesIoana Radulescu1-0/+69
Define PHY nodes on the board. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls208xa-qds: add mdio mux nodes from on-board FPGALi Yang1-3/+62
Update the cpld node name to be generic board-contrl and add mmio mdio mux nodes from the on-board FPGA. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add PCIe supportTim Harvey1-3/+37
Add PCIe support on the Gateworks GW74xx board. While at it, fix the related gpio line names from the previous incorrect values. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: freescale: add support for i.MX8DXL EVK boardShenwei Wang2-0/+427
This is to support the EVK (Evaluation Kit Board) for the i.MX8DXL. The patch has enabled the serial console, SD/EMMC interface, and the eqos and fec ethernet network. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: freescale: add i.MX8DXL SoC supportShenwei Wang5-0/+515
i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. This patch adds the basic support for i.MX8DXL SoC. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8: add a node label to ddr-pmuShenwei Wang1-1/+1
The ddr-pmu on i.mx8dxl has a different interrupt number. Add a node label to ddr-pmu so that it could be referred and changed in i.mx8dxl dts. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx: Add i.mx8mm Gateworks gw7904 dts supportTim Harvey2-0/+889
The GW7904 is based on the i.MX 8M Mini SoC featuring: - LPDDR4 DRAM - eMMC FLASH - microSD connector with UHS support - LIS2DE12 3-axis accelerometer - Gateworks System Controller - IMX8M FEC - 2x RS232 off-board connectors - PMIC - 10x bi-color LED's - 1x miniPCIe socket with PCIe and USB2.0 - 802.3at Class 4 PoE - 10-30VDC input via barrel-jack Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add WiFi/BT module supportTim Harvey1-3/+59
The GW74xx supports an on-board Laird Connectivity Sterling LWB5+ module which uses a Cypress CYW4373W chip to provide 1x1 802.11 a/b/g/n/ac + Bluetooth 5.2. Add the proper device-tree nodes for it. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add cpu-supply node for cpufreqTim Harvey1-1/+17
Add regulator config for cpu-supply in order to support cpufreq. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add USB DR supportTim Harvey1-5/+25
Add support for USB DR on USB1 interface. Host/Device detection is done using the usb-role-switch connector with a GPIO as USB1_OTG_ID is not connected internally. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-09-01 17:28:26 +0300