summaryrefslogtreecommitdiff
path: root/arch/arm64/boot
AgeCommit message (Collapse)AuthorFilesLines
2024-02-19arm64: dts: ti: k3-am6*: Fix bus-width property in MMC nodesJudith Mendez6-7/+6
Move bus-width property to *main.dtsi, above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if the bus-width property is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing bus-width for MMC2 in k3-am62-main. Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-9-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am6*: Fix ti,clkbuf-sel property in MMC nodesJudith Mendez3-4/+5
Move ti,clkbuf-sel property above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if ti,clkbuf-sel is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing ti,clkbuf-sel for MMC0 in k3-am64-main. Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-8-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am6*: Remove DLL properties for soft PHYsJudith Mendez17-23/+0
Remove DLL properties which are not applicable for soft PHYs since these PHYs do not have a DLL to enable. Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Verdin AM62 Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-7-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMCJudith Mendez2-4/+41
Add OTAP/ITAP values to enable HS400 timing for MMC0 and SDR104 timing for MMC1/MMC2. Remove no-1-8-v property to enable the highest speed mode possible. Update MMC OTAP/ITAP values according to the datasheet [0], refer to Table 7-79 for MMC0 and Table 7-97 for MMC1/MMC2. [0] https://www.ti.com/lit/ds/symlink/am62p.pdf Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-6-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMCJudith Mendez1-1/+8
Update MMC0/MMC1 OTAP/ITAP values according to the datasheet [0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1. [0] https://www.ti.com/lit/ds/symlink/am6442.pdf Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Judith Mendez <jm@ti.com> Tested-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213235701.2438513-5-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62a7-sk: Enable eMMC supportNitin Yadav1-0/+26
Add support for 32GB eMMC card on AM62A7 SK. Includes adding mmc0 pins settings. Add mmc0 alias for sdhci0 in k3-am62a7-sk.dts. Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-4-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62a-main: Add sdhci2 instanceJudith Mendez1-0/+24
Add sdhci2 DT node in k3-am62a-main for mmc2. Add otap/itap values according to the datasheet[0], Refer to Table 7-97. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-3-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am62a-main: Add sdhci0 instanceNitin Yadav1-0/+18
Add sdhci0 DT node in k3-am62a-main for eMMC support. Add otap/itap values according to the datasheet[0], refer to Table 7-79. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20240213235701.2438513-2-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j784s4-evm: Remove Pinmux for CTS and RTS in wkup_uart0Bhavya Kapoor1-2/+0
Only Tx and Rx Signal lines for wkup_uart0 are brought out on the J784S4 EVM from SoC, but CTS and RTS signal lines are not brought on the EVM. Thus, remove pinmux for CTS and RTS signal lines for wkup_uart0 in J784S4. Fixes: 6fa5d37a2f34 ("arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-5-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721s2-common-proc-board: Remove Pinmux for CTS and RTS ↵Bhavya Kapoor1-2/+0
in wkup_uart0 Only Tx and Rx Signal lines for wkup_uart0 are brought out on the Common Proc Board through SoM, but CTS and RTS signal lines are not brought on the board. Thus, remove pinmux for CTS and RTS signal lines for wkup_uart0 in J721S2. Fixes: f5e9ee0b354a ("arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-4-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j7200-common-proc-board: Remove clock-frequency from ↵Bhavya Kapoor1-1/+0
mcu_uart0 Clock-frequency property is already present in mcu_uart0 node of the k3-j7200-mcu-wakeup.dtsi file. Thus, remove redundant clock-frequency property from mcu_uart0 node. Fixes: 3709ea7f960e ("arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-3-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j7200-common-proc-board: Modify Pinmux for wkup_uart0 and ↵Bhavya Kapoor1-8/+9
mcu_uart0 WKUP_PADCONFIG registers for wkup_uart0 and mcu_uart0 lies under wkup_pmx2 for J7200. Thus, modify pinmux for both of them. Fixes: 3709ea7f960e ("arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Link: https://lore.kernel.org/r/20240214105846.1096733-2-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219Vaishnav Achath2-0/+178
RPi v2 Camera (IMX219) is an 8MP camera that can be used with SK-AM69, J721E SK, and AM68 SK through the 22-pin CSI-RX connector. Add a reference overlay for dual IMX219 RPI camera v2 modules which can be used across AM68 SK, AM69 SK, TDA4VM SK boards that have a 15/22-pin FFC connector. Also enable build testing and symbols for all the three platforms. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-10-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j784s4-main: Add CSI2RX capture nodesVaishnav Achath1-1/+182
J784S4 has three CSI2RX capture subsystem featuring Cadence CSI2RX, DPHY and TI's pixel grabbing wrapper. Add nodes for the same and keep them disabled by default. J784S4 uses a dedicated BCDMA instance for CSI-RX traffic, so enable that as well. J784S4 TRM (Section 12.7 Camera Subsystem): https://www.ti.com/lit/zip/spruj52 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-9-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721s2-main: Add CSI2RX capture nodesVaishnav Achath1-1/+122
J721S2 has two CSI2RX capture subsystem featuring Cadence CSI2RX, DPHY and TI's pixel grabbing wrapper. Add nodes for the same and keep them disabled by default. J721S2 uses a dedicated BCDMA instance for CSI-RX traffic, so enable that as well. J721S2 TRM (Section 12.7 Camera Subsystem): https://www.ti.com/lit/zip/spruj28 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-8-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721e-main: Add CSI2RX capture nodesVaishnav Achath1-0/+122
J721E has two CSI2RX capture subsystem featuring Cadence CSI2RX, DPHY and TI's pixel grabbing wrapper. Add nodes for the same and keep them disabled by default. J721E TRM (Section 12.7 Camera Subsystem): https://www.ti.com/lit/zip/spruil1 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-7-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721e-sk: Model CSI2RX connector muxVaishnav Achath1-2/+17
J721E SK has the CSI2RX routed to a MIPI CSI connector and to 15-pin RPi camera connector through an analog mux with GPIO control, model that so that an overlay can control the mux state according to connected cameras. Also provide labels to the I2C mux bus instances so that a generic overlay can be used across multiple platforms. J721E SK schematics: https://www.ti.com/lit/zip/sprr438 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-6-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am69-sk: Enable camera peripheralsVaishnav Achath1-0/+51
CSI cameras are controlled using I2C. On AM69 Starter Kit, this is routed to I2C-1, so enable the instance, TCA9543 I2C switch and the TCA6408 GPIO expander on the bus. AM69 SK has the CSI2RX routed to a MIPI CSI connector and to 22-pin RPi camera connector through an analog mux with GPIO control, model that so that an overlay can control the mux state according to connected cameras. AM69 SK schematics: https://www.ti.com/lit/zip/sprr466 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-5-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-am68-sk-base-board: Enable camera peripheralsVaishnav Achath1-0/+50
CSI cameras are controlled using I2C. On AM68 Starter Kit, this is routed to I2C-1, so enable the instance and the TCA9543 I2C switch on the bus. AM68 SK schematics: https://www.ti.com/lit/zip/sprr463 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-4-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j784s4-evm: Enable camera peripheralsVaishnav Achath1-0/+25
CSI cameras are controlled using I2C. On J784S4 EVM, this is routed to I2C-5, so enable the instance and the TCA6408 GPIO expander on the bus. J784S4 EVM schematics: https://www.ti.com/lit/zip/sprr458 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19arm64: dts: ti: k3-j721s2-common-proc-board: Enable camera peripheralsVaishnav Achath1-0/+25
CSI cameras are controlled using I2C. On J721S2 Common Processor Board, this is routed to I2C-5, so enable the instance and the TCA6408 GPIO expander on the bus. Common Processor Board schematics: https://www.ti.com/lit/zip/sprr411 J721S2 SoM schematics: https://www.ti.com/lit/zip/sprr439 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240215085518.552692-2-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-17arm64: dts: ti: Add reserved memory for watchdogLi Hua Qian1-0/+10
This patch adds a reserved memory for the TI AM65X platform watchdog to reserve the specific info, triggering the watchdog reset in last boot, to know if the board reboot is due to a watchdog reset. Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> Link: https://lore.kernel.org/r/20240117060654.109424-1-huaqian.li@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: Add support for TI J722S Evaluation ModuleVaishnav Achath2-0/+254
Add basic support for the J722S EVM with UART console and MMC SD as rootfs. Schematics are available at: https://www.ti.com/lit/zip/sprr495 Co-developed-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20240206100608.127702-4-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: Introduce J722S family of SoCsVaishnav Achath2-0/+92
The J722S is a family of application processors built for Automotive and Linux Application development. J722S family of SoCs is a superset of the AM62P SoC family and shares similar memory map, thus the nodes are being reused from AM62P includes instead of duplicating the definitions. Some highlights of J722S SoC (in addition to AM62P SoC features) are: * Two Cortex-R5F for Functional Safety or general-purpose usage and two C7x floating point vector DSP with Matrix Multiply Accelerator for deep learning. * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC). * 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio, 4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP, ePWM, among other peripherals. For those interested, more details about this SoC can be found in the Technical Reference Manual here: https://www.ti.com/lit/zip/sprujb3 Co-developed-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20240206100608.127702-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Support IOT2050-SM variantBaocheng Su2-0/+190
Main differences between the new variant and Advanced PG2: 1. Arduino interface is removed. Instead, an new ASIC is added for communicating with PLC 1200 signal modules. 2. USB 3.0 type A connector is removed, only USB 2.0 type A connector is available. 3. DP interface is removed. Instead, to communicate with PLC 1200 signal modules, a USB 3.0 type B connector is added but the signals are actually not USB. 4. DDR size is increased to 4 GB. 5. Two sensors are added, one tilt sensor and one light sensor. The light sensor it not yet added to the DT at this stage as it depends on to-be-added bindings. Co-developed-by: Chao Zeng <chao.zeng@siemens.com> Signed-off-by: Chao Zeng <chao.zeng@siemens.com> Co-developed-by: Li Hua Qian <huaqian.li@siemens.com> Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> Signed-off-by: Baocheng Su <baocheng.su@siemens.com> [Jan: rebase over dtsi refactorings, split-out light sensor, improve LEDs] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/d24e920547986499f6e8e39c833e414679b12ab4.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Annotate LED nodesJan Kiszka1-7/+26
Add function and color properties and use the common scheme for the node name. We can't change the user-visible labels, though, due to existing userspace relying on the current format. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/331f8756483e3f896a3e50e069b3e2c0fae7a8ac.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Factor out DP related bitsJan Kiszka6-89/+102
There is a variant coming which does not support the Display Port. Move all related bits into a separate dtsi so that only those variants supporting the interface can include it. Along that, remove a redundant clock setting from k3-am65-iot2050-common-pg1.dtsi. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/3397d917d7c97f7aec05bc5f65eef3a6fe843650.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Factor out enabling of USB3 supportJan Kiszka5-31/+29
Already simplifies the existing code by avoid the switch back in the m2 variant to what k3-am65-main.dtsi provided as base. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/51d9be5ddbf74f90bc915ab5473b9ea9a4b0cdf7.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Factor out arduino connector bitsJan Kiszka6-753/+772
A new variant is to be added which will not have a arduino connector like the existing ones. Factor out all bits that are specific to this connector. The split is not perfect because wkup_gpio0 is defined based on what is common to all variants having the connector, thus containing also connector-unrelated information. But this is still cleaner than replicating this node into all 4 variants. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/3366367dc9f190c9e21027b9a810886791e99245.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: iot2050: Disable R5 lockstep for all PG2 boardsBaocheng Su5-17/+12
The R5 lockstep disabling should be common for all PG2 boards, move it from variants dts to common-pg2.dtsi. As now the Basic PG2 consumes this twice, move Basic disabling to the PG1 variant. Signed-off-by: Baocheng Su <baocheng.su@siemens.com> [Jan: avoid duplication of disabling for Basic PG2] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/f692d0211915aefd4de7c9ecff5234683c9c7d59.1707463401.git.jan.kiszka@siemens.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: k3-am62-main: disable usb lpmAndrejs Cainikovs1-0/+4
AM62 USB works with some devices, while failing to operate with others. [ 560.189822] xhci-hcd xhci-hcd.4.auto: xHCI Host Controller [ 560.195631] xhci-hcd xhci-hcd.4.auto: new USB bus registered, assigned bus number 2 [ 574.388509] xhci-hcd xhci-hcd.4.auto: can't setup: -110 [ 574.393814] xhci-hcd xhci-hcd.4.auto: USB bus 2 deregistered [ 574.399544] xhci-hcd: probe of xhci-hcd.4.auto failed with error -110 This seems to be related to LPM (Link Power Management), and disabling it turns USB into reliable working state. As per AM62 reference manual: > 4.8.2.1 USB2SS Unsupported Features > > The following features are not supported on this family of devices: > ... > - USB 2.0 ECN: Link Power Management (LPM) > ... Fixes: 2240f96cf3cd ("arm64: dts: ti: k3-am62-main: Add support for USB") Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20240209130213.38908-1-andrejs.cainikovs@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: verdin-am62: Set VDD CORE minimum voltage to 0.75VFrancesco Dolcini1-1/+1
Set VDD_CORE minimum voltage to 0.75V, TI AM62 can run at either 0.75V or 0.85V depending on the actual speed grade and on the maximum configured speed (1.4GHz frequency requires 0.85V). The actual value is programmed into the PMIC EEPROM during manufacturing (according to the SOC speed grade) and this ensure that both the voltage values are valid and therefore the OS will not overwrite the value programmed into the PMIC. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240213155622.18309-1-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: k3-am62-wakeup: Configure ti-sysc for wkup_uart0Tony Lindgren1-6/+28
The devices in the wkup domain are capable of waking up the system from suspend. We can configure the wkup domain devices in a generic way using the ti-sysc interconnect target module driver like we have done with the earlier TI SoCs. As ti-sysc manages the SYSCONFIG related registers independent of the child hardware device, the wake-up configuration is also set even if wkup_uart0 is reserved by sysfw. The wkup_uart0 device has interconnect target module register mapping like dra7 wkup uart. There is a 1 MB interconnect target range with one uart IP block in the target module. The power domain and clock affects the whole interconnect target module. Note we change the functional clock name to follow the ti-sysc binding and use "fck" instead of "fclk". Also note that we need to disable the target module reset as noted by Markus. Otherwise the sysfw using wkup_uart0 can get confused on some devices leading to boot time issues such as mbox timeouts. Tested-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20240213112510.6334-1-tony@atomide.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: am62-phyboard-lyra: Add overlay to enable a GPIO fanNathan Morrisson2-0/+53
The phyBOARD-Lyra has a GPIO fan header. This overlay enables the fan header and sets the fan to turn on at 65C. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240213005248.1027842-1-nmorrisson@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: k3-j721e-sk: fix PMIC interrupt numberRomain Naour1-2/+2
The tps659413 and tps659411 nodes set WKUP_GPIO0_7 (G28) pin as input to be used as PMIC interrupt but uses 9 (WKUP_GPIO0_9) as "interrupts" property. Replace 9 by 7 for both tps659413 and tps659411 after checking in the board schematic [1]. [1] https://www.ti.com/tool/SK-TDA4VM Fixes: b808cef0be46 ("arm64: dts: ti: k3-j721e-sk: Add TPS6594 family PMICs") Cc: Neha Malcom Francis <n-francis@ti.com> Signed-off-by: Romain Naour <romain.naour@smile.fr> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Link: https://lore.kernel.org/r/20240209171146.307465-2-romain.naour@smile.fr Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: k3-am69-sk: fix PMIC interrupt numberRomain Naour1-1/+1
The tps659413 node set WKUP_GPIO0_83 (AA37) pin as input to be used as PMIC interrupt but uses 39 (WKUP_GPIO0_39) as "interrupts" property. Replace 39 by 83 after checking in the board schematic [1]. [1] https://www.ti.com/tool/SK-AM69 Fixes: 865a1593bf99 ("arm64: dts: ti: k3-am69-sk: Add support for TPS6594 PMIC") Cc: Neha Malcom Francis <n-francis@ti.com> Signed-off-by: Romain Naour <romain.naour@smile.fr> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Link: https://lore.kernel.org/r/20240209171146.307465-1-romain.naour@smile.fr Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: verdin-am62: add support for Verdin USB1 interfaceAndrejs Cainikovs1-11/+44
Add support for Verdin USB1 interface, implements role switch functionality using "gpio-usb-b-connector", VBUS is also now controlled with "regulator-fixed" using a standard GPIO. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240209130106.38739-1-andrejs.cainikovs@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality cardKishon Vijay Abraham I2-1/+65
Add overlay for PCIe (uses the second instance of PCIe in AM654x) and USB3.0 SERDES personality card The PCIe3/USB3 card is provided with the AM65x GP EVM configuration [1] so apply the overlay to k3-am654-gp-evm.dtb [1] https://www.ti.com/lit/ug/spruim7/spruim7.pdf Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-3-70bae3e91597@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-15arm64: dts: ti: Add DT overlay for PCIe + USB2.0 SERDES personality cardRoger Quadros2-1/+61
Enable both SERDES and PCIe DT nodes in order to get PCIe working on the SERDES PCIe x2 personality card. The daughter card also has a USB 2.0 dual-role port. As the base board already supports a 2.0 dual-role port, enable the port on the SERDES card to be a host only port. This will prevent user confusion as having 2 ports in device mode often leads to confusion as to which port is bound to the gadget function driver. The PCIe x2 card is provided with the AM65x IDK configuration [1] so apply the overlay to k3-am654-idk.dtb [1] https://www.ti.com/lit/ug/spruim6a/spruim6a.pdf Co-developed-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-2-70bae3e91597@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: am65x: Fix dtbs_install for Rocktech OLDI overlayRoger Quadros1-0/+1
Add the overlay dtbo file to a Makefile target so it can be picked by the dtbs_install command. Fixes: b8690ed3d1d1 ("arm64: dts: ti: am65x: Add Rocktech OLDI panel DT overlay") Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-1-70bae3e91597@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-am62a: Make the main_conf node a simple-busAndrew Davis1-3/+2
The main_conf node does not need to be a syscon, so change to "simple-bus". This removes a DTS check warning. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-11-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-am62: Make the main_conf node a simple-busAndrew Davis1-3/+2
The main_conf node does not need to be a syscon, so change to "simple-bus". This removes a DTS check warning. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-10-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j7200: Make the FSS node a simple-busAndrew Davis1-5/+6
To do this we convert hbmc-mux to "reg-mux", then the FSS node does not need to be a syscon, so change to "simple-bus". This removes a DTS check warning. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-9-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j721s2: Convert serdes_ln_ctrl node into reg-muxAndrew Davis1-3/+3
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-8-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j721s2: Convert usb_serdes_mux node into reg-muxAndrew Davis1-1/+1
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-7-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j721e: Convert usb_serdes_mux node into reg-muxAndrew Davis1-3/+4
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-6-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j721e: Convert serdes_ln_ctrl node into reg-muxAndrew Davis1-8/+8
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-5-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j7200: Convert usb_serdes_mux node into reg-muxAndrew Davis1-2/+3
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-4-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-j7200: Convert serdes_ln_ctrl node into reg-muxAndrew Davis1-3/+4
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-3-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-14arm64: dts: ti: k3-am64: Convert serdes_ln_ctrl node into reg-muxAndrew Davis1-3/+4
This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240124184722.150615-1-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-09-19 03:55:05 +0300