summaryrefslogtreecommitdiff
path: root/arch/arm64/boot
AgeCommit message (Collapse)AuthorFilesLines
2023-10-12arm64: dts: imx8mp: Describe VDD_ARM run and standby voltage for Data Modul ↵Marek Vasut1-0/+2
i.MX8M Plus eDM SBC Describe VDD_ARM (BUCK2) run and standby voltage in DT. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-12arm64: dts: ti: k3-j784s4-main: Add BCDMA instance for CSI2RXVaishnav Achath1-0/+17
J784S4 has a dedicated BCDMA controller for the Camera Serial Interface. Events from the BCDMA controller instance are routed through the main UDMA interrupt aggregator as unmapped events. Add the node for the DMA controller and keep it disabled by default. See J784S4 Technical Reference Manual (SPRUJ52) for further details: http://www.ti.com/lit/zip/spruj52 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20231010111723.17524-3-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-12arm64: dts: ti: k3-j721s2-main: Add BCDMA instance for CSI2RXVaishnav Achath1-0/+17
J721S2 has a dedicated BCDMA controller for the Camera Serial Interface. Events from the BCDMA controller instance are routed through the main UDMA interrupt aggregator as unmapped events. Add the node for the DMA controller and keep it disabled by default. See J721S2 Technical Reference Manual (SPRUJ28) for further details: http://www.ti.com/lit/pdf/spruj28 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20231010111723.17524-2-vaishnav.a@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-12arm64: dts: ti: k3-*: Convert NAVSS to simple-busVignesh Raghavendra8-8/+8
"simple-mfd" as standalone compatible is frowned upon, so model main and MCU NAVSS (Navigator SubSystem) nodes as simple-bus as there is really no need for these nodes to be MFD. Link: https://lore.kernel.org/r/20231005151302.1290363-3-vigneshr@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-12arm64: dts: ti: k3-*: Convert DMSS to simple-busVignesh Raghavendra3-3/+3
"simple-mfd" as standalone compatible is frowned upon, so model DMSS (Data Movement Subsystem) node as simple-bus as there is really no need for these nodes to be MFD. Link: https://lore.kernel.org/r/20231005151302.1290363-2-vigneshr@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-12arm64: dts: rockchip: Remove duplicate regulator vcc3v3_wf from rock-5bTamás Szűcs1-22/+1
Regulator for VCC3V3_WF has been added as vcc3v3_pcie2x1l0 first. Clean this up. Fixes: 1c9a53ff7ece ("arm64: dts: rockchip: Add sdio node to rock-5b") Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch> Link: https://lore.kernel.org/r/20231011181757.58047-1-tszucs@protonmail.ch Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-12arm64: dts: rockchip: Add QuartzPro64 SBC device treeOndrej Jirman2-0/+1138
QuartzPro64 dev board features: - RK3588 SoC - 16 GiB LPDDR4 RAM - 2x RK806 PMIC - RTC chip - eMMC, uSD card interface - 2x GMAC (one is PCIe connected) - SATA port - 2x USB 2.0 host only ports - 1x usb 3.0 host only port - 1x Type-C port (USB 3.0 + Alt-DP), TCPM support - 1x PCIe 3.0 4x slot - Audio codec (ES8388) + power amps - WiFi/Bluetooth - Power and work LEDs - 4 adc ladder buttons, 1 power button, 1 maskrom button Signed-off-by: Ondrej Jirman <megi@xff.cz> Link: https://lore.kernel.org/r/20231011215856.2082241-3-megi@xff.cz Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-10-11Merge tag 'linux-can-fixes-for-6.6-20231009' of ↵Jakub Kicinski1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can Marc Kleine-Budde says: ==================== pull-request: can 2023-10-09 Lukas Magel's patch for the CAN ISO-TP protocol fixes the TX state detection and wait behavior. John Watts contributes a patch to only show the sun4i_can Kconfig option on ARCH_SUNXI. A patch by Miquel Raynal fixes the soft-reset workaround for Renesas SoCs in the sja1000 driver. Markus Schneider-Pargmann's patch for the tcan4x5x m_can glue driver fixes the id2 register for the tcan4553. 2 patches by Haibo Chen fix the flexcan stop mode for the imx93 SoC. * tag 'linux-can-fixes-for-6.6-20231009' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can: can: tcan4x5x: Fix id2_register for tcan4553 can: flexcan: remove the auto stop mode for IMX93 can: sja1000: Always restart the Tx queue after an overrun arm64: dts: imx93: add the Flex-CAN stop mode by GPR can: sun4i_can: Only show Kconfig if ARCH_SUNXI is set can: isotp: isotp_sendmsg(): fix TX state detection and wait behavior ==================== Link: https://lore.kernel.org/r/20231009085256.693378-1-mkl@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-10-10Merge tag 'irq-urgent-2023-10-10-v2' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A set of updates for interrupt chip drivers: - Fix the fail of the Qualcomm PDC driver on v3.2 hardware which is caused by a control bit being moved to a different location - Update the SM8150 device tree PDC resource so the version register can be read - Make the Renesas RZG2L driver correct for interrupts which are outside of the LSB in the TSSR register by using the proper macro for calculating the mask - Document the Renesas RZ2GL device tree binding correctly and update them for a few devices which faul to boot otherwise - Use the proper accessor in the RZ2GL driver instead of blindly dereferencing an unchecked pointer - Make GICv3 handle the dma-non-coherent attribute correctly - Ensure that all interrupt controller nodes on RISCV are marked as initialized correctly Maintainer changes: - Add a new entry for GIC interrupt controllers and assign Marc Zyngier as the maintainer - Remove Marc Zyngier from the core and driver maintainer entries as he is burried in work and short of time to handle that. Thanks to Marc for all the great work he has done in the past couple of years! Also note that commit 5873d380f4c0 ("irqchip/qcom-pdc: Add support for v3.2 HW") has a incorrect SOB chain. The real author is Neil. His patch was posted by Dmitry once and Neil picked it up from the list and reposted it with the bogus SOB chain. Not a big deal, but worth to mention. I wanted to fix that up, but then got distracted and Marc piled more changes on top. So I decided to leave it as is instead of rebasing world" * tag 'irq-urgent-2023-10-10-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: MAINTAINERS: Remove myself from the general IRQ subsystem maintenance MAINTAINERS: Add myself as the ARM GIC maintainer irqchip/renesas-rzg2l: Convert to irq_data_get_irq_chip_data() irqchip/stm32-exti: add missing DT IRQ flag translation irqchip/riscv-intc: Mark all INTC nodes as initialized irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing irqchip/gic-v3-its: Split allocation from initialisation of its_node dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property dt-bindings: interrupt-controller: renesas,irqc: Add r8a779f0 support dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G2UL SoC irqchip: renesas-rzg2l: Fix logic to clear TINT interrupt source dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Update description for '#interrupt-cells' property arm64: dts: qcom: sm8150: extend the size of the PDC resource irqchip/qcom-pdc: Add support for v3.2 HW
2023-10-10arm64: tegra: Mark Tegra234 SPI as compatible with Tegra114Thierry Reding1-3/+3
According to the bindings, both Tegra210 and Tegra114 compatible strings need to be specified since the version of this hardware block found in Tegra210 is backwards-compatible. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Add dmas and dma-names for Tegra234 UARTEThierry Reding1-0/+2
Commit 940acdac99b2 ("arm64: tegra: Add UARTE device tree node on Tegra234") added the device tree node for the UARTE on Tegra234 but didn't include the "dmas" and "dma-names" properties required for this device when it's used in high-speed mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Use correct format for clocks propertyThierry Reding1-16/+16
phandle and clock specifier pairs should be enclosed in angular brackets. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Remove duplicate nodes on Jetson Orin NXThierry Reding1-13/+0
The SBSA UART and TCU as well as the TCU alias and the stdout-path are configured via the P3768 carrier board DTS include, so the can be removed from the system DTS file. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Add missing current-speed for SBSA UARTThierry Reding2-0/+2
The SBSA UART device tree bindings require a current-speed property that specifies the baud rate configured by the firmware. Add it on Jetson AGX Orin and Jetson Orin Nano/NX. Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Add display panel node on SmaugDiogo Ivo1-0/+27
The Google Pixel C has a JDI LPM102A188A display panel, so add a DT node for it. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Add backlight node on SmaugDiogo Ivo1-0/+31
The Google Pixel C has a TI LP8557 backlight controller, so add a DT node for it. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Add DSI/CSI regulator on SmaugDiogo Ivo1-0/+8
Add the node for the DSI/CSI regulator in the Pixel C. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Enable IOMMU for host1x on Tegra132Rayyan Ansari1-0/+2
Add the iommu property to the host1x node to register it with its swgroup. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Fix P3767 QSPI speedBrad Griffis1-1/+1
The QSPI device used on Jetson Orin NX and Nano modules (p3767) is the same as Jetson AGX Orin (p3701) and should have a maximum speed of 102 MHz. Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX") Signed-off-by: Brad Griffis <bgriffis@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: tegra: Fix P3767 card detect polarityBrad Griffis1-1/+1
The SD card detect pin is active-low on all Orin Nano and NX SKUs that have an SD card slot. Fixes: 13b0aca303e9 ("arm64: tegra: Support Jetson Orin NX") Signed-off-by: Brad Griffis <bgriffis@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10arm64: dts: imx8mp-beacon: Add DMIC supportAdam Ford1-0/+43
The baseboard has a connector for a pulse density microphone. This is connected via the micfil interface and uses the DMIC audio codec with the simple-audio-card. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mn-beacon: Add DMIC supportAdam Ford1-0/+38
The baseboard has a connector for a pulse density microphone. This is connected via the micfil interface and uses the DMIC audio codec with the simple-audio-card. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mm-beacon: Add DMIC supportAdam Ford1-0/+39
The baseboard has a connector for a pulse density microphone. This is connected via the micfil interface and uses the DMIC audio codec with the simple-audio-card. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mm-beacon: Migrate sound card to simple-audio-cardAdam Ford1-12/+25
Instead of using a custom glue layer connecting the wm8962 CODEC to the SAI3 sound-dai, migrate the sound card to simple-audio-card. This also brings this board in line with the imx8mn-beacon and imx8mp-beacon. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mn-evk: Remove codec clocks/clock-namesFabio Estevam1-2/+0
Per wlf,wm8524.yaml, 'clocks' and 'clock-names' are not valid properties. Remove them to fix the following schema warning: audio-codec: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected) from schema $id: http://devicetree.org/schemas/sound/wlf,wm8524.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref ClkAdam Ford1-7/+15
There is a I2C controlled 100MHz Reference clock used by the PCIe controller. Configure this clock's DIF1 output to be used by the PCIe. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mn: Add sound-dai-cells to micfil nodeAdam Ford1-0/+1
Per the DT bindings, the micfil node should have a sound-dai-cells entry. Fixes: cca69ef6eba5 ("arm64: dts: imx8mn: Add support for micfil") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mm: Add sound-dai-cells to micfil nodeAdam Ford1-0/+1
Per the DT bindings, the micfil node should have a sound-dai-cells entry. Fixes: 3bd0788c43d9 ("arm64: dts: imx8mm: Add support for micfil") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: freescale: add initial device tree for TQMLS1088AGregor Herburger4-0/+253
This adds support for TQMLS1088A SOM on MBLS10xxA baseboard. Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: freescale: add initial device tree for TQMLS1043A/TQMLS1046AGregor Herburger8-0/+479
This adds support for the TQMLS1043A and TQMLS1046A SOM and the MBLS10xxA baseboard. TQMLS1043A and TQMLS1046A share a common layout and can be used on the MBLS10xxA. Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: ls1043a: remove second dspi nodeGregor Herburger1-14/+0
According to the documentation the ls1043a has only one spi controller. So remove the second one. Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: freescale: Add support for LX2162 SoM & Clearfog BoardJosua Mayer3-0/+450
Add support for the SolidRun LX2162A System on Module (SoM), and the Clearfog evaluation board. The SoM has few software-controllable features: - AR8035 Ethernet PHY - eMMC - SPI Flash - fan controller - various eeproms The Clearfog evaluation board provides: - microSD connector - USB-A - 2x 10Gbps SFP+ - 2x 25Gbps SFP+ with a retimer - 8x 2.5Gbps RJ45 - 2x mPCI (assembly option / disables 2xRJ45) The 8x RJ45 ports are connected with an 8-port PHY: Marvell 88E2580 supporting up to 5Gbps, while SoC and magnetics are limited to 2.5Gbps. However 2500 speed is untested due to documentation and drivier limitations. To avoid confusion the phy nodes have been explicitly limited to 1000 for now. The PCI nodes are disabled, but explicitly added to mark that this board can have pci. It is expected that the bootloader will patch the status property "okay" and disable 2x RJ45 ports, according to active serdes configuration. Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: lx2160a: describe the SerDes block #2Josua Mayer1-0/+7
Add description for the LX2160A second SerDes block. It is functionally identical to the first one already added in commit 3cbe93a1f540 ("arch: arm64: dts: lx2160a: describe the SerDes block #1"). The SerDes driver currently updates the registers of all 8 lanes by default during probe. Because currently this driver only supports configuration of network protocols, this can lead to problems with certain configurations. Set status property to "disabled" by default so that existing boards are not impacted. Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx93: update gpio nodePeng Fan1-12/+16
Per binding doc, i.MX93 GPIO supports two interrupts and one register base, compatible with i.MX8ULP. The current fsl,imx7ulp-gpio compatible could work for i.MX93 in gpio-vf610.c driver, it is based on the base address are splited into two with offset added in device tree node. Now following hardware design, using one register base in device tree node. This may break users who use compatible fsl,imx7ulp-gpio to enable i.MX93 GPIO. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8ulp: update gpio nodePeng Fan1-9/+12
The i.MX8ULP GPIO supports two interrupts and one register base, the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in gpio-vf610.c driver, it is based on the base address are splited into two with offset added in device tree node. Now following hardware design, using one register base in device tree node. This may break users who use compatible fsl,imx7ulp-gpio to enable i.MX8ULP GPIO. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mq-librem5: Fix tps65132 compatibleFabio Estevam1-1/+1
The valid compatible string for the tps65132 regulator is "ti,tps65132". Change it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mp-debix-model-a: Remove USB hub reset-gpiosFabio Estevam1-3/+0
The SAI2_TXC pin is left unconnected per the imx8mp-debix-model-a schematics: https://debix.io/Uploads/Temp/file/20230331/DEBIX%20Model%20A%20Schematics.pdf Also, the RTS5411E USB hub chip does not have a reset pin. Remove this pin description to properly describe the hardware. This also fixes the following schema warning: hub@1: 'reset-gpios' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml# Fixes: 0253e1cb6300 ("arm64: dts: imx8mp-debix: add USB host support") Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8-apalis-v1.1: Fix Ethernet PHY reset-namesFabio Estevam1-1/+1
Per ethernet-phy.yaml, the expected value for the 'reset-names' property is "phy". Change it accordingly to fix the following schema warning: imx8qm-apalis-ixora-v1.1.dtb: ethernet-phy@7: reset-names:0: 'phy' was expected from schema $id: http://devicetree.org/schemas/net/ethernet-phy.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mm-venice-gw790: Remove phy-mode from switch nodeFabio Estevam1-1/+0
Per microchip,ksz.yaml, phy-mode is not a valid property in the top-level switch node. phy-mode = "rgmii-id" is already passed in the CPU port switch (port@5). Remove it from the top-level switch node to fix the following schema warning: switch@5f: Unevaluated properties are not allowed ('phy-mode' was unexpected) from schema $id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mp-venice-gw73xx: add TPM deviceTim Harvey1-1/+8
Add the TPM device found on the GW73xx revision F PCB. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mm-venice-gw73xx: add TPM deviceTim Harvey1-1/+9
Add the TPM device found on the GW73xx revision F PCB. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mp-verdin: Remove invalid property from eqosFabio Estevam1-1/+0
Per nxp,dwmac-imx.yaml, it is not valid to pass 'phy-supply'. The reg_module_eth1phy regulator is marked with 'regulator-always-on', so it is safe to remove it from the eqos node. Remove it to fix the following schema warning: imx8mp-verdin-nonwifi-dahlia.dtb: ethernet@30bf0000: Unevaluated properties are not allowed ('phy-supply' was unexpected) from schema $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8qm-ss-img: Fix jpegenc compatible entryFabio Estevam1-1/+1
The first compatible entry for the jpegenc should be 'nxp,imx8qm-jpgenc'. Change it accordingly to fix the following schema warning: imx8qm-apalis-eval.dtb: jpegenc@58450000: compatible: 'oneOf' conditional failed, one must be fixed: 'nxp,imx8qm-jpgdec' is not one of ['nxp,imx8qxp-jpgdec', 'nxp,imx8qxp-jpgenc'] 'nxp,imx8qm-jpgenc' was expected 'nxp,imx8qxp-jpgdec' was expected Fixes: 5bb279171afc ("arm64: dts: imx8: Add jpeg encoder/decoder nodes") Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Mirela Rabulea <mirela.rabulea@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx93: Fix the dmas entries orderFabio Estevam1-16/+16
Per fsl-lpuart.yaml, the dmas and dma-names entries should be 'rx' followed by 'tx'. Change the order to fix the following schema warning: imx93-11x11-evk.dtb: serial@44380000: dma-names:0: 'rx' was expected from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# imx93-11x11-evk.dtb: serial@44380000: dma-names:1: 'tx' was expected from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8mm-venice-gw790: Pass GSC address/size-cellsFabio Estevam5-0/+10
Per gateworks-gsc.yaml, #address-cells and #size-cells are mandatory properties. Pass them to fix the following schema warning: imx8mm-venice-gw7903.dtb: gsc@20: '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/mfd/gateworks-gsc.yaml# imx8mm-venice-gw7903.dtb: gsc@20: '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/mfd/gateworks-gsc.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8dxl: Pass fsl,imx8dxl-sc-wdtFabio Estevam1-1/+1
Pass 'fsl,imx8dxl-sc-wdt' to fix the following schema warning: system-controller: watchdog:compatible:0: 'fsl,imx8qxp-sc-wdt' was expected from schema $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# system-controller: watchdog:compatible: ['fsl,imx-sc-wdt'] is too short from schema $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8dxl: Pass fsl,imx8dxl-sc-thermalFabio Estevam1-1/+1
Pass 'fsl,imx8dxl-sc-thermal' to fix the following schema warning: system-controller: thermal-sensor:compatible:0: 'fsl,imx8qxp-sc-thermal' was expected from schema $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# system-controller: thermal-sensor:compatible: ['fsl,imx-sc-thermal'] is too short from schema $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8dxl: Remove wakeup-irqFabio Estevam1-2/+0
wakeup-irq is not documented, and not used anywhere. Remove it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8dxl: Pass fsl,imx8dl-scu-pdFabio Estevam1-1/+1
Pass 'fsl,imx8dl-scu-pd' to fix the following schema warning: system-controller: power-controller:compatible:0: 'fsl,scu-pd' is not one of ['fsl,imx8qm-scu-pd', 'fsl,imx8qxp-scu-pd'] from schema $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10arm64: dts: imx8qm-mek: enable 8qm lpuart2 and lpuart3Frank Li1-0/+26
Enable uart2 and uart3 for imx8qm-mek board. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>