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2023-01-06arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruptionAnshuman Khandual1-0/+1
2022-12-15Revert "arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruption"Will Deacon1-1/+0
2022-12-06Merge branch 'for-next/sysregs' into for-next/coreWill Deacon2-1/+755
2022-12-06Merge branch 'for-next/errata' into for-next/coreWill Deacon1-0/+1
2022-12-01arm64/sysreg: Convert ID_DFR1_EL1 to automatic generationJames Morse1-0/+13
2022-12-01arm64/sysreg: Convert ID_DFR0_EL1 to automatic generationJames Morse1-0/+50
2022-12-01arm64/sysreg: Convert ID_AFR0_EL1 to automatic generationJames Morse1-0/+8
2022-12-01arm64/sysreg: Convert ID_MMFR5_EL1 to automatic generationJames Morse1-0/+12
2022-12-01arm64/sysreg: Convert MVFR2_EL1 to automatic generationJames Morse1-0/+17
2022-12-01arm64/sysreg: Convert MVFR1_EL1 to automatic generationJames Morse1-0/+39
2022-12-01arm64/sysreg: Convert MVFR0_EL1 to automatic generationJames Morse1-0/+39
2022-12-01arm64/sysreg: Convert ID_PFR2_EL1 to automatic generationJames Morse1-0/+16
2022-12-01arm64/sysreg: Convert ID_PFR1_EL1 to automatic generationJames Morse1-0/+40
2022-12-01arm64/sysreg: Convert ID_PFR0_EL1 to automatic generationJames Morse1-0/+41
2022-12-01arm64/sysreg: Convert ID_ISAR6_EL1 to automatic generationJames Morse1-0/+32
2022-12-01arm64/sysreg: Convert ID_ISAR5_EL1 to automatic generationJames Morse1-0/+34
2022-12-01arm64/sysreg: Convert ID_ISAR4_EL1 to automatic generationJames Morse1-0/+39
2022-12-01arm64/sysreg: Convert ID_ISAR3_EL1 to automatic generationJames Morse1-0/+38
2022-12-01arm64/sysreg: Convert ID_ISAR2_EL1 to automatic generationJames Morse1-0/+46
2022-12-01arm64/sysreg: Convert ID_ISAR1_EL1 to automatic generationJames Morse1-0/+39
2022-12-01arm64/sysreg: Convert ID_ISAR0_EL1 to automatic generationJames Morse1-0/+36
2022-12-01arm64/sysreg: Convert ID_MMFR4_EL1 to automatic generationJames Morse1-0/+38
2022-12-01arm64/sysreg: Convert ID_MMFR3_EL1 to automatic generationJames Morse1-0/+40
2022-12-01arm64/sysreg: Convert ID_MMFR2_EL1 to automatic generationJames Morse1-0/+41
2022-12-01arm64/sysreg: Convert ID_MMFR1_EL1 to automatic generationJames Morse1-0/+49
2022-12-01arm64/sysreg: Convert ID_MMFR0_EL1 to automatic generationJames Morse1-0/+47
2022-12-01arm64/sysreg: Extend the maximum width of a register and symbol nameJames Morse1-1/+1
2022-11-18arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruptionAnshuman Khandual1-0/+1
2022-11-09arm64/hwcap: Add support for SVE 2.1Mark Brown1-0/+1
2022-11-09arm64/hwcap: Add support for FEAT_RPRFMMark Brown1-1/+5
2022-11-09arm64/hwcap: Add support for FEAT_CSSCMark Brown1-1/+6
2022-11-08arm64: Enable data independent timing (DIT) in the kernelArd Biesheuvel1-0/+1
2022-10-07arm64/sysreg: Fix typo in SCTR_EL1.SPINTMASKMark Brown1-1/+1
2022-09-30Merge branch 'for-next/alternatives' into for-next/coreCatalin Marinas1-0/+2
2022-09-30Merge branches 'for-next/doc', 'for-next/sve', 'for-next/sysreg', 'for-next/g...Catalin Marinas2-1/+449
2022-09-16arm64: alternatives: have callbacks take a capMark Rutland1-0/+2
2022-09-16arm64: errata: remove BF16 HWCAP due to incorrect result on Cortex-A510James Morse1-0/+1
2022-09-16arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generationMark Brown1-0/+16
2022-09-16arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generationMark Brown1-0/+4
2022-09-16arm64/sysreg: Convert ID_AA64FDR0_EL1 to automatic generationMark Brown1-0/+63
2022-09-09arm64/sysreg: Add defintion for ALLINTMark Brown1-0/+6
2022-09-09arm64/sysreg: Convert SCXTNUM_EL1 to automatic generationMark Brown1-0/+4
2022-09-09arm64/sysreg: Convert TIPDR_EL1 to automatic generationMark Brown1-0/+4
2022-09-09arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generationMark Brown1-0/+45
2022-09-09arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generationMark Brown1-0/+76
2022-09-09arm64/sysreg: Convert ID_AA64MMFR2_EL1 to automatic generationMark Brown1-0/+67
2022-09-09arm64/sysreg: Convert ID_AA64MMFR1_EL1 to automatic generationKristina Martsenko1-0/+71
2022-09-09arm64/sysreg: Convert ID_AA64MMFR0_EL1 to automatic generationMark Brown1-0/+73
2022-09-09arm64/sysreg: Convert HCRX_EL2 to automatic generationMark Brown1-0/+16
2022-09-09arm64/sysreg: Describe ID_AA64SMFR0_EL1.SMEVer as an enumerationMark Brown1-1/+3
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-05 16:49:50 +0300