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2011-07-23Merge branch 'devel-stable' into for-nextRussell King106-4020/+4837
Conflicts: arch/arm/kernel/entry-armv.S
2011-07-23Merge branches 'btc', 'dma', 'entry', 'fixes', 'linker-layout', 'misc', ↵Russell King185-1863/+2403
'mmci', 'suspend' and 'vfp' into for-next
2011-07-22ARM: 7004/1: fix traps.h compile warningsMikael Pettersson1-0/+3
Building kernel 3.0 for an n2100 (plat-iop) results in: In file included from arch/arm/plat-iop/cp6.c:20: /tmp/linux-3.0/arch/arm/include/asm/traps.h:12: warning: 'struct pt_regs' declared inside parameter list /tmp/linux-3.0/arch/arm/include/asm/traps.h:12: warning: its scope is only this definition or declaration, which is probably not what you want /tmp/linux-3.0/arch/arm/include/asm/traps.h:48: warning: 'struct pt_regs' declared inside parameter list /tmp/linux-3.0/arch/arm/include/asm/traps.h:48: warning: 'struct task_struct' declared inside parameter list arch/arm/plat-iop/cp6.c:45: warning: initialization from incompatible pointer type Nothing here depends on the layout of pt_regs or task_struct, so this can be fixed by adding forward struct declarations to asm/traps.h. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-22ARM: 6998/2: kernel: use proper memory barriers for bitopsHeechul Yun1-2/+2
Improve scalability by avoiding costly and unnecessary L2 cache sync in handling bitops. Signed-off-by: Heechul Yun <hyun@nvidia.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-22ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAMPetr Štetiar1-1/+5
I've got hands on one ts-7300 board, which is equiped with 128MB RAM in two 64MB memory chips, so it's 16 banks/8MB each. Without this patch, the bootmem init code complains about small NR_BANKS number and only lower 64MB is accessible. Cc: Ryan Mallon <ryan@bluewatersys.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-21ARM: Fix build errors caused by adding generic macrosRussell King8-21/+5
Commit 66a625a (ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros) introduced build errors when PM_SLEEP is not enabled. The per-CPU do_suspend/do_resume functions are defined via the preprocessor to constant 0. However, the macros which use these were converted to assembly, resulting in undefined references to these functions. Fix that by moving the ! ifdef section into proc-macros.S and deleting it from all effected proc-*.S files. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-21ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPURussell King1-11/+28
Our selection of interrupts to consider for IRQ migration is sub- standard. We were potentially including per-CPU interrupts in our migration strategy, but omitting chained interrupts. This caused some interrupts to remain on a downed CPU. We were also trying to migrate interrupts which were not migratable, resulting in an OOPS. Instead, iterate over all interrupts, skipping per-CPU interrupts or interrupts whose affinity does not include the downed CPU, and attempt to set the affinity for every one else if their chip implements irq_set_affinity(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-21ARM: CPU hotplug: pass in proper affinity mask on IRQ migrationRussell King1-6/+4
Now that the GIC takes care of selecting a target interrupt from the affinity mask, we don't need all this complexity in the core code anymore. Just detect when we need to break affinity. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-21ARM: GIC: avoid routing interrupts to offline CPUsRussell King1-3/+3
The irq_set_affinity() method can be called with masks which include offline CPUs. This allows offline CPUs to have interrupts routed to them by writing to /proc/irq/*/smp_affinity after hotplug has taken a CPU offline. Fix this by ensuring that we select a target CPU present in both the required affinity and the online CPU mask. Ensure that we return IRQ_SET_MASK_OK (which happens to be 0) on success to ensure generic code copies the new mask into the irq_data structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-21ARM: CPU hotplug: fix abuse of irqdesc->nodeRussell King2-9/+2
irqdesc's node member is supposed to mark the numa node number for the interrupt. Our use of it is non-standard. Remove this, replacing the functionality with a test of the affinity mask. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-20Merge branch 'fixes' of ↵Linus Torvalds3-7/+24
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: davinci: DM365 EVM: fix video input mux bits ARM: davinci: Check for NULL return from irq_alloc_generic_chip arm: davinci: Fix low level gpio irq handlers' argument
2011-07-19ARM: 7000/1: LPAE: Use long long printk format for displaying the pudCatalin Marinas1-1/+1
Currently using just long but this is not enough for the LPAE format (64-bit entries). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19ARM: 6999/1: head, zImage: Always Enter the kernel in ARM stateDave Martin3-1/+18
Currently, the documented kernel entry requirements are not explicit about whether the kernel should be entered in ARM or Thumb, leading to an ambiguitity about how to enter Thumb-2 kernels. As a result, the kernel is reliant on the zImage decompressor to enter the kernel proper in the correct instruction set state. This patch changes the boot entry protocol for head.S and Image to be the same as for zImage: in all cases, the kernel is now entered in ARM. Documentation/arm/Booting is updated to reflect this new policy. A different rule will be needed for Cortex-M class CPUs as and when support for those lands in mainline, since these CPUs don't support the ARM instruction set at all: a note is added to the effect that the kernel must be entered in Thumb on such systems. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanenceRussell King4-60/+12
Kernel space needs very little in the way of BTC maintanence as most mappings which are created and destroyed are non-executable, and so could never enter the instruction stream. The case which does warrant BTC maintanence is when a module is loaded. This creates a new executable mapping, but at that point the pages have not been initialized with code and data, so at that point they contain unpredictable information. Invalidating the BTC at this stage serves little useful purpose. Before we execute module code, we call flush_icache_range(), which deals with the BTC maintanence requirements. This ensures that we have a BTC maintanence operation before we execute code via the newly created mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19davinci: DM365 EVM: fix video input mux bitsJon Povey1-2/+2
Video input mux settings for tvp7002 and imager inputs were swapped. Comment was correct. Tested on EVM with tvp7002 input. Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> Acked-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: stable@kernel.org Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2011-07-19ARM: davinci: Check for NULL return from irq_alloc_generic_chipTodd Poynor1-0/+6
Avoid NULL dereference of irq_alloc_generic_chip return in low memory conditions. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2011-07-19Merge branch 'dma' of http://git.linaro.org/git/people/nico/linux into ↵Russell King55-288/+304
devel-stable
2011-07-18ARM: ARM_DMA_ZONE_SIZE is no moreNicolas Pitre2-7/+0
One less dependency on mach/memory.h. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2-2/+1
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre4-4/+9
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre6-4/+15
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2-4/+3
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre13-4/+48
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre3-7/+2
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre13-7/+13
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: add dma_zone_size to the machine_desc structureNicolas Pitre2-0/+10
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: change ARM_DMA_ZONE_SIZE into a variableNicolas Pitre2-12/+22
Having this value defined at compile time prevents multiple machines with conflicting definitions to coexist. Move it to a variable in preparation for having a per machine value selected at run time. This is relevant only when CONFIG_ZONE_DMA is selected. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-17Merge branch 's5p-fixes-for-linus' of ↵Linus Torvalds6-26/+41
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung * 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: SAMSUNG: DMA Cleanup as per sparse ARM: SAMSUNG: Check NULL return from irq_alloc_generic_chip
2011-07-16ARM: SAMSUNG: DMA Cleanup as per sparseSangwook Lee4-26/+27
Function declaration differs between file: dma.c and file:dma.h and SPARSE (Documentation/sparse.txt) gives error messages All dma channels are members of 'enum dma_ch' and not 'unsigned int' Please have a look at channel definitions in: arch/arm/mach-s3c64xx/include/mach/dma.h arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h arch/arm/mach-s3c2410/include/mach/dma.h So all arguments should be of type 'enum dma_ch' Signed-off-by: Sangwook Lee <sangwook.lee@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-16ARM: SAMSUNG: Check NULL return from irq_alloc_generic_chipTodd Poynor2-0/+14
Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-07-16ARM: fix regression in IXP4xx clocksourceRichard Cochran1-2/+8
Commit 234b6ceddb4fc2a4bc5b9a7670f070f6e69e0868 clocksource: convert ARM 32-bit up counting clocksources broke the build for ixp4xx and made big endian operation impossible. This commit restores the original behaviour. Signed-off-by: Richard Cochran <richard.cochran@omicron.at> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> [ Thomas says that we might want to have generic BE accessor functions to the MMIO clock source, but that hasn't happened yet, so in the meantime this seems to be the short-term fix for the particular problem - Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-07-15Merge branch 'kprobes-thumb' of git://git.yxit.co.uk/linux into devel-stableRussell King65-1850/+3909
2011-07-13ARM: kprobes: Remove now unused codeJon Medhurst1-738/+0
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Decode ARM preload (immediate) instructionsJon Medhurst1-0/+6
These were missing from the previous implementation. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Reject probing of unprivileged load and store instructionsJon Medhurst1-0/+13
These occur extremely rarely in the kernel and writing test cases for them is difficult. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Use new versions of emulate_ldr() and emulate_str()Jon Medhurst1-14/+30
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Add new versions of emulate_ldr() and emulate_str()Jon Medhurst1-3/+60
These use the register calling conventions required by the new decoding table framework for calling simulated instructions. We rename the old versions of these functions to *_old for now. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Add emulate_rdlo12rdhi16rn0rm8_rwflags_nopc()Jon Medhurst1-3/+36
This is the emulation function for the instruction format used by the ARM multiply long instructions. It replaces use of prep_emulate_rdhi16rdlo12rs8rm0_wflags(). Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Add emulate_rd12rm0_noflags_nopc()Jon Medhurst1-7/+34
This is the emulation function for the instruction format used by the ARM bit-field manipulation instructions. Various other instruction forms can also make use of this and it is used to replace use of prep_emulate_rd12{rm0}{_modify} Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Replace use of prep_emulate_rd12rn16rm0_wflags()Jon Medhurst1-5/+10
These can now use emulate_rd12rn16rm0_rwflags_nopc(). Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Add emulate_rd16rn12rm0rs8_rwflags_nopc()Jon Medhurst1-7/+43
This is the emulation function for the instruction format used by the ARM multiply-accumulate instructions. These don't allow use of PC so we don't have to add special cases for this. This function is used to replace use of prep_emulate_rd16rs8rm0_wflags and prep_emulate_rd16rn12rs8rm0_wflags. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate remaining instruction decoding functions to tablesJon Medhurst1-80/+90
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM space_cccc_100x to decoding tablesJon Medhurst1-20/+13
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM space_cccc_01xx to decoding tablesJon Medhurst1-18/+19
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM space_cccc_0111__1 to decoding tablesJon Medhurst1-46/+36
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM space_cccc_0110__1 to decoding tablesJon Medhurst1-126/+91
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Add emulate_rd12rn16rm0_rwflags_nopc()Jon Medhurst1-0/+27
This is the emulation function for the instruction format used by the ARM media instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM space_cccc_001x to decoding tablesJon Medhurst1-66/+50
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM space_cccc_000x to decoding tablesJon Medhurst1-136/+116
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-13ARM: kprobes: Migrate ARM LDRD and STRD to decoding tablesJon Medhurst1-17/+20
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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