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path: root/arch/loongarch/include/asm/loongarch.h
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3 daysMerge tag 'loongarch-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/c...Linus Torvalds1-0/+1
7 daysLoongArch: Rework CPU feature probe from CPUCFG/IOCSRJiaxun Yang1-0/+1
14 daysMerge tag 'irq-core-2024-09-16' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-4/+14
2024-09-12LoongArch: KVM: Enable paravirt feature control from VMMBibo Mao1-9/+1
2024-09-12LoongArch: KVM: Add PMU support for guestSong Gao1-0/+1
2024-08-23LoongArch: Architectural preparation for AVEC irqchipHuacai Chen1-4/+14
2024-07-22Merge tag 'loongarch-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/c...Linus Torvalds1-1/+12
2024-07-20LoongArch: Add architectural preparation for CPUFreqHuacai Chen1-0/+3
2024-07-20LoongArch: Add writecombine support for DMW-based ioremap()Huacai Chen1-1/+9
2024-07-09LoongArch: KVM: Add PV steal time support in host sideBibo Mao1-0/+1
2024-05-06LoongArch: KVM: Add PV IPI support on host sideBibo Mao1-0/+1
2024-05-06LoongArch: KVM: Add cpucfg area for kvm hypervisorBibo Mao1-0/+11
2023-12-09LoongArch: Slightly clean up drdtime()Xi Ruoyao1-3/+2
2023-10-02LoongArch: KVM: Add vcpu related header filesTianrui Zhao1-5/+14
2023-09-06LoongArch: Add Loongson Binary Translation (LBT) extension supportQi Hu1-0/+4
2023-09-06LoongArch: Drop unused parse_r and parse_v macrosNathan Chancellor1-43/+0
2023-06-30Merge tag 'loongarch-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/ch...Linus Torvalds1-53/+23
2023-06-29LoongArch: Introduce hardware page table walkerHuacai Chen1-0/+4
2023-06-29LoongArch: Make the CPUCFG&CSR ops simple aliases of compiler built-insWANG Xuerui1-52/+11
2023-06-29LoongArch: Prepare for assemblers with proper FCSR class supportWANG Xuerui1-1/+8
2023-06-28Merge tag 'sched-core-2023-06-27' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-1/+1
2023-06-15LoongArch: Fix the write_fcsr() macroQi Hu1-1/+1
2023-06-05loongarch: Provide noinstr sched_clock_read()Peter Zijlstra1-1/+1
2023-05-01LoongArch: Define regular names for BCE/WATCH/HVC/GSPR exceptionsWANG Xuerui1-4/+6
2023-05-01LoongArch: Clean up the architectural interrupt definitionsWANG Xuerui1-22/+25
2023-04-19LoongArch: Replace hard-coded values in comments with VALENEnze Li1-2/+2
2023-04-18LoongArch: Fix probing of the CRC32 featureHuacai Chen1-1/+1
2023-02-25LoongArch: ptrace: Add hardware single step supportQing Zhang1-0/+3
2023-02-25LoongArch: Add hardware breakpoints/watchpoints supportQing Zhang1-16/+16
2022-10-12LoongArch: Refactor cache probe and flush methodsHuacai Chen1-27/+6
2022-06-03LoongArch: Add CPU definition headersHuacai Chen1-0/+1516
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