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path: root/arch/mips/include/asm/mach-ip22
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2020-09-07MIPS: Remove mach-*/war.hThomas Bogendoerfer1-11/+0
2020-09-07MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer1-2/+0
2020-09-07MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer1-2/+0
2020-09-07MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer1-5/+0
2020-09-07MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer1-1/+0
2020-09-07MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer1-1/+0
2019-10-10MIPS: SGI-IP22/28: Use PROM for memory detectionThomas Bogendoerfer1-9/+0
2019-10-10MIPS: SGI-IP22: set PHYS_OFFSET to memory startThomas Bogendoerfer1-2/+1
2019-07-24MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton1-1/+0
2017-07-11MIPS16e2: Provide feature overrides for non-MIPS16 systemsMaciej W. Rozycki1-0/+1
2015-04-08MIPS: Correct `nofpu' non-functionalityMaciej W. Rozycki1-1/+0
2014-05-23MIPS: IP22: This platform may come with either MIPS III or MIPS IV CPUs.Ralf Baechle1-0/+4
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle1-0/+2
2012-12-13MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle1-1/+0
2012-10-11MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle1-0/+1
2008-10-15MIPS: IP22/28: Switch over to RTC class driverThomas Bogendoerfer1-18/+0
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle4-0/+118