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After commit 9f76779f2418 ("MIPS: implement architecture-specific
'pci_remap_iospace()'"), there exists the following warning on the
Loongson64 platform:
loongson-pci 1a000000.pci: IO 0x0018020000..0x001803ffff -> 0x0000020000
loongson-pci 1a000000.pci: MEM 0x0040000000..0x007fffffff -> 0x0040000000
------------[ cut here ]------------
WARNING: CPU: 2 PID: 1 at arch/mips/pci/pci-generic.c:55 pci_remap_iospace+0x84/0x90
resource start address is not zero
...
Call Trace:
[<ffffffff8020dc78>] show_stack+0x40/0x120
[<ffffffff80cf4a0c>] dump_stack_lvl+0x58/0x74
[<ffffffff8023a0b0>] __warn+0xe0/0x110
[<ffffffff80cee02c>] warn_slowpath_fmt+0xa4/0xd0
[<ffffffff80cecf24>] pci_remap_iospace+0x84/0x90
[<ffffffff807f9864>] devm_pci_remap_iospace+0x5c/0xb8
[<ffffffff808121b0>] devm_of_pci_bridge_init+0x178/0x1f8
[<ffffffff807f4000>] devm_pci_alloc_host_bridge+0x78/0x98
[<ffffffff80819454>] loongson_pci_probe+0x34/0x160
[<ffffffff809203cc>] platform_probe+0x6c/0xe0
[<ffffffff8091d5d4>] really_probe+0xbc/0x340
[<ffffffff8091d8f0>] __driver_probe_device+0x98/0x110
[<ffffffff8091d9b8>] driver_probe_device+0x50/0x118
[<ffffffff8091dea0>] __driver_attach+0x80/0x118
[<ffffffff8091b280>] bus_for_each_dev+0x80/0xc8
[<ffffffff8091c6d8>] bus_add_driver+0x130/0x210
[<ffffffff8091ead4>] driver_register+0x8c/0x150
[<ffffffff80200a8c>] do_one_initcall+0x54/0x288
[<ffffffff811a5320>] kernel_init_freeable+0x27c/0x2e4
[<ffffffff80cfc380>] kernel_init+0x2c/0x134
[<ffffffff80205a2c>] ret_from_kernel_thread+0x14/0x1c
---[ end trace e4a0efe10aa5cce6 ]---
loongson-pci 1a000000.pci: error -19: failed to map resource [io 0x20000-0x3ffff]
We can see that the resource start address is 0x0000020000, because
the ISA Bridge used the zero address which is defined in the dts file
arch/mips/boot/dts/loongson/ls7a-pch.dtsi:
ISA Bridge: /bus@10000000/isa@18000000
IO 0x0000000018000000..0x000000001801ffff -> 0x0000000000000000
Based on the above analysis, the architecture-specific pci_remap_iospace()
is not suitable for Loongson64, we should only define pci_remap_iospace()
for Ralink on MIPS based on the commit background.
Fixes: 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'")
Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Tested-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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By default MIPS architecture use function 'set_io_port_base()' to set the
virtual address of the first IO port. This function at the end sets variable
'mips_io_port_base' with the desired address. To align things and allow
to change first IO port location address for PCI, set PCI_IOBASE definition
as 'mips_io_port_base'.
Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE")
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210925203224.10419-4-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This reverts commit 159697474db41732ef3b6c2e8d9395f09d1f659e.
There is no real need to increase IO_SPACE_LIMIT if PCI_IOBASE
is properly set to 'mips_io_port_base'. Hence revert this commit
first before doing anything else.
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210925203224.10419-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Defining PCI_IOBASE results in pci resource handling working but the
addresses generated for IO accesses are wrong since the ioremap in the pci core
function 'pci_parse_request_of_pci_ranges' tries to remap to a fixed virtual
address (PC_IOBASE) which can't work for KSEG1 addresses. To get it working this
way, we would need to put PCI_IOBASE somewhere into KSEG2 which will result in
creating TLB entries for IO addresses, which most of the time isn't needed on
MIPS because of access via KSEG1. So avoid to define PCI_IOBASE and increase
IO_SPACE_LIMIT resource for ralink MIPS platform instead, to get valid IO
addresses for resources from pci core 'pci_address_to_pio' function.
Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE")
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210822161005.22467-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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PCI_IOBASE is used to create VM maps for PCI I/O ports, it is
required by generic PCI drivers to make memory mapped I/O range
work. Hence define it for ralink architectures to be able to
avoid parsing manually IO ranges in PCI generic driver code.
Function 'plat_mem_setup' for ralink is using 'set_io_port_base'
call using '0xa0000000' as address, so use the same address in
the definition to align things.
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210614100617.28753-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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