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2015-09-03MIPS: Octeon: Support all PIP input ports on CN68XXJanne Huttunen1-1/+1
2015-09-03MIPS: Tidy up FPU context switchingPaul Burton2-25/+17
2015-09-03MIPS: Add uprobes support.Ralf Baechle5-2/+147
2015-09-03MIPS: Set trap_no field in thread_struct on exception.Ralf Baechle1-0/+2
2015-09-03MIPS: Remove all the uses of custom gpio.hAlban Bedel16-470/+15
2015-09-03MIPS: Select CONFIG_ARCH_USE_CMPXCHG_LOCKREF for MIPS64Paul Burton1-0/+5
2015-09-03MIPS: Get rid of finish_arch_switch().Ralf Baechle1-25/+23
2015-09-03MIPS: Use Ingenic-specific write combine attribute on all Ingenic platformsAlex Smith1-1/+1
2015-09-03MIPS: Fix definition of pgprot_writecombine()Alex Smith1-0/+2
2015-09-03MIPS: AT_HWCAP aux vector infrastructurePaul Burton2-1/+11
2015-09-03MIPS: Add definitions for extended contextPaul Burton3-1/+68
2015-09-03MIPS: Indicate FP mode in sigcontext sc_used_mathPaul Burton1-0/+9
2015-09-03MIPS: Use common FP sigcontext code for O32 compatPaul Burton1-0/+3
2015-09-03MIPS: Add offsets to sigcontext FP fields to struct mips_abiPaul Burton1-0/+4
2015-09-03MIPS: cevt-r4k: Migrate to new 'set-state' interfaceViresh Kumar1-1/+0
2015-09-03MIPS: Rearrange ENTRYLO field definitionsJames Hogan1-25/+27
2015-09-03MIPS: Probe for small (1KiB) page supportJames Hogan2-0/+5
2015-09-03MIPS: Refactor dumping of TLB registers for r3k/r4kJames Hogan1-0/+1
2015-09-03MIPS: Treat CP1 control registers as unsigned ints.Ralf Baechle1-1/+1
2015-09-03MIPS: Use unsigned int when reading CP0 registersChris Packham1-2/+2
2015-09-03MIPS: Introduce accessors for MSA vector registersPaul Burton2-0/+194
2015-09-03MIPS: Declare MSA MI10 instruction formatsLeonid Yegoshin1-1/+30
2015-09-03MIPS: Remove "__weak" definition from arch-specific linkage.hBjorn Helgaas1-1/+0
2015-09-03MIPS: Remove "weak" from mips_cdmm_phys_base() declarationBjorn Helgaas1-2/+2
2015-09-03MIPS: Remove "weak" from get_c0_fdc_int() declarationBjorn Helgaas1-1/+1
2015-09-03MIPS: Remove "weak" from get_c0_compare_int() declarationBjorn Helgaas1-1/+1
2015-08-26MIPS: MT: Remove "weak" from vpe_run() declarationBjorn Helgaas1-1/+1
2015-08-26MIPS: Remove "weak" from platform_maar_init() declarationBjorn Helgaas1-1/+1
2015-08-26MIPS: CPC: Remove "weak" from mips_cpc_phys_base() and make it staticBjorn Helgaas1-10/+0
2015-08-26MIPS: Drop CONFIG_RUNTIME_DEBUG & debug.hPaul Burton1-48/+0
2015-08-26MIPS: Set up FTLB probability for I6400Markos Chandras1-0/+2
2015-08-26MIPS: CM: Add support for reporting CM cache errorsMarkos Chandras1-0/+9
2015-08-26MIPS: mips-cm: Extend CM accessors for 64-bit CPUsMarkos Chandras1-4/+44
2015-08-26MIPS: CM: Add GCR_L2_CONFIG register accessorsPaul Burton1-0/+11
2015-08-26MIPS: mips-cm: Implement mips_cm_revisionPaul Burton1-0/+21
2015-08-26MIPS: Add cases for CPU_I6400Markos Chandras1-0/+4
2015-08-26MIPS: Add MIPS I6400 PRid and cputype identifiersMarkos Chandras1-0/+2
2015-08-05MIPS: Make set_pte() SMP safe.David Daney1-0/+31
2015-08-03MIPS: Flush RPS on kernel entry with EVAJames Hogan1-0/+25
2015-08-03Revert "MIPS: BCM63xx: Provide a plat_post_dma_flush hook"Florian Fainelli1-10/+0
2015-08-03MIPS: SMP: Don't increment irq_count multiple times for call function IPIsAlex Smith1-2/+0
2015-07-20Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds3-5/+4
2015-07-19MIPS: fpu.h: Allow 64-bit FPU on a 64-bit MIPS R6 CPUMarkos Chandras1-1/+1
2015-07-18mm: clean up per architecture MM hook header filesLaurent Dufour2-15/+1
2015-07-14MIPS: SB1: Remove support for Pass 1 parts.Ralf Baechle1-2/+1
2015-07-14MIPS: asm-offset.c: Patch up various comments refering to the old filename.Ralf Baechle1-2/+2
2015-07-10MIPS: c-r4k: Fix cache flushing for MT coresMarkos Chandras1-0/+1
2015-07-07MIPS, CPUFREQ: Fix spelling of Institute.Ralf Baechle1-1/+1
2015-06-27Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds62-151/+441
2015-06-26Merge branch 'akpm' (patches from Andrew)Linus Torvalds1-9/+0
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