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2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner11-132/+11
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner68-611/+68
2019-05-30treewide: Add SPDX license identifier - KbuildGreg Kroah-Hartman2-0/+2
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner3-27/+3
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner1-9/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner1-5/+1
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner5-70/+5
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 36Thomas Gleixner1-5/+1
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner6-0/+6
2019-05-19Merge tag 'kbuild-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ma...Linus Torvalds1-4/+0
2019-05-19Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds34-320/+584
2019-05-18arch: remove dangling asm-generic wrappersMasahiro Yamada1-4/+0
2019-05-17riscv: fix locking violation in page fault handlerAndreas Schwab1-1/+2
2019-05-17RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCsYash Shah3-0/+192
2019-05-17RISC-V: Avoid using invalid intermediate translationsPalmer Dabbelt1-2/+10
2019-05-17riscv: Support BUG() in kernel moduleVincent Chen1-1/+1
2019-05-17riscv: Add the support for c.ebreak check in is_valid_bugaddr()Vincent Chen2-4/+23
2019-05-17riscv: support trap-based WARN()Vincent Chen1-10/+18
2019-05-17riscv: fix sbi_remote_sfence_vma{,_asid}.Gary Guo1-7/+12
2019-05-17riscv: move switch_mm to its own fileGary Guo3-52/+72
2019-05-17riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo3-50/+62
2019-05-17RISC-V: Access CSRs using CSR numbersAnup Patel9-48/+57
2019-05-17RISC-V: Add interrupt related SCAUSE defines in asm/csr.hAnup Patel2-16/+21
2019-05-17RISC-V: Use tabs to align macro values in asm/csr.hAnup Patel1-38/+38
2019-05-17RISC-V: Fix minor checkpatch issues.Atish Patra1-2/+2
2019-05-17RISC-V: Support nr_cpus command line option.Atish Patra1-1/+9
2019-05-14riscv: switch over to generic free_initmem()Mike Rapoport1-5/+0
2019-05-08Merge tag 'audit-pr-20190507' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds1-1/+1
2019-05-07Merge tag 'arm64-mmiowb' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...Linus Torvalds3-13/+17
2019-05-06Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds1-3/+0
2019-05-06Merge branch 'core-stacktrace-for-linus' of git://git.kernel.org/pub/scm/linu...Linus Torvalds1-2/+0
2019-05-06Merge branch 'core-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-0/+1
2019-04-30RISC-V: Implement nosmp commandline option.Atish Patra1-1/+11
2019-04-30RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra2-2/+7
2019-04-30riscv: vdso: drop unnecessary cc-ldoptionNick Desaulniers1-1/+1
2019-04-26riscv: call pm_power_off from machine_halt / machine_power_offChristoph Hellwig1-6/+9
2019-04-26riscv: print the unexpected interrupt causeChristoph Hellwig1-1/+2
2019-04-26riscv: remove duplicate macros from ptrace.hChristoph Hellwig3-21/+12
2019-04-26riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR codeChristoph Hellwig1-4/+0
2019-04-26riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig2-4/+5
2019-04-26riscv: simplify the stack pointer setup in head.SChristoph Hellwig2-7/+1
2019-04-26riscv: clear all pending interrupts when bootingChristoph Hellwig1-1/+2
2019-04-26riscv: remove CONFIG_RISCV_ISA_AChristoph Hellwig3-21/+3
2019-04-26riscv: remove unreachable big endian codeChristoph Hellwig2-14/+1
2019-04-26riscv: turn mm_segment_t into a structChristoph Hellwig2-6/+10
2019-04-26riscv: use asm-generic/extable.hChristoph Hellwig2-6/+2
2019-04-25riscv/signal: Fixup additional syscall restartingGuo Ren1-0/+6
2019-04-14riscv/stacktrace: Remove the pointless ULONG_MAX markerThomas Gleixner1-2/+0
2019-04-10RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systemsAnup Patel1-0/+8
2019-04-10Merge branch 'linus' into locking/core, to pick up fixesIngo Molnar8-32/+43